From patchwork Fri Dec 1 16:27:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Marchi X-Patchwork-Id: 81157 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id AF7DB3861870 for ; Fri, 1 Dec 2023 16:33:07 +0000 (GMT) X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from simark.ca (simark.ca [158.69.221.121]) by sourceware.org (Postfix) with ESMTPS id DE29A386074C for ; Fri, 1 Dec 2023 16:32:01 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org DE29A386074C Authentication-Results: sourceware.org; dmarc=fail (p=none dis=none) header.from=efficios.com Authentication-Results: sourceware.org; spf=fail smtp.mailfrom=efficios.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org DE29A386074C Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=158.69.221.121 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1701448323; cv=none; b=v7AY0PtG0W0OJC1736vptHFCzws8db3bVvg5hx5mEI9G6Y1YWQcHvwKuKlFmXqtl3ynDaqhYn17R+fzXVqdV5yJDbK+kNK6AKOzfaDb30j+t6sggOhM+HW0NE8HThUaWIywIiLYoGXVVLvWiuhMW3IusXXEWaRqcM/5QdTlZu3g= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1701448323; c=relaxed/simple; bh=QplsI6FvE90JnkMxSkgC+AAf5YLoT3Mva7rhYeW1wbc=; h=From:To:Subject:Date:Message-ID:MIME-Version; b=VNHZ7gS5IHbzoboDIENf8tKOzrMXGHSE76tadRJM1CI5V29NcPMty4cmxCudQQgxLK7w3vRlLNDbTDXQmq5tqm6IkDscQaqWhntr737Ls6Jz4JWjQRcUtN9o2ZzzBiP3qI++cZ8tuTYZNxrzfLTa2JKAhnPd6rV9jipBNoKK18w= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from smarchi-efficios.internal.efficios.com (192-222-143-198.qc.cable.ebox.net [192.222.143.198]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (prime256v1) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPSA id 4D3D01E1A9; Fri, 1 Dec 2023 11:32:00 -0500 (EST) From: Simon Marchi To: gdb-patches@sourceware.org Cc: Luis Machado , John Baldwin , "Aktemur, Tankut Baris" , Simon Marchi , John Baldwin Subject: [PATCH 23/24] gdb: migrate arm to new gdbarch_pseudo_register_write Date: Fri, 1 Dec 2023 11:27:36 -0500 Message-ID: <20231201162751.741751-24-simon.marchi@efficios.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231201162751.741751-1-simon.marchi@efficios.com> References: <20231201162751.741751-1-simon.marchi@efficios.com> MIME-Version: 1.0 X-Spam-Status: No, score=-3496.6 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, SPF_HELO_PASS, SPF_SOFTFAIL, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Make arm use the new gdbarch_pseudo_register_write. This fixes writing pseudo registers to non-current frames for that architecture. Change-Id: Icb2a649ab6394817844230e9e94c3d0564d2f765 Reviewed-By: John Baldwin Approved-by: Luis Machado --- gdb/arm-tdep.c | 62 +++++++++++++++++++++++++++++--------------------- 1 file changed, 36 insertions(+), 26 deletions(-) diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 36ca867da5c2..0e333290e1e5 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -9908,57 +9908,67 @@ arm_neon_quad_write (struct gdbarch *gdbarch, struct regcache *regcache, regcache->raw_write (double_regnum + 1, buf + 8); } +static void +arm_neon_quad_write (gdbarch *gdbarch, frame_info_ptr next_frame, + int quad_reg_index, gdb::array_view buf) +{ + std::string raw_reg_name = string_printf ("d%d", quad_reg_index << 1); + int double_regnum + = user_reg_map_name_to_regnum (gdbarch, raw_reg_name.data (), + raw_reg_name.length ()); + + pseudo_to_concat_raw (next_frame, buf, double_regnum, double_regnum + 1); +} + /* Store the contents of BUF to the MVE pseudo register REGNUM. */ static void -arm_mve_pseudo_write (struct gdbarch *gdbarch, struct regcache *regcache, - int regnum, const gdb_byte *buf) +arm_mve_pseudo_write (gdbarch *gdbarch, frame_info_ptr next_frame, + int pseudo_reg_num, gdb::array_view buf) { arm_gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); /* P0 is the first 16 bits of VPR. */ - regcache->raw_write_part (tdep->mve_vpr_regnum, 0, 2, buf); + pseudo_to_raw_part(next_frame, buf, tdep->mve_vpr_regnum, 0); } static void -arm_pseudo_write (struct gdbarch *gdbarch, struct regcache *regcache, - int regnum, const gdb_byte *buf) +arm_pseudo_write (gdbarch *gdbarch, frame_info_ptr next_frame, + const int pseudo_reg_num, + gdb::array_view buf) { - const int num_regs = gdbarch_num_regs (gdbarch); - char name_buf[4]; - gdb_byte reg_buf[8]; - int offset, double_regnum; arm_gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); - gdb_assert (regnum >= num_regs); + gdb_assert (pseudo_reg_num >= gdbarch_num_regs (gdbarch)); - if (is_q_pseudo (gdbarch, regnum)) + if (is_q_pseudo (gdbarch, pseudo_reg_num)) { /* Quad-precision register. */ - arm_neon_quad_write (gdbarch, regcache, - regnum - tdep->q_pseudo_base, buf); + arm_neon_quad_write (gdbarch, next_frame, + pseudo_reg_num - tdep->q_pseudo_base, buf); } - else if (is_mve_pseudo (gdbarch, regnum)) - arm_mve_pseudo_write (gdbarch, regcache, regnum, buf); + else if (is_mve_pseudo (gdbarch, pseudo_reg_num)) + arm_mve_pseudo_write (gdbarch, next_frame, pseudo_reg_num, buf); else { - regnum -= tdep->s_pseudo_base; + int s_reg_index = pseudo_reg_num - tdep->s_pseudo_base; + /* Single-precision register. */ - gdb_assert (regnum < 32); + gdb_assert (s_reg_index < 32); /* s0 is always the least significant half of d0. */ + int offset; if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) - offset = (regnum & 1) ? 0 : 4; + offset = (s_reg_index & 1) ? 0 : 4; else - offset = (regnum & 1) ? 4 : 0; + offset = (s_reg_index & 1) ? 4 : 0; - xsnprintf (name_buf, sizeof (name_buf), "d%d", regnum >> 1); - double_regnum = user_reg_map_name_to_regnum (gdbarch, name_buf, - strlen (name_buf)); + std::string raw_reg_name = string_printf ("d%d", s_reg_index >> 1); + int double_regnum + = user_reg_map_name_to_regnum (gdbarch, raw_reg_name.c_str (), + raw_reg_name.length ()); - regcache->raw_read (double_regnum, reg_buf); - memcpy (reg_buf + offset, buf, 4); - regcache->raw_write (double_regnum, reg_buf); + pseudo_to_raw_part (next_frame, buf, double_regnum, offset); } } @@ -10918,7 +10928,7 @@ arm_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) { set_gdbarch_num_pseudo_regs (gdbarch, num_pseudos); set_gdbarch_pseudo_register_read_value (gdbarch, arm_pseudo_read_value); - set_gdbarch_deprecated_pseudo_register_write (gdbarch, arm_pseudo_write); + set_gdbarch_pseudo_register_write (gdbarch, arm_pseudo_write); } /* Add standard register aliases. We add aliases even for those