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Wed, 13 Sep 2023 10:18:25 +0000 To: Subject: [PATCH v6 01/17] [gdb/aarch64] Fix register fetch/store order for native AArch64 Linux Date: Wed, 13 Sep 2023 11:17:59 +0100 Message-ID: <20230913101815.178154-2-luis.machado@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230913101815.178154-1-luis.machado@arm.com> References: <20230913101815.178154-1-luis.machado@arm.com> MIME-Version: 1.0 X-EOPAttributedMessage: 1 X-MS-TrafficTypeDiagnostic: AM7EUR03FT027:EE_|DU0PR08MB7883:EE_|AM7EUR03FT043:EE_|GV1PR08MB8213:EE_ X-MS-Office365-Filtering-Correlation-Id: d256dda3-830e-412d-19ae-08dbb442cb8d x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: DvPWhFOs2uiOsrdT/CEUd+hlMgzOf89ja60wIc3vbtlWwgDbvt/RvokSQ7rYvIuqvD1wC1BKU/yM3Si6PwiqSk2nLeRPSxoXAu1XTxJHvirmkOdJSclhj60TxE95006LYQlPodAUv1bo9XBqD739XR6lWfEnLqMvJCgQYUPUjypgEueGwmASHWZ5TJajoukflnf2MUQpfpFGLuBdQOWSmWnJXAhHdMq/cH6XlbXQ1gztF6QFzMxZFF+LGHiG1z8aUpoW8KaVT84oQLsfPvIYH9PiXoUnlsS1AFrgmqbLA7JrsnwJXi+cw7KRj9e64J6HACrvW+deV3gxLMJJfjj7TI6fDpAzNL/PS+Vo6SnMoemwzk1txz5u34eroL2PyMtwslU2eSXkSCadGHf6BqAl008c1BHK5pdyAZ2yQIH92xc5CtxpfRT6DAjf8YpobYEehoOGQN0iOv4zwWUYilGCPrhKYn7z4QpSgHuXtMdoIIYGh4wDwFEoQS2/xQl4XXjrOZKVGpw2Tkh7s2sO5ZHxrZUR52OhM9QSEiAKcNcPSB235ewOq2hJ6fOzbs2QuQ0J3yVAqVeKuHj6WKBMk0BgNHttQ4v+P3Lsekae6Gg9oJaS3IKyMoNjhKGuGSANJR2YvPgu7q7EEw2l1toBiIt6kpUh0Gyn/4mnc/1UjvRpzH5t0Lclj2ipfMvzdytKDGKUk/rtqE0PC8UZ2Jq6Pg41KwBtIFR1WAkgsjDaRaSBjpTgmwqtcS1jjD3ZF+1j1nhsxn17Unuv1SngqSChXLJaFQ== X-Forefront-Antispam-Report-Untrusted: CIP:40.67.248.234; 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Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM7EUR03FT043.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: GV1PR08MB8213 X-Spam-Status: No, score=-11.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, FORGED_SPF_HELO, GIT_PATCH_0, KAM_DMARC_NONE, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_NONE, TXREP, UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Luis Machado via Gdb-patches From: Luis Machado Reply-To: Luis Machado Cc: thiago.bauermann@linaro.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" Updates on v4: - Fix FPCR comparison and other review comments. --- I noticed we don't handle register reads/writes in the best way for native AArch64 Linux. Some registers are fetched/stored even if upper level code told us to fetch a particular register number. Fix this by being more strict about which registers we touch when reading/writing them in the native AArch64 Linux layer. There should be no user-visible changes due to this patch. Regression-tested on aarch64-linux Ubuntu 22.04/20.04. --- gdb/aarch64-linux-nat.c | 60 ++++++++++++++++++++++------------------- 1 file changed, 33 insertions(+), 27 deletions(-) diff --git a/gdb/aarch64-linux-nat.c b/gdb/aarch64-linux-nat.c index eeb9761bfe5..8844fc722cf 100644 --- a/gdb/aarch64-linux-nat.c +++ b/gdb/aarch64-linux-nat.c @@ -504,6 +504,7 @@ aarch64_fetch_registers (struct regcache *regcache, int regno) aarch64_gdbarch_tdep *tdep = gdbarch_tdep (regcache->arch ()); + /* Do we need to fetch all registers? */ if (regno == -1) { fetch_gregs_from_thread (regcache); @@ -521,28 +522,28 @@ aarch64_fetch_registers (struct regcache *regcache, int regno) if (tdep->has_tls ()) fetch_tlsregs_from_thread (regcache); } + /* General purpose register? */ else if (regno < AARCH64_V0_REGNUM) fetch_gregs_from_thread (regcache); - else if (tdep->has_sve ()) + /* SVE register? */ + else if (tdep->has_sve () && regno <= AARCH64_SVE_VG_REGNUM) fetch_sveregs_from_thread (regcache); - else + /* FPSIMD register? */ + else if (regno <= AARCH64_FPCR_REGNUM) fetch_fpregs_from_thread (regcache); - - if (tdep->has_pauth ()) - { - if (regno == AARCH64_PAUTH_DMASK_REGNUM (tdep->pauth_reg_base) - || regno == AARCH64_PAUTH_CMASK_REGNUM (tdep->pauth_reg_base)) - fetch_pauth_masks_from_thread (regcache); - } - - /* Fetch individual MTE registers. */ - if (tdep->has_mte () - && (regno == tdep->mte_reg_base)) + /* PAuth register? */ + else if (tdep->has_pauth () + && (regno == AARCH64_PAUTH_DMASK_REGNUM (tdep->pauth_reg_base) + || regno == AARCH64_PAUTH_CMASK_REGNUM (tdep->pauth_reg_base))) + fetch_pauth_masks_from_thread (regcache); + /* MTE register? */ + else if (tdep->has_mte () + && (regno == tdep->mte_reg_base)) fetch_mteregs_from_thread (regcache); - - if (tdep->has_tls () - && regno >= tdep->tls_regnum_base - && regno < tdep->tls_regnum_base + tdep->tls_register_count) + /* TLS register? */ + else if (tdep->has_tls () + && regno >= tdep->tls_regnum_base + && regno < tdep->tls_regnum_base + tdep->tls_register_count) fetch_tlsregs_from_thread (regcache); } @@ -592,6 +593,7 @@ aarch64_store_registers (struct regcache *regcache, int regno) aarch64_gdbarch_tdep *tdep = gdbarch_tdep (regcache->arch ()); + /* Do we need to store all registers? */ if (regno == -1) { store_gregs_to_thread (regcache); @@ -606,22 +608,26 @@ aarch64_store_registers (struct regcache *regcache, int regno) if (tdep->has_tls ()) store_tlsregs_to_thread (regcache); } + /* General purpose register? */ else if (regno < AARCH64_V0_REGNUM) store_gregs_to_thread (regcache); - else if (tdep->has_sve ()) + /* SVE register? */ + else if (tdep->has_sve () && regno <= AARCH64_SVE_VG_REGNUM) store_sveregs_to_thread (regcache); - else + /* FPSIMD register? */ + else if (regno <= AARCH64_FPCR_REGNUM) store_fpregs_to_thread (regcache); - - /* Store MTE registers. */ - if (tdep->has_mte () - && (regno == tdep->mte_reg_base)) + /* MTE register? */ + else if (tdep->has_mte () + && (regno == tdep->mte_reg_base)) store_mteregs_to_thread (regcache); - - if (tdep->has_tls () - && regno >= tdep->tls_regnum_base - && regno < tdep->tls_regnum_base + tdep->tls_register_count) + /* TLS register? */ + else if (tdep->has_tls () + && regno >= tdep->tls_regnum_base + && regno < tdep->tls_regnum_base + tdep->tls_register_count) store_tlsregs_to_thread (regcache); + + /* PAuth registers are read-only. */ } /* A version of the "store_registers" target_ops method used when running