From patchwork Mon Aug 7 11:07:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Arsen_Arsenovi=C4=87?= X-Patchwork-Id: 73725 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 571023968939 for ; Mon, 7 Aug 2023 11:32:34 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 571023968939 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1691407954; bh=fTfNX/xopZJVVWtGS9CmAGgNcFmOcBliQjIpWYEUyTo=; h=To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=jth8mpFdpiHLP/1enpts7Q3rGrvR2v+JyiFv75BeSsKb03fAYxmvNadsBeMbhKUVJ bnq5/SLccG76nCXsIfkvyhVhB/UXaV2dtiP74tjFbCu3XCIjy7YF2VIDSlUrvPn/r0 PB1L8DJr8Ab/D7hE5qZdOZ+GPGRSR2DbY9RgMg+c= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mout-p-202.mailbox.org (mout-p-202.mailbox.org [IPv6:2001:67c:2050:0:465::202]) by sourceware.org (Postfix) with ESMTPS id 12D03385C420; Mon, 7 Aug 2023 11:19:44 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 12D03385C420 Received: from smtp1.mailbox.org (smtp1.mailbox.org [IPv6:2001:67c:2050:b231:465::1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-p-202.mailbox.org (Postfix) with ESMTPS id 4RKDP948yMz9sS4; Mon, 7 Aug 2023 13:19:41 +0200 (CEST) To: gdb-patches@sourceware.org, binutils@sourceware.org Cc: Max Filippov Subject: [PATCH 28/45] gcc: xtensa: add data alignment properties to dynconfig Date: Mon, 7 Aug 2023 13:07:31 +0200 Message-ID: <20230807111029.2320238-29-arsen@aarsen.me> In-Reply-To: <20230807111029.2320238-1-arsen@aarsen.me> References: <20230807111029.2320238-1-arsen@aarsen.me> MIME-Version: 1.0 X-Rspamd-Queue-Id: 4RKDP948yMz9sS4 X-Spam-Status: No, score=-11.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_INFOUSMEBIZ, RCVD_IN_DNSWL_LOW, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: =?utf-8?q?Arsen_Arsenovi=C4=87_via_Gdb-patches?= From: =?utf-8?q?Arsen_Arsenovi=C4=87?= Reply-To: =?utf-8?q?Arsen_Arsenovi=C4=87?= Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" From: Max Filippov include/ * xtensa-dynconfig.h (xtensa_config_v4): New struct. (XCHAL_DATA_WIDTH, XCHAL_UNALIGNED_LOAD_EXCEPTION) (XCHAL_UNALIGNED_STORE_EXCEPTION, XCHAL_UNALIGNED_LOAD_HW) (XCHAL_UNALIGNED_STORE_HW, XTENSA_CONFIG_V4_ENTRY_LIST): New definitions. (XTENSA_CONFIG_INSTANCE_LIST): Add xtensa_config_v4 instance. (XTENSA_CONFIG_ENTRY_LIST): Add XTENSA_CONFIG_V4_ENTRY_LIST. --- include/xtensa-dynconfig.h | 59 +++++++++++++++++++++++++++++++++++++- 1 file changed, 58 insertions(+), 1 deletion(-) diff --git a/include/xtensa-dynconfig.h b/include/xtensa-dynconfig.h index 19e42349510..45d54dcd0e0 100644 --- a/include/xtensa-dynconfig.h +++ b/include/xtensa-dynconfig.h @@ -112,12 +112,22 @@ struct xtensa_config_v3 int xchal_have_xea3; }; +struct xtensa_config_v4 +{ + int xchal_data_width; + int xchal_unaligned_load_exception; + int xchal_unaligned_store_exception; + int xchal_unaligned_load_hw; + int xchal_unaligned_store_hw; +}; + extern const void *xtensa_load_config (const char *name, const void *no_plugin_def, const void *no_name_def); extern const struct xtensa_config_v1 *xtensa_get_config_v1 (void); extern const struct xtensa_config_v2 *xtensa_get_config_v2 (void); extern const struct xtensa_config_v3 *xtensa_get_config_v3 (void); +extern const struct xtensa_config_v4 *xtensa_get_config_v4 (void); #ifdef XTENSA_CONFIG_DEFINITION @@ -205,6 +215,26 @@ extern const struct xtensa_config_v3 *xtensa_get_config_v3 (void); #define XCHAL_HAVE_XEA3 0 #endif +#ifndef XCHAL_DATA_WIDTH +#define XCHAL_DATA_WIDTH 16 +#endif + +#ifndef XCHAL_UNALIGNED_LOAD_EXCEPTION +#define XCHAL_UNALIGNED_LOAD_EXCEPTION 1 +#endif + +#ifndef XCHAL_UNALIGNED_STORE_EXCEPTION +#define XCHAL_UNALIGNED_STORE_EXCEPTION 1 +#endif + +#ifndef XCHAL_UNALIGNED_LOAD_HW +#define XCHAL_UNALIGNED_LOAD_HW 0 +#endif + +#ifndef XCHAL_UNALIGNED_STORE_HW +#define XCHAL_UNALIGNED_STORE_HW 0 +#endif + #define XTENSA_CONFIG_ENTRY(a) a #define XTENSA_CONFIG_V1_ENTRY_LIST \ @@ -274,6 +304,13 @@ extern const struct xtensa_config_v3 *xtensa_get_config_v3 (void); XTENSA_CONFIG_ENTRY(XCHAL_HAVE_EXCLUSIVE), \ XTENSA_CONFIG_ENTRY(XCHAL_HAVE_XEA3) +#define XTENSA_CONFIG_V4_ENTRY_LIST \ + XTENSA_CONFIG_ENTRY(XCHAL_DATA_WIDTH), \ + XTENSA_CONFIG_ENTRY(XCHAL_UNALIGNED_LOAD_EXCEPTION), \ + XTENSA_CONFIG_ENTRY(XCHAL_UNALIGNED_STORE_EXCEPTION), \ + XTENSA_CONFIG_ENTRY(XCHAL_UNALIGNED_LOAD_HW), \ + XTENSA_CONFIG_ENTRY(XCHAL_UNALIGNED_STORE_HW) + #define XTENSA_CONFIG_INSTANCE_LIST \ const struct xtensa_config_v1 xtensa_config_v1 = { \ XTENSA_CONFIG_V1_ENTRY_LIST, \ @@ -283,12 +320,16 @@ const struct xtensa_config_v2 xtensa_config_v2 = { \ }; \ const struct xtensa_config_v3 xtensa_config_v3 = { \ XTENSA_CONFIG_V3_ENTRY_LIST, \ +}; \ +const struct xtensa_config_v4 xtensa_config_v4 = { \ + XTENSA_CONFIG_V4_ENTRY_LIST, \ } #define XTENSA_CONFIG_ENTRY_LIST \ XTENSA_CONFIG_V1_ENTRY_LIST, \ XTENSA_CONFIG_V2_ENTRY_LIST, \ - XTENSA_CONFIG_V3_ENTRY_LIST + XTENSA_CONFIG_V3_ENTRY_LIST, \ + XTENSA_CONFIG_V4_ENTRY_LIST #else /* XTENSA_CONFIG_DEFINITION */ @@ -480,6 +521,22 @@ const struct xtensa_config_v3 xtensa_config_v3 = { \ #undef XCHAL_HAVE_XEA3 #define XCHAL_HAVE_XEA3 (xtensa_get_config_v3 ()->xchal_have_xea3) + +#undef XCHAL_DATA_WIDTH +#define XCHAL_DATA_WIDTH (xtensa_get_config_v4 ()->xchal_data_width) + +#undef XCHAL_UNALIGNED_LOAD_EXCEPTION +#define XCHAL_UNALIGNED_LOAD_EXCEPTION (xtensa_get_config_v4 ()->xchal_unaligned_load_exception) + +#undef XCHAL_UNALIGNED_STORE_EXCEPTION +#define XCHAL_UNALIGNED_STORE_EXCEPTION (xtensa_get_config_v4 ()->xchal_unaligned_store_exception) + +#undef XCHAL_UNALIGNED_LOAD_HW +#define XCHAL_UNALIGNED_LOAD_HW (xtensa_get_config_v4 ()->xchal_unaligned_load_hw) + +#undef XCHAL_UNALIGNED_STORE_HW +#define XCHAL_UNALIGNED_STORE_HW (xtensa_get_config_v4 ()->xchal_unaligned_store_hw) + #endif /* XTENSA_CONFIG_DEFINITION */ #ifdef __cplusplus