diff --git a/sim/m68hc11/dv-m68hc11.c b/sim/m68hc11/dv-m68hc11.c
index cdcc9f8eb918..fee7705bcdf6 100644
--- a/sim/m68hc11/dv-m68hc11.c
+++ b/sim/m68hc11/dv-m68hc11.c
@@ -286,6 +286,7 @@ attach_m68hc11_regs (struct hw *me,
 {
   SIM_DESC sd;
   sim_cpu *cpu;
+  struct m68hc11_sim_cpu *m68hc11_cpu;
   reg_property_spec reg;
   const char *cpu_mode;
   
@@ -314,20 +315,21 @@ attach_m68hc11_regs (struct hw *me,
   /* Get cpu frequency.  */
   sd = hw_system (me);
   cpu = STATE_CPU (sd, 0);
+  m68hc11_cpu = M68HC11_SIM_CPU (cpu);
   if (hw_find_property (me, "clock") != NULL)
     {
-      cpu->cpu_frequency = hw_find_integer_property (me, "clock");
+      m68hc11_cpu->cpu_frequency = hw_find_integer_property (me, "clock");
     }
   else
     {
-      cpu->cpu_frequency = 8*1000*1000;
+      m68hc11_cpu->cpu_frequency = 8*1000*1000;
     }
 
   if (hw_find_property (me, "use_bank") != NULL)
     hw_attach_address (hw_parent (me), 0,
                        exec_map,
-                       cpu->bank_start,
-                       cpu->bank_end - cpu->bank_start,
+                       m68hc11_cpu->bank_start,
+                       m68hc11_cpu->bank_end - m68hc11_cpu->bank_start,
                        me);
 
   cpu_mode = "expanded";
@@ -335,13 +337,13 @@ attach_m68hc11_regs (struct hw *me,
     cpu_mode = hw_find_string_property (me, "mode");
 
   if (strcmp (cpu_mode, "test") == 0)
-    cpu->cpu_mode = M6811_MDA | M6811_SMOD;
+    m68hc11_cpu->cpu_mode = M6811_MDA | M6811_SMOD;
   else if (strcmp (cpu_mode, "bootstrap") == 0)
-    cpu->cpu_mode = M6811_SMOD;
+    m68hc11_cpu->cpu_mode = M6811_SMOD;
   else if (strcmp (cpu_mode, "single") == 0)
-    cpu->cpu_mode = 0;
+    m68hc11_cpu->cpu_mode = 0;
   else
-    cpu->cpu_mode = M6811_MDA;
+    m68hc11_cpu->cpu_mode = M6811_MDA;
 
   controller->last_oscillator = 0;
 
@@ -445,15 +447,17 @@ oscillator_handler (struct hw *me, void *data)
   struct input_osc *osc = (struct input_osc*) data;
   SIM_DESC sd;
   sim_cpu *cpu;
+  struct m68hc11_sim_cpu *m68hc11_cpu;
   int64_t dt;
   uint8_t val;
 
   sd = hw_system (me);
   cpu = STATE_CPU (sd, 0);
+  m68hc11_cpu = M68HC11_SIM_CPU (cpu);
 
   /* Change the input bit.  */
   osc->value ^= osc->mask;
-  val = cpu->ios[osc->addr] & ~osc->mask;
+  val = m68hc11_cpu->ios[osc->addr] & ~osc->mask;
   val |= osc->value;
   m68hc11cpu_set_port (me, cpu, osc->addr, val);
 
@@ -595,19 +599,21 @@ m68hc11_info (struct hw *me)
   SIM_DESC sd;
   uint16_t base = 0;
   sim_cpu *cpu;
+  struct m68hc11_sim_cpu *m68hc11_cpu;
   struct m68hc11sio *controller;
   uint8_t val;
   
   sd = hw_system (me);
   cpu = STATE_CPU (sd, 0);
+  m68hc11_cpu = M68HC11_SIM_CPU (cpu);
   controller = hw_data (me);
 
   base = cpu_get_io_base (cpu);
   sim_io_printf (sd, "M68HC11:\n");
 
-  val = cpu->ios[M6811_HPRIO];
+  val = m68hc11_cpu->ios[M6811_HPRIO];
   print_io_byte (sd, "HPRIO ", hprio_desc, val, base + M6811_HPRIO);
-  switch (cpu->cpu_mode)
+  switch (m68hc11_cpu->cpu_mode)
     {
     case M6811_MDA | M6811_SMOD:
       sim_io_printf (sd, "[test]\n");
@@ -623,15 +629,15 @@ m68hc11_info (struct hw *me)
       break;
     }
 
-  val = cpu->ios[M6811_CONFIG];
+  val = m68hc11_cpu->ios[M6811_CONFIG];
   print_io_byte (sd, "CONFIG", config_desc, val, base + M6811_CONFIG);
   sim_io_printf (sd, "\n");
 
-  val = cpu->ios[M6811_OPTION];
+  val = m68hc11_cpu->ios[M6811_OPTION];
   print_io_byte (sd, "OPTION", option_desc, val, base + M6811_OPTION);
   sim_io_printf (sd, "\n");
 
-  val = cpu->ios[M6811_INIT];
+  val = m68hc11_cpu->ios[M6811_INIT];
   print_io_byte (sd, "INIT  ", 0, val, base + M6811_INIT);
   sim_io_printf (sd, "Ram = 0x%04x IO = 0x%04x\n",
 		 (((uint16_t) (val & 0xF0)) << 8),
@@ -639,7 +645,7 @@ m68hc11_info (struct hw *me)
 
 
   cpu_info (sd, cpu);
-  interrupts_info (sd, &cpu->cpu_interrupts);
+  interrupts_info (sd, &m68hc11_cpu->cpu_interrupts);
 }
 
 static int
@@ -665,33 +671,35 @@ m68hc11cpu_set_oscillator (SIM_DESC sd, const char *port,
                            double ton, double toff, int64_t repeat)
 {
   sim_cpu *cpu;
+  struct m68hc11_sim_cpu *m68hc11_cpu;
   struct input_osc *osc;
   double f;
 
   cpu = STATE_CPU (sd, 0);
+  m68hc11_cpu = M68HC11_SIM_CPU (cpu);
 
   /* Find oscillator that corresponds to the input port.  */
-  osc = find_oscillator (hw_data (cpu->hw_cpu), port);
+  osc = find_oscillator (hw_data (m68hc11_cpu->hw_cpu), port);
   if (osc == 0)
     return -1;
 
   /* Compute the ON time in cpu cycles.  */
-  f = (double) (cpu->cpu_frequency) * ton;
+  f = (double) (m68hc11_cpu->cpu_frequency) * ton;
   osc->on_time = (int64_t) (f / 4.0);
   if (osc->on_time < 1)
     osc->on_time = 1;
 
   /* Compute the OFF time in cpu cycles.  */
-  f = (double) (cpu->cpu_frequency) * toff;
+  f = (double) (m68hc11_cpu->cpu_frequency) * toff;
   osc->off_time = (int64_t) (f / 4.0);
   if (osc->off_time < 1)
     osc->off_time = 1;
 
   osc->repeat = repeat;
   if (osc->event)
-    hw_event_queue_deschedule (cpu->hw_cpu, osc->event);
+    hw_event_queue_deschedule (m68hc11_cpu->hw_cpu, osc->event);
 
-  osc->event = hw_event_queue_schedule (cpu->hw_cpu,
+  osc->event = hw_event_queue_schedule (m68hc11_cpu->hw_cpu,
                                         osc->value ? osc->on_time
                                         : osc->off_time,
                                         oscillator_handler, osc);
@@ -703,15 +711,17 @@ int
 m68hc11cpu_clear_oscillator (SIM_DESC sd, const char *port)
 {
   sim_cpu *cpu;
+  struct m68hc11_sim_cpu *m68hc11_cpu;
   struct input_osc *osc;
 
   cpu = STATE_CPU (sd, 0);
-  osc = find_oscillator (hw_data (cpu->hw_cpu), port);
+  m68hc11_cpu = M68HC11_SIM_CPU (cpu);
+  osc = find_oscillator (hw_data (m68hc11_cpu->hw_cpu), port);
   if (osc == 0)
     return -1;
 
   if (osc->event)
-    hw_event_queue_deschedule (cpu->hw_cpu, osc->event);
+    hw_event_queue_deschedule (m68hc11_cpu->hw_cpu, osc->event);
   osc->event = 0;
   osc->repeat = 0;
   return 0;
@@ -742,6 +752,7 @@ static SIM_RC
 m68hc11_option_handler (SIM_DESC sd, sim_cpu *cpu,
                         int opt, char *arg, int is_command)
 {
+  struct m68hc11_sim_cpu *m68hc11_cpu;
   struct m68hc11cpu *controller;
   double f;
   char *p;
@@ -750,8 +761,9 @@ m68hc11_option_handler (SIM_DESC sd, sim_cpu *cpu,
   
   if (cpu == 0)
     cpu = STATE_CPU (sd, 0);
+  m68hc11_cpu = M68HC11_SIM_CPU (cpu);
 
-  controller = hw_data (cpu->hw_cpu);
+  controller = hw_data (m68hc11_cpu->hw_cpu);
   switch (opt)
     {
     case OPTION_OSC_SET:
@@ -796,8 +808,8 @@ m68hc11_option_handler (SIM_DESC sd, sim_cpu *cpu,
                 }
 
               f = (double) (osc->on_time + osc->off_time);
-              f = (double) (cpu->cpu_frequency / 4) / f;
-              t = hw_event_remain_time (cpu->hw_cpu, osc->event);
+              f = (double) (m68hc11_cpu->cpu_frequency / 4) / f;
+              t = hw_event_remain_time (m68hc11_cpu->hw_cpu, osc->event);
 
               if (f > 10000.0)
                 sprintf (freq, "%6.2f", f / 1000.0);
@@ -839,6 +851,7 @@ m68hc11cpu_io_read_buffer (struct hw *me,
   SIM_DESC sd;
   struct m68hc11cpu *controller = hw_data (me);
   sim_cpu *cpu;
+  struct m68hc11_sim_cpu *m68hc11_cpu;
   unsigned byte = 0;
   int result;
   
@@ -846,8 +859,9 @@ m68hc11cpu_io_read_buffer (struct hw *me,
 
   sd  = hw_system (me);
   cpu = STATE_CPU (sd, 0);
+  m68hc11_cpu = M68HC11_SIM_CPU (cpu);
 
-  if (base >= cpu->bank_start && base < cpu->bank_end)
+  if (base >= m68hc11_cpu->bank_start && base < m68hc11_cpu->bank_end)
     {
       address_word virt_addr = phys_to_virt (cpu, base);
       if (virt_addr != base)
@@ -867,7 +881,7 @@ m68hc11cpu_io_read_buffer (struct hw *me,
       if (base >= controller->attach_size)
 	break;
 
-      memcpy (dest, &cpu->ios[base], 1);
+      memcpy (dest, &m68hc11_cpu->ios[base], 1);
       dest = (char*) dest + 1;
       base++;
       byte++;
@@ -880,6 +894,7 @@ void
 m68hc11cpu_set_port (struct hw *me, sim_cpu *cpu,
                      unsigned addr, uint8_t val)
 {
+  struct m68hc11_sim_cpu *m68hc11_cpu = M68HC11_SIM_CPU (cpu);
   uint8_t mask;
   uint8_t delta;
   int check_interrupts = 0;
@@ -888,35 +903,35 @@ m68hc11cpu_set_port (struct hw *me, sim_cpu *cpu,
   switch (addr)
     {
     case M6811_PORTA:
-      if (cpu->ios[M6811_PACTL] & M6811_DDRA7)
+      if (m68hc11_cpu->ios[M6811_PACTL] & M6811_DDRA7)
         mask = 3;
       else
         mask = 0x83;
 
       val = val & mask;
-      val |= cpu->ios[M6811_PORTA] & ~mask;
-      delta = val ^ cpu->ios[M6811_PORTA];
-      cpu->ios[M6811_PORTA] = val;
+      val |= m68hc11_cpu->ios[M6811_PORTA] & ~mask;
+      delta = val ^ m68hc11_cpu->ios[M6811_PORTA];
+      m68hc11_cpu->ios[M6811_PORTA] = val;
       if (delta & 0x80)
         {
           /* Pulse accumulator is enabled.  */
-          if ((cpu->ios[M6811_PACTL] & M6811_PAEN)
-              && !(cpu->ios[M6811_PACTL] & M6811_PAMOD))
+          if ((m68hc11_cpu->ios[M6811_PACTL] & M6811_PAEN)
+              && !(m68hc11_cpu->ios[M6811_PACTL] & M6811_PAMOD))
             {
               int inc;
 
               /* Increment event counter according to rising/falling edge.  */
-              if (cpu->ios[M6811_PACTL] & M6811_PEDGE)
+              if (m68hc11_cpu->ios[M6811_PACTL] & M6811_PEDGE)
                 inc = (val & 0x80) ? 1 : 0;
               else
                 inc = (val & 0x80) ? 0 : 1;
 
-              cpu->ios[M6811_PACNT] += inc;
+              m68hc11_cpu->ios[M6811_PACNT] += inc;
 
               /* Event counter overflowed.  */
-              if (inc && cpu->ios[M6811_PACNT] == 0)
+              if (inc && m68hc11_cpu->ios[M6811_PACNT] == 0)
                 {
-                  cpu->ios[M6811_TFLG2] |= M6811_PAOVI;
+                  m68hc11_cpu->ios[M6811_TFLG2] |= M6811_PAOVI;
                   check_interrupts = 1;
                 }
             }
@@ -932,7 +947,7 @@ m68hc11cpu_set_port (struct hw *me, sim_cpu *cpu,
               uint8_t edge;
               int captured;
 
-              edge = cpu->ios[M6811_TCTL2];
+              edge = m68hc11_cpu->ios[M6811_TCTL2];
               edge = (edge >> (2 * i)) & 0x3;
               switch (edge)
                 {
@@ -951,7 +966,7 @@ m68hc11cpu_set_port (struct hw *me, sim_cpu *cpu,
                 }
               if (captured)
                 {
-                  cpu->ios[M6811_TFLG1] |= (1 << i);
+                  m68hc11_cpu->ios[M6811_TFLG1] |= (1 << i);
                   hw_port_event (me, CAPTURE, M6811_TIC1 + 3 - i);
                   check_interrupts = 1;
                 }
@@ -960,17 +975,17 @@ m68hc11cpu_set_port (struct hw *me, sim_cpu *cpu,
       break;
 
     case M6811_PORTC:
-      mask = cpu->ios[M6811_DDRC];
+      mask = m68hc11_cpu->ios[M6811_DDRC];
       val = val & mask;
-      val |= cpu->ios[M6811_PORTC] & ~mask;
-      cpu->ios[M6811_PORTC] = val;
+      val |= m68hc11_cpu->ios[M6811_PORTC] & ~mask;
+      m68hc11_cpu->ios[M6811_PORTC] = val;
       break;
 
     case M6811_PORTD:
-      mask = cpu->ios[M6811_DDRD];
+      mask = m68hc11_cpu->ios[M6811_DDRD];
       val = val & mask;
-      val |= cpu->ios[M6811_PORTD] & ~mask;
-      cpu->ios[M6811_PORTD] = val;
+      val |= m68hc11_cpu->ios[M6811_PORTD] & ~mask;
+      m68hc11_cpu->ios[M6811_PORTD] = val;
       break;
 
     default:
@@ -978,13 +993,15 @@ m68hc11cpu_set_port (struct hw *me, sim_cpu *cpu,
     }
 
   if (check_interrupts)
-    interrupts_update_pending (&cpu->cpu_interrupts);
+    interrupts_update_pending (&m68hc11_cpu->cpu_interrupts);
 }
 
 static void
 m68hc11cpu_io_write (struct hw *me, sim_cpu *cpu,
                      unsigned_word addr, uint8_t val)
 {
+  struct m68hc11_sim_cpu *m68hc11_cpu = M68HC11_SIM_CPU (cpu);
+
   switch (addr)
     {
     case M6811_PORTA:
@@ -1022,9 +1039,9 @@ m68hc11cpu_io_write (struct hw *me, sim_cpu *cpu,
       /* Change the RAM and I/O mapping.  */
     case M6811_INIT:
       {
-	uint8_t old_bank = cpu->ios[M6811_INIT];
+	uint8_t old_bank = m68hc11_cpu->ios[M6811_INIT];
 	
-	cpu->ios[M6811_INIT] = val;
+	m68hc11_cpu->ios[M6811_INIT] = val;
 
 	/* Update IO mapping.  Detach from the old address
 	   and attach to the new one.  */
@@ -1063,7 +1080,7 @@ m68hc11cpu_io_write (struct hw *me, sim_cpu *cpu,
 
       /* COP reset.  */
     case M6811_COPRST:
-      if (val == 0xAA && cpu->ios[addr] == 0x55)
+      if (val == 0xAA && m68hc11_cpu->ios[addr] == 0x55)
 	{
           val = 0;
           /* COP reset here.  */
@@ -1074,7 +1091,7 @@ m68hc11cpu_io_write (struct hw *me, sim_cpu *cpu,
       break;
 
     }
-  cpu->ios[addr] = val;
+  m68hc11_cpu->ios[addr] = val;
 }
 
 static unsigned
@@ -1088,14 +1105,16 @@ m68hc11cpu_io_write_buffer (struct hw *me,
   struct m68hc11cpu *controller = hw_data (me);
   unsigned byte;
   sim_cpu *cpu;
+  struct m68hc11_sim_cpu *m68hc11_cpu;
   int result;
 
   HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
 
   sd = hw_system (me); 
   cpu = STATE_CPU (sd, 0);  
+  m68hc11_cpu = M68HC11_SIM_CPU (cpu);
 
-  if (base >= cpu->bank_start && base < cpu->bank_end)
+  if (base >= m68hc11_cpu->bank_start && base < m68hc11_cpu->bank_end)
     {
       address_word virt_addr = phys_to_virt (cpu, base);
       if (virt_addr != base)
diff --git a/sim/m68hc11/dv-m68hc11eepr.c b/sim/m68hc11/dv-m68hc11eepr.c
index 6d620e474e89..5e6c4e187551 100644
--- a/sim/m68hc11/dv-m68hc11eepr.c
+++ b/sim/m68hc11/dv-m68hc11eepr.c
@@ -241,10 +241,12 @@ m68hc11eepr_port_event (struct hw *me,
   SIM_DESC sd;
   struct m68hc11eepr *controller;
   sim_cpu *cpu;
+  struct m68hc11_sim_cpu *m68hc11_cpu;
   
   controller = hw_data (me);
   sd         = hw_system (me);
   cpu        = STATE_CPU (sd, 0);
+  m68hc11_cpu  = M68HC11_SIM_CPU (cpu);
   switch (my_port)
     {
     case RESET_PORT:
@@ -258,11 +260,11 @@ m68hc11eepr_port_event (struct hw *me,
 
         /* Reset the state of EEPROM programmer.  The CONFIG register
            is also initialized from the EEPROM/file content.  */
-        cpu->ios[M6811_PPROG]    = 0;
-        if (cpu->cpu_use_local_config)
-          cpu->ios[M6811_CONFIG] = cpu->cpu_config;
+        m68hc11_cpu->ios[M6811_PPROG]    = 0;
+        if (m68hc11_cpu->cpu_use_local_config)
+          m68hc11_cpu->ios[M6811_CONFIG] = m68hc11_cpu->cpu_config;
         else
-          cpu->ios[M6811_CONFIG]   = controller->eeprom[controller->size-1];
+          m68hc11_cpu->ios[M6811_CONFIG]   = controller->eeprom[controller->size-1];
         controller->eeprom_wmode = 0;
         controller->eeprom_waddr = 0;
         controller->eeprom_wbyte = 0;
@@ -271,7 +273,7 @@ m68hc11eepr_port_event (struct hw *me,
            The EEPROM CONFIG register is still enabled and can be programmed
            for a next configuration (taken into account only after a reset,
            see Motorola spec).  */
-        if (!(cpu->ios[M6811_CONFIG] & M6811_EEON))
+        if (!(m68hc11_cpu->ios[M6811_CONFIG] & M6811_EEON))
           {
             if (controller->mapped)
               hw_detach_address (hw_parent (me), M6811_EEPROM_LEVEL,
@@ -341,21 +343,23 @@ m68hc11eepr_info (struct hw *me)
   SIM_DESC sd;
   uint16_t base = 0;
   sim_cpu *cpu;
+  struct m68hc11_sim_cpu *m68hc11_cpu;
   struct m68hc11eepr *controller;
   uint8_t val;
   
   sd         = hw_system (me);
   cpu        = STATE_CPU (sd, 0);
+  m68hc11_cpu  = M68HC11_SIM_CPU (cpu);
   controller = hw_data (me);
   base       = cpu_get_io_base (cpu);
   
   sim_io_printf (sd, "M68HC11 EEprom:\n");
 
-  val = cpu->ios[M6811_PPROG];
+  val = m68hc11_cpu->ios[M6811_PPROG];
   print_io_byte (sd, "PPROG  ", pprog_desc, val, base + M6811_PPROG);
   sim_io_printf (sd, "\n");
 
-  val = cpu->ios[M6811_CONFIG];
+  val = m68hc11_cpu->ios[M6811_CONFIG];
   print_io_byte (sd, "CONFIG ", config_desc, val, base + M6811_CONFIG);
   sim_io_printf (sd, "\n");
 
@@ -401,12 +405,14 @@ m68hc11eepr_io_read_buffer (struct hw *me,
   SIM_DESC sd;
   struct m68hc11eepr *controller;
   sim_cpu *cpu;
+  struct m68hc11_sim_cpu *m68hc11_cpu;
   
   HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
 
   sd         = hw_system (me);
   controller = hw_data (me);
   cpu        = STATE_CPU (sd, 0);
+  m68hc11_cpu  = M68HC11_SIM_CPU (cpu);
 
   if (space == io_map)
     {
@@ -418,7 +424,7 @@ m68hc11eepr_io_read_buffer (struct hw *me,
             {
             case M6811_PPROG:
             case M6811_CONFIG:
-              *((uint8_t*) dest) = cpu->ios[base];
+              *((uint8_t*) dest) = m68hc11_cpu->ios[base];
               break;
 
             default:
@@ -433,7 +439,7 @@ m68hc11eepr_io_read_buffer (struct hw *me,
     }
 
   /* In theory, we can't read the EEPROM when it's being programmed.  */
-  if ((cpu->ios[M6811_PPROG] & M6811_EELAT) != 0
+  if ((m68hc11_cpu->ios[M6811_PPROG] & M6811_EELAT) != 0
       && cpu_is_running (cpu))
     {
       sim_memory_error (cpu, SIM_SIGBUS, base,
@@ -456,6 +462,7 @@ m68hc11eepr_io_write_buffer (struct hw *me,
   SIM_DESC sd;
   struct m68hc11eepr *controller;
   sim_cpu *cpu;
+  struct m68hc11_sim_cpu *m68hc11_cpu;
   uint8_t val;
 
   HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
@@ -463,6 +470,7 @@ m68hc11eepr_io_write_buffer (struct hw *me,
   sd         = hw_system (me);
   controller = hw_data (me);
   cpu        = STATE_CPU (sd, 0);
+  m68hc11_cpu  = M68HC11_SIM_CPU (cpu);
 
   /* Programming several bytes at a time is not possible.  */
   if (space != io_map && nr_bytes != 1)
@@ -487,7 +495,7 @@ m68hc11eepr_io_write_buffer (struct hw *me,
 
       /* Setting EELAT and EEPGM at the same time is an error.
          Clearing them both is ok.  */
-      wrong_bits = (cpu->ios[M6811_PPROG] ^ val) & val;
+      wrong_bits = (m68hc11_cpu->ios[M6811_PPROG] ^ val) & val;
       wrong_bits &= (M6811_EELAT | M6811_EEPGM);
 
       if (wrong_bits == (M6811_EEPGM|M6811_EELAT))
@@ -501,7 +509,7 @@ m68hc11eepr_io_write_buffer (struct hw *me,
 	{
 	  val = 0;
 	}
-      if ((val & M6811_EEPGM) && !(cpu->ios[M6811_PPROG] & M6811_EELAT))
+      if ((val & M6811_EEPGM) && !(m68hc11_cpu->ios[M6811_PPROG] & M6811_EELAT))
 	{
 	  sim_memory_error (cpu, SIM_SIGBUS, addr,
 			    "EEProm high voltage applied after EELAT");
@@ -515,7 +523,7 @@ m68hc11eepr_io_write_buffer (struct hw *me,
 	{
 	  controller->eeprom_wcycle = cpu_current_cycle (cpu);
 	}
-      else if (cpu->ios[M6811_PPROG] & M6811_PPROG)
+      else if (m68hc11_cpu->ios[M6811_PPROG] & M6811_PPROG)
 	{
 	  int i;
 	  unsigned long t = cpu_current_cycle (cpu);
@@ -529,7 +537,7 @@ m68hc11eepr_io_write_buffer (struct hw *me,
 	    }
 
 	  /* Program the byte by clearing some bits.  */
-	  if (!(cpu->ios[M6811_PPROG] & M6811_ERASE))
+	  if (!(m68hc11_cpu->ios[M6811_PPROG] & M6811_ERASE))
 	    {
 	      controller->eeprom[controller->eeprom_waddr]
 		&= controller->eeprom_wbyte;
@@ -538,12 +546,12 @@ m68hc11eepr_io_write_buffer (struct hw *me,
 	  /* Erase a byte, row or the complete eeprom.  Erased value is 0xFF.
              Ignore row or complete eeprom erase when we are programming the
              CONFIG register (last EEPROM byte).  */
-	  else if ((cpu->ios[M6811_PPROG] & M6811_BYTE)
+	  else if ((m68hc11_cpu->ios[M6811_PPROG] & M6811_BYTE)
                    || controller->eeprom_waddr == controller->size - 1)
 	    {
 	      controller->eeprom[controller->eeprom_waddr] = 0xff;
 	    }
-	  else if (cpu->ios[M6811_BYTE] & M6811_ROW)
+	  else if (m68hc11_cpu->ios[M6811_BYTE] & M6811_ROW)
 	    {
               size_t max_size;
 
@@ -578,7 +586,7 @@ m68hc11eepr_io_write_buffer (struct hw *me,
 	    }
 	  controller->eeprom_wmode = 0;
 	}
-      cpu->ios[M6811_PPROG] = val;
+      m68hc11_cpu->ios[M6811_PPROG] = val;
       return 1;
     }
 
@@ -597,7 +605,7 @@ m68hc11eepr_io_write_buffer (struct hw *me,
      (cpu not running).  */
   if (cpu_is_running (cpu))
     {
-      if ((cpu->ios[M6811_PPROG] & M6811_EELAT) == 0)
+      if ((m68hc11_cpu->ios[M6811_PPROG] & M6811_EELAT) == 0)
 	{
 	  sim_memory_error (cpu, SIM_SIGSEGV, base,
 			    "EEprom not configured for writing");
diff --git a/sim/m68hc11/dv-m68hc11sio.c b/sim/m68hc11/dv-m68hc11sio.c
index 82629713b97e..f61d284184a8 100644
--- a/sim/m68hc11/dv-m68hc11sio.c
+++ b/sim/m68hc11/dv-m68hc11sio.c
@@ -184,11 +184,13 @@ m68hc11sio_port_event (struct hw *me,
   SIM_DESC sd;
   struct m68hc11sio *controller;
   sim_cpu *cpu;
+  struct m68hc11_sim_cpu *m68hc11_cpu;
   uint8_t val;
   
   controller = hw_data (me);
   sd         = hw_system (me);
   cpu        = STATE_CPU (sd, 0);  
+  m68hc11_cpu  = M68HC11_SIM_CPU (cpu);
   switch (my_port)
     {
     case RESET_PORT:
@@ -204,7 +206,7 @@ m68hc11sio_port_event (struct hw *me,
         m68hc11sio_io_write_buffer (me, &val, io_map,
                                     (unsigned_word) M6811_SCCR2, 1);
         
-        cpu->ios[M6811_SCSR]    = M6811_TC | M6811_TDRE;
+        m68hc11_cpu->ios[M6811_SCSR]    = M6811_TC | M6811_TDRE;
         controller->rx_char     = 0;
         controller->tx_char     = 0;
         controller->tx_has_char = 0;
@@ -222,7 +224,7 @@ m68hc11sio_port_event (struct hw *me,
 
         /* In bootstrap mode, initialize the SCI to 1200 bauds to
            simulate some initial setup by the internal rom.  */
-        if (((cpu->ios[M6811_HPRIO]) & (M6811_SMOD | M6811_MDA)) == M6811_SMOD)
+        if (((m68hc11_cpu->ios[M6811_HPRIO]) & (M6811_SMOD | M6811_MDA)) == M6811_SMOD)
           {
             unsigned char val = 0x33;
             
@@ -248,6 +250,7 @@ m68hc11sio_rx_poll (struct hw *me, void *data)
   SIM_DESC sd;
   struct m68hc11sio *controller;
   sim_cpu *cpu;
+  struct m68hc11_sim_cpu *m68hc11_cpu;
   char cc;
   int cnt;
   int check_interrupt = 0;
@@ -255,6 +258,7 @@ m68hc11sio_rx_poll (struct hw *me, void *data)
   controller = hw_data (me);
   sd         = hw_system (me);
   cpu        = STATE_CPU (sd, 0);
+  m68hc11_cpu  = M68HC11_SIM_CPU (cpu);
   switch (controller->backend)
     {
     case sio_tcp:
@@ -278,10 +282,10 @@ m68hc11sio_rx_poll (struct hw *me, void *data)
   if (cnt == 1)
     {
       /* Raise the overrun flag if the previous character was not read.  */
-      if (cpu->ios[M6811_SCSR] & M6811_RDRF)
-        cpu->ios[M6811_SCSR] |= M6811_OR;
+      if (m68hc11_cpu->ios[M6811_SCSR] & M6811_RDRF)
+        m68hc11_cpu->ios[M6811_SCSR] |= M6811_OR;
 
-      cpu->ios[M6811_SCSR]     |= M6811_RDRF;
+      m68hc11_cpu->ios[M6811_SCSR]     |= M6811_RDRF;
       controller->rx_char       = cc;
       controller->rx_clear_scsr = 0;
       check_interrupt = 1;
@@ -298,7 +302,7 @@ m68hc11sio_rx_poll (struct hw *me, void *data)
       controller->rx_poll_event = 0;
     }
 
-  if (cpu->ios[M6811_SCCR2] & M6811_RE)
+  if (m68hc11_cpu->ios[M6811_SCCR2] & M6811_RE)
     {
       unsigned long clock_cycle;
 
@@ -311,7 +315,7 @@ m68hc11sio_rx_poll (struct hw *me, void *data)
     }
 
   if (check_interrupt)
-      interrupts_update_pending (&cpu->cpu_interrupts);
+      interrupts_update_pending (&m68hc11_cpu->cpu_interrupts);
 }
 
 
@@ -321,19 +325,21 @@ m68hc11sio_tx_poll (struct hw *me, void *data)
   SIM_DESC sd;
   struct m68hc11sio *controller;
   sim_cpu *cpu;
+  struct m68hc11_sim_cpu *m68hc11_cpu;
   
   controller = hw_data (me);
   sd         = hw_system (me);
   cpu        = STATE_CPU (sd, 0);
+  m68hc11_cpu  = M68HC11_SIM_CPU (cpu);
 
-  cpu->ios[M6811_SCSR] |= M6811_TDRE;
-  cpu->ios[M6811_SCSR] |= M6811_TC;
+  m68hc11_cpu->ios[M6811_SCSR] |= M6811_TDRE;
+  m68hc11_cpu->ios[M6811_SCSR] |= M6811_TC;
   
   /* Transmitter is enabled and we have something to send.  */
-  if ((cpu->ios[M6811_SCCR2] & M6811_TE) && controller->tx_has_char)
+  if ((m68hc11_cpu->ios[M6811_SCCR2] & M6811_TE) && controller->tx_has_char)
     {
-      cpu->ios[M6811_SCSR] &= ~M6811_TDRE;
-      cpu->ios[M6811_SCSR] &= ~M6811_TC;
+      m68hc11_cpu->ios[M6811_SCSR] &= ~M6811_TDRE;
+      m68hc11_cpu->ios[M6811_SCSR] &= ~M6811_TC;
       controller->tx_has_char = 0;
       switch (controller->backend)
         {
@@ -357,8 +363,8 @@ m68hc11sio_tx_poll (struct hw *me, void *data)
       controller->tx_poll_event = 0;
     }
   
-  if ((cpu->ios[M6811_SCCR2] & M6811_TE)
-      && ((cpu->ios[M6811_SCSR] & M6811_TC) == 0))
+  if ((m68hc11_cpu->ios[M6811_SCCR2] & M6811_TE)
+      && ((m68hc11_cpu->ios[M6811_SCSR] & M6811_TC) == 0))
     {
       unsigned long clock_cycle;
       
@@ -370,7 +376,7 @@ m68hc11sio_tx_poll (struct hw *me, void *data)
                                                            NULL);
     }
 
-  interrupts_update_pending (&cpu->cpu_interrupts);
+  interrupts_update_pending (&m68hc11_cpu->cpu_interrupts);
 }
 
 /* Descriptions of the SIO I/O ports.  These descriptions are only used to
@@ -423,33 +429,35 @@ m68hc11sio_info (struct hw *me)
   SIM_DESC sd;
   uint16_t base = 0;
   sim_cpu *cpu;
+  struct m68hc11_sim_cpu *m68hc11_cpu;
   struct m68hc11sio *controller;
   uint8_t val;
   long clock_cycle;
   
   sd = hw_system (me);
   cpu = STATE_CPU (sd, 0);
+  m68hc11_cpu = M68HC11_SIM_CPU (cpu);
   controller = hw_data (me);
   
   sim_io_printf (sd, "M68HC11 SIO:\n");
 
   base = cpu_get_io_base (cpu);
 
-  val  = cpu->ios[M6811_BAUD];
+  val  = m68hc11_cpu->ios[M6811_BAUD];
   print_io_byte (sd, "BAUD ", baud_desc, val, base + M6811_BAUD);
   sim_io_printf (sd, " (%ld baud)\n",
-                 (cpu->cpu_frequency / 4) / controller->baud_cycle);
+                 (m68hc11_cpu->cpu_frequency / 4) / controller->baud_cycle);
 
-  val = cpu->ios[M6811_SCCR1];
+  val = m68hc11_cpu->ios[M6811_SCCR1];
   print_io_byte (sd, "SCCR1", sccr1_desc, val, base + M6811_SCCR1);
   sim_io_printf (sd, "  (%d bits) (%dN1)\n",
                  controller->data_length, controller->data_length - 2);
 
-  val = cpu->ios[M6811_SCCR2];
+  val = m68hc11_cpu->ios[M6811_SCCR2];
   print_io_byte (sd, "SCCR2", sccr2_desc, val, base + M6811_SCCR2);
   sim_io_printf (sd, "\n");
 
-  val = cpu->ios[M6811_SCSR];
+  val = m68hc11_cpu->ios[M6811_SCSR];
   print_io_byte (sd, "SCSR ", scsr_desc, val, base + M6811_SCSR);
   sim_io_printf (sd, "\n");
 
@@ -499,30 +507,32 @@ m68hc11sio_io_read_buffer (struct hw *me,
   SIM_DESC sd;
   struct m68hc11sio *controller;
   sim_cpu *cpu;
+  struct m68hc11_sim_cpu *m68hc11_cpu;
   uint8_t val;
   
   HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
 
   sd  = hw_system (me);
   cpu = STATE_CPU (sd, 0);
+  m68hc11_cpu = M68HC11_SIM_CPU (cpu);
   controller = hw_data (me);
 
   switch (base)
     {
     case M6811_SCSR:
-      controller->rx_clear_scsr = cpu->ios[M6811_SCSR]
+      controller->rx_clear_scsr = m68hc11_cpu->ios[M6811_SCSR]
         & (M6811_RDRF | M6811_IDLE | M6811_OR | M6811_NF | M6811_FE);
       
     case M6811_BAUD:
     case M6811_SCCR1:
     case M6811_SCCR2:
-      val = cpu->ios[base];
+      val = m68hc11_cpu->ios[base];
       break;
       
     case M6811_SCDR:
       if (controller->rx_clear_scsr)
         {
-          cpu->ios[M6811_SCSR] &= ~controller->rx_clear_scsr;
+          m68hc11_cpu->ios[M6811_SCSR] &= ~controller->rx_clear_scsr;
         }
       val = controller->rx_char;
       break;
@@ -544,12 +554,14 @@ m68hc11sio_io_write_buffer (struct hw *me,
   SIM_DESC sd;
   struct m68hc11sio *controller;
   sim_cpu *cpu;
+  struct m68hc11_sim_cpu *m68hc11_cpu;
   uint8_t val;
 
   HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
 
   sd  = hw_system (me);
   cpu = STATE_CPU (sd, 0);
+  m68hc11_cpu = M68HC11_SIM_CPU (cpu);
   controller = hw_data (me);
   
   val = *((const uint8_t*) source);
@@ -560,7 +572,7 @@ m68hc11sio_io_write_buffer (struct hw *me,
         long divisor;
         long baud;
 
-        cpu->ios[M6811_BAUD] = val;        
+        m68hc11_cpu->ios[M6811_BAUD] = val;
         switch (val & (M6811_SCP1|M6811_SCP0))
           {
           case M6811_BAUD_DIV_1:
@@ -583,7 +595,7 @@ m68hc11sio_io_write_buffer (struct hw *me,
         val &= (M6811_SCR2|M6811_SCR1|M6811_SCR0);
         divisor *= (1 << val);
 
-        baud = (cpu->cpu_frequency / 4) / divisor;
+        baud = (m68hc11_cpu->cpu_frequency / 4) / divisor;
 
         HW_TRACE ((me, "divide rate %ld, baud rate %ld",
                    divisor, baud));
@@ -599,7 +611,7 @@ m68hc11sio_io_write_buffer (struct hw *me,
         else
           controller->data_length = 10;
 
-        cpu->ios[M6811_SCCR1] = val;
+        m68hc11_cpu->ios[M6811_SCCR1] = val;
       }
       break;
       
@@ -607,9 +619,9 @@ m68hc11sio_io_write_buffer (struct hw *me,
       if ((val & M6811_RE) == 0)
         {
           val &= ~(M6811_RDRF|M6811_IDLE|M6811_OR|M6811_NF|M6811_NF);
-          val |= (cpu->ios[M6811_SCCR2]
+          val |= (m68hc11_cpu->ios[M6811_SCCR2]
                   & (M6811_RDRF|M6811_IDLE|M6811_OR|M6811_NF|M6811_NF));
-          cpu->ios[M6811_SCCR2] = val;
+          m68hc11_cpu->ios[M6811_SCCR2] = val;
           break;
         }
 
@@ -625,8 +637,8 @@ m68hc11sio_io_write_buffer (struct hw *me,
                                                                m68hc11sio_rx_poll,
                                                                NULL);
         }      
-      cpu->ios[M6811_SCCR2] = val;
-      interrupts_update_pending (&cpu->cpu_interrupts);
+      m68hc11_cpu->ios[M6811_SCCR2] = val;
+      interrupts_update_pending (&m68hc11_cpu->cpu_interrupts);
       break;
 
       /* No effect.  */
@@ -634,14 +646,14 @@ m68hc11sio_io_write_buffer (struct hw *me,
       return 1;
       
     case M6811_SCDR:
-      if (!(cpu->ios[M6811_SCSR] & M6811_TDRE))
+      if (!(m68hc11_cpu->ios[M6811_SCSR] & M6811_TDRE))
         {
           return 0;
         }
 
       controller->tx_char     = val;
       controller->tx_has_char = 1;
-      if ((cpu->ios[M6811_SCCR2] & M6811_TE)
+      if ((m68hc11_cpu->ios[M6811_SCCR2] & M6811_TE)
           && controller->tx_poll_event == 0)
         {
           m68hc11sio_tx_poll (me, NULL);
diff --git a/sim/m68hc11/dv-m68hc11spi.c b/sim/m68hc11/dv-m68hc11spi.c
index d587411692a5..f9d482bff413 100644
--- a/sim/m68hc11/dv-m68hc11spi.c
+++ b/sim/m68hc11/dv-m68hc11spi.c
@@ -193,12 +193,13 @@ m68hc11spi_port_event (struct hw *me,
 static void
 set_bit_port (struct hw *me, sim_cpu *cpu, int port, int mask, int value)
 {
+  struct m68hc11_sim_cpu *m68hc11_cpu = M68HC11_SIM_CPU (cpu);
   uint8_t val;
   
   if (value)
-    val = cpu->ios[port] | mask;
+    val = m68hc11_cpu->ios[port] | mask;
   else
-    val = cpu->ios[port] & ~mask;
+    val = m68hc11_cpu->ios[port] & ~mask;
 
   /* Set the new value and post an event to inform other devices
      that pin 'port' changed.  */
@@ -242,11 +243,13 @@ m68hc11spi_clock (struct hw *me, void *data)
   SIM_DESC sd;
   struct m68hc11spi* controller;
   sim_cpu *cpu;
+  struct m68hc11_sim_cpu *m68hc11_cpu;
   int check_interrupt = 0;
   
   controller = hw_data (me);
   sd         = hw_system (me);
   cpu        = STATE_CPU (sd, 0);
+  m68hc11_cpu  = M68HC11_SIM_CPU (cpu);
 
   /* Cleanup current event.  */
   if (controller->spi_event)
@@ -289,8 +292,8 @@ m68hc11spi_clock (struct hw *me, void *data)
   if (controller->mode == SPI_START_BIT && controller->tx_bit < 0)
     {
       controller->rx_clear_scsr = 0;
-      cpu->ios[M6811_SPSR] |= M6811_SPIF;
-      if (cpu->ios[M6811_SPCR] & M6811_SPIE)
+      m68hc11_cpu->ios[M6811_SPSR] |= M6811_SPIF;
+      if (m68hc11_cpu->ios[M6811_SPCR] & M6811_SPIE)
         check_interrupt = 1;
     }
   else
@@ -301,7 +304,7 @@ m68hc11spi_clock (struct hw *me, void *data)
     }
 
   if (check_interrupt)
-    interrupts_update_pending (&cpu->cpu_interrupts);
+    interrupts_update_pending (&m68hc11_cpu->cpu_interrupts);
 }
 
 /* Flags of the SPCR register.  */
@@ -332,22 +335,24 @@ m68hc11spi_info (struct hw *me)
   SIM_DESC sd;
   uint16_t base = 0;
   sim_cpu *cpu;
+  struct m68hc11_sim_cpu *m68hc11_cpu;
   struct m68hc11spi *controller;
   uint8_t val;
   
   sd = hw_system (me);
   cpu = STATE_CPU (sd, 0);
+  m68hc11_cpu = M68HC11_SIM_CPU (cpu);
   controller = hw_data (me);
   
   sim_io_printf (sd, "M68HC11 SPI:\n");
 
   base = cpu_get_io_base (cpu);
 
-  val = cpu->ios[M6811_SPCR];
+  val = m68hc11_cpu->ios[M6811_SPCR];
   print_io_byte (sd, "SPCR", spcr_desc, val, base + M6811_SPCR);
   sim_io_printf (sd, "\n");
 
-  val = cpu->ios[M6811_SPSR];
+  val = m68hc11_cpu->ios[M6811_SPSR];
   print_io_byte (sd, "SPSR", spsr_desc, val, base + M6811_SPSR);
   sim_io_printf (sd, "\n");
 
@@ -388,30 +393,32 @@ m68hc11spi_io_read_buffer (struct hw *me,
   SIM_DESC sd;
   struct m68hc11spi *controller;
   sim_cpu *cpu;
+  struct m68hc11_sim_cpu *m68hc11_cpu;
   uint8_t val;
   
   HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
 
   sd  = hw_system (me);
   cpu = STATE_CPU (sd, 0);
+  m68hc11_cpu = M68HC11_SIM_CPU (cpu);
   controller = hw_data (me);
 
   switch (base)
     {
     case M6811_SPSR:
-      controller->rx_clear_scsr = cpu->ios[M6811_SCSR]
+      controller->rx_clear_scsr = m68hc11_cpu->ios[M6811_SCSR]
         & (M6811_SPIF | M6811_WCOL | M6811_MODF);
       
     case M6811_SPCR:
-      val = cpu->ios[base];
+      val = m68hc11_cpu->ios[base];
       break;
       
     case M6811_SPDR:
       if (controller->rx_clear_scsr)
         {
-          cpu->ios[M6811_SPSR] &= ~controller->rx_clear_scsr;
+          m68hc11_cpu->ios[M6811_SPSR] &= ~controller->rx_clear_scsr;
           controller->rx_clear_scsr = 0;
-          interrupts_update_pending (&cpu->cpu_interrupts);
+          interrupts_update_pending (&m68hc11_cpu->cpu_interrupts);
         }
       val = controller->rx_char;
       break;
@@ -433,19 +440,21 @@ m68hc11spi_io_write_buffer (struct hw *me,
   SIM_DESC sd;
   struct m68hc11spi *controller;
   sim_cpu *cpu;
+  struct m68hc11_sim_cpu *m68hc11_cpu;
   uint8_t val;
 
   HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
 
   sd  = hw_system (me);
   cpu = STATE_CPU (sd, 0);
+  m68hc11_cpu = M68HC11_SIM_CPU (cpu);
   controller = hw_data (me);
   
   val = *((const uint8_t*) source);
   switch (base)
     {
     case M6811_SPCR:
-      cpu->ios[M6811_SPCR] = val;
+      m68hc11_cpu->ios[M6811_SPCR] = val;
 
       /* The SPI clock rate is 2, 4, 16, 32 of the internal CPU clock.
          We have to drive the clock pin and need a 2x faster clock.  */
@@ -484,23 +493,23 @@ m68hc11spi_io_write_buffer (struct hw *me,
       break;
       
     case M6811_SPDR:
-      if (!(cpu->ios[M6811_SPCR] & M6811_SPE))
+      if (!(m68hc11_cpu->ios[M6811_SPCR] & M6811_SPE))
         {
           return 0;
         }
 
       if (controller->rx_clear_scsr)
         {
-          cpu->ios[M6811_SPSR] &= ~controller->rx_clear_scsr;
+          m68hc11_cpu->ios[M6811_SPSR] &= ~controller->rx_clear_scsr;
           controller->rx_clear_scsr = 0;
-          interrupts_update_pending (&cpu->cpu_interrupts);
+          interrupts_update_pending (&m68hc11_cpu->cpu_interrupts);
         }
 
       /* If transfer is taking place, a write to SPDR
          generates a collision.  */
       if (controller->spi_event)
         {
-          cpu->ios[M6811_SPSR] |= M6811_WCOL;
+          m68hc11_cpu->ios[M6811_SPSR] |= M6811_WCOL;
           break;
         }
 
@@ -513,10 +522,10 @@ m68hc11spi_io_write_buffer (struct hw *me,
 
       /* Toggle clock pin internal value when CPHA is 0 so that
          it will really change in the middle of a bit.  */
-      if (!(cpu->ios[M6811_SPCR] & M6811_CPHA))
+      if (!(m68hc11_cpu->ios[M6811_SPCR] & M6811_CPHA))
         controller->clk_pin = ~controller->clk_pin;
 
-      cpu->ios[M6811_SPDR] = val;
+      m68hc11_cpu->ios[M6811_SPDR] = val;
 
       /* Activate transmission.  */
       m68hc11spi_clock (me, NULL);
diff --git a/sim/m68hc11/dv-m68hc11tim.c b/sim/m68hc11/dv-m68hc11tim.c
index a2a6603e79a3..15080c579623 100644
--- a/sim/m68hc11/dv-m68hc11tim.c
+++ b/sim/m68hc11/dv-m68hc11tim.c
@@ -158,12 +158,14 @@ m68hc11tim_port_event (struct hw *me,
   SIM_DESC sd;
   struct m68hc11tim *controller;
   sim_cpu *cpu;
+  struct m68hc11_sim_cpu *m68hc11_cpu;
   uint8_t val;
   uint16_t tcnt;
 
   controller = hw_data (me);
   sd         = hw_system (me);
   cpu        = STATE_CPU (sd, 0);
+  m68hc11_cpu  = M68HC11_SIM_CPU (cpu);
   switch (my_port)
     {
     case RESET_PORT:
@@ -198,7 +200,7 @@ m68hc11tim_port_event (struct hw *me,
            the timer events (overflow and RTI clock).  The pending
            flags (TFLG2) must be cleared explicitly here.  */
         val = 0;
-        cpu->ios[M6811_TFLG2] = 0;
+        m68hc11_cpu->ios[M6811_TFLG2] = 0;
         m68hc11tim_io_write_buffer (me, &val, io_map,
                                     (unsigned_word) M6811_TMSK2, 1);
         m68hc11tim_io_write_buffer (me, &val, io_map,
@@ -207,15 +209,15 @@ m68hc11tim_port_event (struct hw *me,
       }
 
     case CAPTURE:
-      tcnt = (uint16_t) ((cpu->cpu_absolute_cycle - controller->tcnt_adjust)
+      tcnt = (uint16_t) ((m68hc11_cpu->cpu_absolute_cycle - controller->tcnt_adjust)
                        / controller->clock_prescaler);
       switch (level)
         {
         case M6811_TIC1:
         case M6811_TIC2:
         case M6811_TIC3:
-          cpu->ios[level] = tcnt >> 8;
-          cpu->ios[level + 1] = tcnt;
+          m68hc11_cpu->ios[level] = tcnt >> 8;
+          m68hc11_cpu->ios[level + 1] = tcnt;
           break;
 
         default:
@@ -244,6 +246,7 @@ m68hc11tim_timer_event (struct hw *me, void *data)
   SIM_DESC sd;
   struct m68hc11tim *controller;
   sim_cpu *cpu;
+  struct m68hc11_sim_cpu *m68hc11_cpu;
   enum event_type type;
   unsigned long delay;
   struct hw_event **eventp;
@@ -260,6 +263,7 @@ m68hc11tim_timer_event (struct hw *me, void *data)
   controller = hw_data (me);
   sd         = hw_system (me);
   cpu        = STATE_CPU (sd, 0);
+  m68hc11_cpu  = M68HC11_SIM_CPU (cpu);
   type       = (enum event_type) ((uintptr_t) data) & 0x0FF;
   events     = STATE_EVENTS (sd);
 
@@ -271,7 +275,7 @@ m68hc11tim_timer_event (struct hw *me, void *data)
       delay  = controller->cop_delay;
       delay  = controller->cop_prev_interrupt + controller->cop_delay;
       controller->cop_prev_interrupt = delay;
-      delay  = delay - cpu->cpu_absolute_cycle;
+      delay  = delay - m68hc11_cpu->cpu_absolute_cycle;
       check_interrupt = 1;
       delay += events->nr_ticks_to_process;
       break;
@@ -282,18 +286,18 @@ m68hc11tim_timer_event (struct hw *me, void *data)
       
       if (((uintptr_t) data & 0x0100) == 0)
         {
-          cpu->ios[M6811_TFLG2] |= M6811_RTIF;
+          m68hc11_cpu->ios[M6811_TFLG2] |= M6811_RTIF;
           check_interrupt = 1;
           controller->rti_prev_interrupt = delay;
           delay += controller->rti_delay;
         }
-      delay = delay - cpu->cpu_absolute_cycle;
+      delay = delay - m68hc11_cpu->cpu_absolute_cycle;
       delay += events->nr_ticks_to_process;
       break;
 
     case OVERFLOW_EVENT:
       /* Compute the 68HC11 internal free running counter.  */
-      tcnt_internal = (cpu->cpu_absolute_cycle - controller->tcnt_adjust);
+      tcnt_internal = (m68hc11_cpu->cpu_absolute_cycle - controller->tcnt_adjust);
 
       /* We must take into account the prescaler that comes
          before the counter (it's a power of 2).  */
@@ -310,7 +314,7 @@ m68hc11tim_timer_event (struct hw *me, void *data)
       eventp = &controller->tof_timer_event;
       if (((uintptr_t) data & 0x100) == 0)
         {
-          cpu->ios[M6811_TFLG2] |= M6811_TOF;
+          m68hc11_cpu->ios[M6811_TFLG2] |= M6811_TOF;
           check_interrupt = 1;
         }
       break;
@@ -318,8 +322,8 @@ m68hc11tim_timer_event (struct hw *me, void *data)
     case COMPARE_EVENT:
       /* Compute value of TCNT register (64-bit precision) at beginning
          and end of instruction.  */
-      tcnt_insn_end = (cpu->cpu_absolute_cycle - controller->tcnt_adjust);
-      tcnt_insn_start = (tcnt_insn_end - cpu->cpu_current_cycle);
+      tcnt_insn_end = (m68hc11_cpu->cpu_absolute_cycle - controller->tcnt_adjust);
+      tcnt_insn_start = (tcnt_insn_end - m68hc11_cpu->cpu_current_cycle);
 
       /* TCNT value at beginning of current instruction.  */
       tcnt_prev = (tcnt_insn_start / controller->clock_prescaler) & 0x0ffff;
@@ -332,7 +336,7 @@ m68hc11tim_timer_event (struct hw *me, void *data)
       tcnt_internal = tcnt_insn_end;
       tcnt_internal &= 0x0ffff * controller->clock_prescaler;
 
-      flags = cpu->ios[M6811_TMSK1];
+      flags = m68hc11_cpu->ios[M6811_TMSK1];
       mask  = 0x80;
       delay = 65536 * controller->clock_prescaler;
 
@@ -343,7 +347,7 @@ m68hc11tim_timer_event (struct hw *me, void *data)
         {
           unsigned long compare;
 
-          compare = (cpu->ios[i] << 8) + cpu->ios[i + 1];
+          compare = (m68hc11_cpu->ios[i] << 8) + m68hc11_cpu->ios[i + 1];
 
           /* See if compare is reached; handle wrap arround.  */
           if ((compare >= tcnt_prev && compare <= tcnt && tcnt_prev < tcnt)
@@ -357,13 +361,13 @@ m68hc11tim_timer_event (struct hw *me, void *data)
               else
                 dt = tcnt - compare;
 
-              cpu->ios[M6811_TFLG1] |= mask;
+              m68hc11_cpu->ios[M6811_TFLG1] |= mask;
 
               /* Raise interrupt now at the correct CPU cycle so that
                  we can find the interrupt latency.  */
-              cpu->cpu_absolute_cycle -= dt;
-              interrupts_update_pending (&cpu->cpu_interrupts);
-              cpu->cpu_absolute_cycle += dt;
+              m68hc11_cpu->cpu_absolute_cycle -= dt;
+              interrupts_update_pending (&m68hc11_cpu->cpu_interrupts);
+              m68hc11_cpu->cpu_absolute_cycle += dt;
             }
 
           /* Compute how many times for the next match.
@@ -408,7 +412,7 @@ m68hc11tim_timer_event (struct hw *me, void *data)
     }
 
   if (check_interrupt)
-    interrupts_update_pending (&cpu->cpu_interrupts);
+    interrupts_update_pending (&m68hc11_cpu->cpu_interrupts);
 }
 
 
@@ -473,7 +477,7 @@ io_reg_desc pactl_desc[] = {
 static double
 to_realtime (sim_cpu *cpu, int64_t t)
 {
-  return (double) (t) / (double) (cpu->cpu_frequency / 4);
+  return (double) (t) / (double) (M68HC11_SIM_CPU (cpu)->cpu_frequency / 4);
 }
 
 const char*
@@ -537,12 +541,14 @@ m68hc11tim_info (struct hw *me)
   SIM_DESC sd;
   uint16_t base = 0;
   sim_cpu *cpu;
+  struct m68hc11_sim_cpu *m68hc11_cpu;
   struct m68hc11tim *controller;
   uint8_t val;
   uint16_t val16;
   
   sd = hw_system (me);
   cpu = STATE_CPU (sd, 0);
+  m68hc11_cpu = M68HC11_SIM_CPU (cpu);
   controller = hw_data (me);
   
   sim_io_printf (sd, "M68HC11 Timer:\n");
@@ -550,68 +556,68 @@ m68hc11tim_info (struct hw *me)
   base = cpu_get_io_base (cpu);
 
   /* Info for TIC1 */
-  val16  = (cpu->ios[M6811_TIC1_H] << 8) + cpu->ios[M6811_TIC1_L];
+  val16  = (m68hc11_cpu->ios[M6811_TIC1_H] << 8) + m68hc11_cpu->ios[M6811_TIC1_L];
   print_io_word (sd, "TIC1 ", 0, val16, base + M6811_TIC1);
   sim_io_printf (sd, "\n");
 
   /* Info for TIC2 */
-  val16  = (cpu->ios[M6811_TIC2_H] << 8) + cpu->ios[M6811_TIC2_L];
+  val16  = (m68hc11_cpu->ios[M6811_TIC2_H] << 8) + m68hc11_cpu->ios[M6811_TIC2_L];
   print_io_word (sd, "TIC2 ", 0, val16, base + M6811_TIC2);
   sim_io_printf (sd, "\n");
 
   /* Info for TIC3 */
-  val16  = (cpu->ios[M6811_TIC3_H] << 8) + cpu->ios[M6811_TIC3_L];
+  val16  = (m68hc11_cpu->ios[M6811_TIC3_H] << 8) + m68hc11_cpu->ios[M6811_TIC3_L];
   print_io_word (sd, "TIC3 ", 0, val16, base + M6811_TIC3);
   sim_io_printf (sd, "\n");
 
   /* Info for TOC1 */
-  val16  = (cpu->ios[M6811_TOC1_H] << 8) + cpu->ios[M6811_TOC1_L];
+  val16  = (m68hc11_cpu->ios[M6811_TOC1_H] << 8) + m68hc11_cpu->ios[M6811_TOC1_L];
   print_io_word (sd, "TOC1 ", 0, val16, base + M6811_TOC1);
   sim_io_printf (sd, "\n");
 
   /* Info for TOC2 */
-  val16  = (cpu->ios[M6811_TOC2_H] << 8) + cpu->ios[M6811_TOC2_L];
+  val16  = (m68hc11_cpu->ios[M6811_TOC2_H] << 8) + m68hc11_cpu->ios[M6811_TOC2_L];
   print_io_word (sd, "TOC2 ", 0, val16, base + M6811_TOC2);
   sim_io_printf (sd, "\n");
 
   /* Info for TOC3 */
-  val16  = (cpu->ios[M6811_TOC3_H] << 8) + cpu->ios[M6811_TOC3_L];
+  val16  = (m68hc11_cpu->ios[M6811_TOC3_H] << 8) + m68hc11_cpu->ios[M6811_TOC3_L];
   print_io_word (sd, "TOC3 ", 0, val16, base + M6811_TOC3);
   sim_io_printf (sd, "\n");
 
   /* Info for TOC4 */
-  val16  = (cpu->ios[M6811_TOC4_H] << 8) + cpu->ios[M6811_TOC4_L];
+  val16  = (m68hc11_cpu->ios[M6811_TOC4_H] << 8) + m68hc11_cpu->ios[M6811_TOC4_L];
   print_io_word (sd, "TOC4 ", 0, val16, base + M6811_TOC4);
   sim_io_printf (sd, "\n");
 
   /* Info for TOC5 */
-  val16  = (cpu->ios[M6811_TOC5_H] << 8) + cpu->ios[M6811_TOC5_L];
+  val16  = (m68hc11_cpu->ios[M6811_TOC5_H] << 8) + m68hc11_cpu->ios[M6811_TOC5_L];
   print_io_word (sd, "TOC5 ", 0, val16, base + M6811_TOC5);
   sim_io_printf (sd, "\n");
 
   /* Info for TMSK1 */
-  val  = cpu->ios[M6811_TMSK1];
+  val  = m68hc11_cpu->ios[M6811_TMSK1];
   print_io_byte (sd, "TMSK1 ", tmsk1_desc, val, base + M6811_TMSK1);
   sim_io_printf (sd, "\n");
 
   /* Info for TFLG1 */
-  val = cpu->ios[M6811_TFLG1];
+  val = m68hc11_cpu->ios[M6811_TFLG1];
   print_io_byte (sd, "TFLG1", tflg1_desc, val, base + M6811_TFLG1);
   sim_io_printf (sd, "\n");
 
-  val  = cpu->ios[M6811_TMSK2];
+  val  = m68hc11_cpu->ios[M6811_TMSK2];
   print_io_byte (sd, "TMSK2 ", tmsk2_desc, val, base + M6811_TMSK2);
   sim_io_printf (sd, "\n");
 
-  val = cpu->ios[M6811_TFLG2];
+  val = m68hc11_cpu->ios[M6811_TFLG2];
   print_io_byte (sd, "TFLG2", tflg2_desc, val, base + M6811_TFLG2);
   sim_io_printf (sd, "\n");
 
-  val = cpu->ios[M6811_PACTL];
+  val = m68hc11_cpu->ios[M6811_PACTL];
   print_io_byte (sd, "PACTL", pactl_desc, val, base + M6811_PACTL);
   sim_io_printf (sd, "\n");
 
-  val = cpu->ios[M6811_PACNT];
+  val = m68hc11_cpu->ios[M6811_PACNT];
   print_io_byte (sd, "PACNT", 0, val, base + M6811_PACNT);
   sim_io_printf (sd, "\n");
 
@@ -643,6 +649,7 @@ m68hc11tim_io_read_buffer (struct hw *me,
   SIM_DESC sd;
   struct m68hc11tim *controller;
   sim_cpu *cpu;
+  struct m68hc11_sim_cpu *m68hc11_cpu;
   uint8_t val;
   unsigned cnt = 0;
   
@@ -650,6 +657,7 @@ m68hc11tim_io_read_buffer (struct hw *me,
 
   sd  = hw_system (me);
   cpu = STATE_CPU (sd, 0);
+  m68hc11_cpu = M68HC11_SIM_CPU (cpu);
   controller = hw_data (me);
 
   while (nr_bytes)
@@ -660,17 +668,17 @@ m68hc11tim_io_read_buffer (struct hw *me,
              Reading in a 16-bit register will be split in two accesses
              but this will be atomic within the simulator.  */
         case M6811_TCTN_H:
-          val = (uint8_t) ((cpu->cpu_absolute_cycle - controller->tcnt_adjust)
-                         / (controller->clock_prescaler * 256));
+          val = (uint8_t) ((m68hc11_cpu->cpu_absolute_cycle - controller->tcnt_adjust)
+                           / (controller->clock_prescaler * 256));
           break;
 
         case M6811_TCTN_L:
-          val = (uint8_t) ((cpu->cpu_absolute_cycle - controller->tcnt_adjust)
-                         / controller->clock_prescaler);
+          val = (uint8_t) ((m68hc11_cpu->cpu_absolute_cycle - controller->tcnt_adjust)
+                           / controller->clock_prescaler);
           break;
 
         default:
-          val = cpu->ios[base];
+          val = m68hc11_cpu->ios[base];
           break;
         }
       *((uint8_t*) dest) = val;
@@ -692,6 +700,7 @@ m68hc11tim_io_write_buffer (struct hw *me,
   SIM_DESC sd;
   struct m68hc11tim *controller;
   sim_cpu *cpu;
+  struct m68hc11_sim_cpu *m68hc11_cpu;
   uint8_t val, n;
   int64_t adj;
   int reset_compare = 0;
@@ -702,6 +711,7 @@ m68hc11tim_io_write_buffer (struct hw *me,
 
   sd  = hw_system (me);
   cpu = STATE_CPU (sd, 0);
+  m68hc11_cpu = M68HC11_SIM_CPU (cpu);
   controller = hw_data (me);
 
   while (nr_bytes)
@@ -714,9 +724,9 @@ m68hc11tim_io_write_buffer (struct hw *me,
              to obtain the timer current value.  Computation must be made
              in 64-bit to avoid overflow problems.  */
         case M6811_TCTN_L:
-          adj = ((cpu->cpu_absolute_cycle - controller->tcnt_adjust)
+          adj = ((m68hc11_cpu->cpu_absolute_cycle - controller->tcnt_adjust)
                  / (controller->clock_prescaler * (int64_t) 256)) & 0x0FF;
-          adj = cpu->cpu_absolute_cycle
+          adj = m68hc11_cpu->cpu_absolute_cycle
             - (adj * controller->clock_prescaler * (int64_t) 256)
             - ((int64_t) adj * controller->clock_prescaler);
           controller->tcnt_adjust = adj;
@@ -725,9 +735,9 @@ m68hc11tim_io_write_buffer (struct hw *me,
           break;
 
         case M6811_TCTN_H:
-          adj = ((cpu->cpu_absolute_cycle - controller->tcnt_adjust)
+          adj = ((m68hc11_cpu->cpu_absolute_cycle - controller->tcnt_adjust)
                  / controller->clock_prescaler) & 0x0ff;
-          adj = cpu->cpu_absolute_cycle
+          adj = m68hc11_cpu->cpu_absolute_cycle
             - ((int64_t) val * controller->clock_prescaler * (int64_t) 256)
             - (adj * controller->clock_prescaler);
           controller->tcnt_adjust = adj;
@@ -738,10 +748,10 @@ m68hc11tim_io_write_buffer (struct hw *me,
         case M6811_TMSK2:
 
           /* Timer prescaler cannot be changed after 64 bus cycles.  */
-          if (cpu->cpu_absolute_cycle >= 64)
+          if (m68hc11_cpu->cpu_absolute_cycle >= 64)
             {
               val &= ~(M6811_PR1 | M6811_PR0);
-              val |= cpu->ios[M6811_TMSK2] & (M6811_PR1 | M6811_PR0);
+              val |= m68hc11_cpu->ios[M6811_TMSK2] & (M6811_PR1 | M6811_PR0);
             }
           switch (val & (M6811_PR1 | M6811_PR0))
             {
@@ -759,39 +769,39 @@ m68hc11tim_io_write_buffer (struct hw *me,
               n = 16;
               break;
             }
-          if (cpu->cpu_absolute_cycle < 64)
+          if (m68hc11_cpu->cpu_absolute_cycle < 64)
             {
               reset_overflow = 1;
               controller->clock_prescaler = n;
             }
-          cpu->ios[base] = val;
-          interrupts_update_pending (&cpu->cpu_interrupts);
+          m68hc11_cpu->ios[base] = val;
+          interrupts_update_pending (&m68hc11_cpu->cpu_interrupts);
           break;
 
         case M6811_PACTL:
           n = (1 << ((val & (M6811_RTR1 | M6811_RTR0))));
-          cpu->ios[base] = val;
+          m68hc11_cpu->ios[base] = val;
 
           controller->rti_delay = (long) (n) * 8192;
           m68hc11tim_timer_event (me, (void*) (RTI_EVENT| 0x100));
           break;
       
         case M6811_TFLG2:
-          val &= cpu->ios[M6811_TFLG2];
-          cpu->ios[M6811_TFLG2] &= ~val;
-          interrupts_update_pending (&cpu->cpu_interrupts);
+          val &= m68hc11_cpu->ios[M6811_TFLG2];
+          m68hc11_cpu->ios[M6811_TFLG2] &= ~val;
+          interrupts_update_pending (&m68hc11_cpu->cpu_interrupts);
           break;
 
         case M6811_TMSK1:
-          cpu->ios[M6811_TMSK1] = val;
-          interrupts_update_pending (&cpu->cpu_interrupts);
+          m68hc11_cpu->ios[M6811_TMSK1] = val;
+          interrupts_update_pending (&m68hc11_cpu->cpu_interrupts);
           reset_compare = 1;
           break;
 
         case M6811_TFLG1:
-          val &= cpu->ios[M6811_TFLG1];
-          cpu->ios[M6811_TFLG1] &= ~val;
-          interrupts_update_pending (&cpu->cpu_interrupts);          
+          val &= m68hc11_cpu->ios[M6811_TFLG1];
+          m68hc11_cpu->ios[M6811_TFLG1] &= ~val;
+          interrupts_update_pending (&m68hc11_cpu->cpu_interrupts);
           break;
 
         case M6811_TOC1:
@@ -799,17 +809,17 @@ m68hc11tim_io_write_buffer (struct hw *me,
         case M6811_TOC3:
         case M6811_TOC4:
         case M6811_TOC5:
-          cpu->ios[base] = val;
+          m68hc11_cpu->ios[base] = val;
           reset_compare = 1;
           break;
 
         case M6811_TCTL1:
         case M6811_TCTL2:
-          cpu->ios[base] = val;
+          m68hc11_cpu->ios[base] = val;
           break;
 
         default:
-          cpu->ios[base] = val;
+          m68hc11_cpu->ios[base] = val;
           break;
         }
 
diff --git a/sim/m68hc11/emulos.c b/sim/m68hc11/emulos.c
index b66117503c1d..7ee72cb9040c 100644
--- a/sim/m68hc11/emulos.c
+++ b/sim/m68hc11/emulos.c
@@ -104,7 +104,7 @@ emul_write (sim_cpu *cpu)
   if (addr + size > 0x0FFFF) {
     size = 0x0FFFF - addr;
   }
-  cpu->cpu_running = 0;
+  M68HC11_SIM_CPU (cpu)->cpu_running = 0;
   while (size)
     {
       uint8_t val = memory_read8 (cpu, addr);
@@ -132,7 +132,7 @@ emul_exit (sim_cpu *cpu)
 void
 emul_os (int code, sim_cpu *cpu)
 {
-  cpu->cpu_current_cycle = 8;
+  M68HC11_SIM_CPU (cpu)->cpu_current_cycle = 8;
   switch (code)
     {
     case 0x0:
diff --git a/sim/m68hc11/interp.c b/sim/m68hc11/interp.c
index 49353ba4e6dd..2620060dca1d 100644
--- a/sim/m68hc11/interp.c
+++ b/sim/m68hc11/interp.c
@@ -114,7 +114,7 @@ sim_get_info (SIM_DESC sd, char *cmd)
     }
 
   cpu_info (sd, cpu);
-  interrupts_info (sd, &cpu->cpu_interrupts);
+  interrupts_info (sd, &M68HC11_SIM_CPU (cpu)->cpu_interrupts);
 }
 
 
@@ -123,21 +123,23 @@ sim_board_reset (SIM_DESC sd)
 {
   struct hw *hw_cpu;
   sim_cpu *cpu;
+  struct m68hc11_sim_cpu *m68hc11_cpu;
   const struct bfd_arch_info *arch;
   const char *cpu_type;
 
   cpu = STATE_CPU (sd, 0);
+  m68hc11_cpu = M68HC11_SIM_CPU (cpu);
   arch = STATE_ARCHITECTURE (sd);
 
   /*  hw_cpu = sim_hw_parse (sd, "/"); */
   if (arch->arch == bfd_arch_m68hc11)
     {
-      cpu->cpu_type = CPU_M6811;
+      m68hc11_cpu->cpu_type = CPU_M6811;
       cpu_type = "/m68hc11";
     }
   else
     {
-      cpu->cpu_type = CPU_M6812;
+      m68hc11_cpu->cpu_type = CPU_M6812;
       cpu_type = "/m68hc12";
     }
   
@@ -159,17 +161,19 @@ sim_hw_configure (SIM_DESC sd)
   const struct bfd_arch_info *arch;
   struct hw *device_tree;
   sim_cpu *cpu;
+  struct m68hc11_sim_cpu *m68hc11_cpu;
   
   arch = STATE_ARCHITECTURE (sd);
   if (arch == 0)
     return 0;
 
   cpu = STATE_CPU (sd, 0);
-  cpu->cpu_configured_arch = arch;
+  m68hc11_cpu = M68HC11_SIM_CPU (cpu);
+  m68hc11_cpu->cpu_configured_arch = arch;
   device_tree = sim_hw_parse (sd, "/");
   if (arch->arch == bfd_arch_m68hc11)
     {
-      cpu->cpu_interpretor = cpu_interp_m6811;
+      m68hc11_cpu->cpu_interpretor = cpu_interp_m6811;
       if (hw_tree_find_property (device_tree, "/m68hc11/reg") == 0)
 	{
 	  /* Allocate core managed memory */
@@ -181,16 +185,16 @@ sim_hw_configure (SIM_DESC sd)
 	  sim_do_commandf (sd, "memory region 0x000@%d,0x8000",
 			   M6811_RAM_LEVEL);
 	  sim_hw_parse (sd, "/m68hc11/reg 0x1000 0x03F");
-          if (cpu->bank_start < cpu->bank_end)
+          if (m68hc11_cpu->bank_start < m68hc11_cpu->bank_end)
             {
               sim_do_commandf (sd, "memory region 0x%x@%d,0x100000",
-                               cpu->bank_virtual, M6811_RAM_LEVEL);
+                               m68hc11_cpu->bank_virtual, M6811_RAM_LEVEL);
               sim_hw_parse (sd, "/m68hc11/use_bank 1");
             }
 	}
-      if (cpu->cpu_start_mode)
+      if (m68hc11_cpu->cpu_start_mode)
         {
-          sim_hw_parse (sd, "/m68hc11/mode %s", cpu->cpu_start_mode);
+          sim_hw_parse (sd, "/m68hc11/mode %s", m68hc11_cpu->cpu_start_mode);
         }
       if (hw_tree_find_property (device_tree, "/m68hc11/m68hc11sio/reg") == 0)
 	{
@@ -229,11 +233,11 @@ sim_hw_configure (SIM_DESC sd)
       sim_hw_parse (sd, "/m68hc11 > port-b cpu-write-port /m68hc11");
       sim_hw_parse (sd, "/m68hc11 > port-c cpu-write-port /m68hc11");
       sim_hw_parse (sd, "/m68hc11 > port-d cpu-write-port /m68hc11");
-      cpu->hw_cpu = sim_hw_parse (sd, "/m68hc11");
+      m68hc11_cpu->hw_cpu = sim_hw_parse (sd, "/m68hc11");
     }
   else
     {
-      cpu->cpu_interpretor = cpu_interp_m6812;
+      m68hc11_cpu->cpu_interpretor = cpu_interp_m6812;
       if (hw_tree_find_property (device_tree, "/m68hc12/reg") == 0)
 	{
 	  /* Allocate core external memory.  */
@@ -241,10 +245,10 @@ sim_hw_configure (SIM_DESC sd)
 			   0x8000, M6811_RAM_LEVEL, 0x8000);
 	  sim_do_commandf (sd, "memory region 0x000@%d,0x8000",
 			   M6811_RAM_LEVEL);
-          if (cpu->bank_start < cpu->bank_end)
+          if (m68hc11_cpu->bank_start < m68hc11_cpu->bank_end)
             {
               sim_do_commandf (sd, "memory region 0x%x@%d,0x100000",
-                               cpu->bank_virtual, M6811_RAM_LEVEL);
+                               m68hc11_cpu->bank_virtual, M6811_RAM_LEVEL);
               sim_hw_parse (sd, "/m68hc12/use_bank 1");
             }
 	  sim_hw_parse (sd, "/m68hc12/reg 0x0 0x3FF");
@@ -287,7 +291,7 @@ sim_hw_configure (SIM_DESC sd)
       sim_hw_parse (sd, "/m68hc12 > port-b cpu-write-port /m68hc12");
       sim_hw_parse (sd, "/m68hc12 > port-c cpu-write-port /m68hc12");
       sim_hw_parse (sd, "/m68hc12 > port-d cpu-write-port /m68hc12");
-      cpu->hw_cpu = sim_hw_parse (sd, "/m68hc12");
+      m68hc11_cpu->hw_cpu = sim_hw_parse (sd, "/m68hc12");
     }
   return 1;
 }
@@ -298,14 +302,16 @@ static int
 sim_get_bank_parameters (SIM_DESC sd)
 {
   sim_cpu *cpu;
+  struct m68hc11_sim_cpu *m68hc11_cpu;
   unsigned size;
   bfd_vma addr;
 
   cpu = STATE_CPU (sd, 0);
+  m68hc11_cpu = M68HC11_SIM_CPU (cpu);
 
   addr = trace_sym_value (sd, BFD_M68HC11_BANK_START_NAME);
   if (addr != -1)
-    cpu->bank_start = addr;
+    m68hc11_cpu->bank_start = addr;
 
   size = trace_sym_value (sd, BFD_M68HC11_BANK_SIZE_NAME);
   if (size == -1)
@@ -313,12 +319,12 @@ sim_get_bank_parameters (SIM_DESC sd)
 
   addr = trace_sym_value (sd, BFD_M68HC11_BANK_VIRTUAL_NAME);
   if (addr != -1)
-    cpu->bank_virtual = addr;
+    m68hc11_cpu->bank_virtual = addr;
 
-  cpu->bank_end = cpu->bank_start + size;
-  cpu->bank_shift = 0;
+  m68hc11_cpu->bank_end = m68hc11_cpu->bank_start + size;
+  m68hc11_cpu->bank_shift = 0;
   for (; size > 1; size >>= 1)
-    cpu->bank_shift++;
+    m68hc11_cpu->bank_shift++;
 
   return 0;
 }
@@ -327,9 +333,11 @@ static int
 sim_prepare_for_program (SIM_DESC sd, bfd* abfd)
 {
   sim_cpu *cpu;
+  struct m68hc11_sim_cpu *m68hc11_cpu;
   int elf_flags = 0;
 
   cpu = STATE_CPU (sd, 0);
+  m68hc11_cpu = M68HC11_SIM_CPU (cpu);
 
   if (abfd != NULL)
     {
@@ -338,10 +346,10 @@ sim_prepare_for_program (SIM_DESC sd, bfd* abfd)
       if (bfd_get_flavour (abfd) == bfd_target_elf_flavour)
         elf_flags = elf_elfheader (abfd)->e_flags;
 
-      cpu->cpu_elf_start = bfd_get_start_address (abfd);
+      m68hc11_cpu->cpu_elf_start = bfd_get_start_address (abfd);
       /* See if any section sets the reset address */
-      cpu->cpu_use_elf_start = 1;
-      for (s = abfd->sections; s && cpu->cpu_use_elf_start; s = s->next) 
+      m68hc11_cpu->cpu_use_elf_start = 1;
+      for (s = abfd->sections; s && m68hc11_cpu->cpu_use_elf_start; s = s->next)
         {
           if (s->flags & SEC_LOAD)
             {
@@ -358,7 +366,7 @@ sim_prepare_for_program (SIM_DESC sd, bfd* abfd)
 		    lma = bfd_section_vma (s);
 
                   if (lma <= 0xFFFE && lma+size >= 0x10000)
-                    cpu->cpu_use_elf_start = 0;
+                    m68hc11_cpu->cpu_use_elf_start = 0;
                 }
             }
         }
@@ -410,7 +418,8 @@ sim_open (SIM_OPEN_KIND kind, host_callback *callback,
   current_target_byte_order = BFD_ENDIAN_BIG;
 
   /* The cpu data is kept in a separately allocated chunk of memory.  */
-  if (sim_cpu_alloc_all (sd, 1) != SIM_RC_OK)
+  if (sim_cpu_alloc_all_extra (sd, 1, sizeof (struct m68hc11_sim_cpu))
+      != SIM_RC_OK)
     {
       free_state (sd);
       return 0;
@@ -494,7 +503,7 @@ sim_engine_run (SIM_DESC sd,
       cpu_single_step (cpu);
 
       /* process any events */
-      if (sim_events_tickn (sd, cpu->cpu_current_cycle))
+      if (sim_events_tickn (sd, M68HC11_SIM_CPU (cpu)->cpu_current_cycle))
 	{
 	  sim_events_process (sd);
 	}
diff --git a/sim/m68hc11/interrupts.c b/sim/m68hc11/interrupts.c
index 4e2a16af53fd..ee65f4375af1 100644
--- a/sim/m68hc11/interrupts.c
+++ b/sim/m68hc11/interrupts.c
@@ -128,7 +128,7 @@ static const OPTION interrupt_options[] =
 void
 interrupts_initialize (SIM_DESC sd, sim_cpu *cpu)
 {
-  struct interrupts *interrupts = &cpu->cpu_interrupts;
+  struct interrupts *interrupts = &M68HC11_SIM_CPU (cpu)->cpu_interrupts;
   
   interrupts->cpu          = cpu;
 
@@ -139,10 +139,12 @@ interrupts_initialize (SIM_DESC sd, sim_cpu *cpu)
 void
 interrupts_reset (struct interrupts *interrupts)
 {
+  sim_cpu *cpu = interrupts->cpu;
+  struct m68hc11_sim_cpu *m68hc11_cpu = M68HC11_SIM_CPU (cpu);
   int i;
   
   interrupts->pending_mask = 0;
-  if (interrupts->cpu->cpu_mode & M6811_SMOD)
+  if (m68hc11_cpu->cpu_mode & M6811_SMOD)
     interrupts->vectors_addr = 0xbfc0;
   else
     interrupts->vectors_addr = 0xffc0;
@@ -171,13 +173,13 @@ interrupts_reset (struct interrupts *interrupts)
 
   /* In bootstrap mode, initialize the vector table to point
      to the RAM location.  */
-  if (interrupts->cpu->cpu_mode == M6811_SMOD)
+  if (m68hc11_cpu->cpu_mode == M6811_SMOD)
     {
       bfd_vma addr = interrupts->vectors_addr;
       uint16_t vector = 0x0100 - 3 * (M6811_INT_NUMBER - 1);
       for (i = 0; i < M6811_INT_NUMBER; i++)
         {
-          memory_write16 (interrupts->cpu, addr, vector);
+          memory_write16 (cpu, addr, vector);
           addr += 2;
           vector += 3;
         }
@@ -209,7 +211,7 @@ interrupt_option_handler (SIM_DESC sd, sim_cpu *cpu,
   if (cpu == 0)
     cpu = STATE_CPU (sd, 0);
 
-  interrupts = &cpu->cpu_interrupts;
+  interrupts = &M68HC11_SIM_CPU (cpu)->cpu_interrupts;
   switch (opt)
     {
     case OPTION_INTERRUPT_INFO:
@@ -291,7 +293,7 @@ interrupts_update_pending (struct interrupts *interrupts)
 
   clear_mask = 0;
   set_mask = 0;
-  ioregs = &interrupts->cpu->ios[0];
+  ioregs = &M68HC11_SIM_CPU (interrupts->cpu)->ios[0];
   
   for (i = 0; i < ARRAY_SIZE (idefs); i++)
     {
diff --git a/sim/m68hc11/m68hc11_sim.c b/sim/m68hc11/m68hc11_sim.c
index 6ec45f782062..ef3093ef1e6b 100644
--- a/sim/m68hc11/m68hc11_sim.c
+++ b/sim/m68hc11/m68hc11_sim.c
@@ -64,6 +64,7 @@ static SIM_RC
 cpu_option_handler (SIM_DESC sd, sim_cpu *cpu,
                     int opt, char *arg, int is_command)
 {
+  struct m68hc11_sim_cpu *m68hc11_cpu = M68HC11_SIM_CPU (cpu);
   int val;
   
   cpu = STATE_CPU (sd, 0);
@@ -74,22 +75,22 @@ cpu_option_handler (SIM_DESC sd, sim_cpu *cpu,
       break;
 
     case OPTION_EMUL_OS:
-      cpu->cpu_emul_syscall = 1;
+      m68hc11_cpu->cpu_emul_syscall = 1;
       break;
 
     case OPTION_CPU_CONFIG:
       if (sscanf(arg, "0x%x", &val) == 1
           || sscanf(arg, "%d", &val) == 1)
         {
-          cpu->cpu_config = val;
-          cpu->cpu_use_local_config = 1;
+          m68hc11_cpu->cpu_config = val;
+          m68hc11_cpu->cpu_use_local_config = 1;
         }
       else
-        cpu->cpu_use_local_config = 0;
+        m68hc11_cpu->cpu_use_local_config = 0;
       break;
 
     case OPTION_CPU_BOOTSTRAP:
-       cpu->cpu_start_mode = "bootstrap";
+       m68hc11_cpu->cpu_start_mode = "bootstrap";
        break;
 
     case OPTION_CPU_MODE:
@@ -116,7 +117,7 @@ cpu_return (sim_cpu *cpu)
 void
 cpu_set_sp (sim_cpu *cpu, uint16_t val)
 {
-  cpu->cpu_regs.sp = val;
+  M68HC11_SIM_CPU (cpu)->cpu_regs.sp = val;
 }
 
 static uint16_t
@@ -465,27 +466,28 @@ cpu_move16 (sim_cpu *cpu, uint8_t code)
 int
 cpu_initialize (SIM_DESC sd, sim_cpu *cpu)
 {
+  struct m68hc11_sim_cpu *m68hc11_cpu = M68HC11_SIM_CPU (cpu);
   sim_add_option_table (sd, 0, cpu_options);
 
-  memset (&cpu->cpu_regs, 0, sizeof(cpu->cpu_regs));
-
-  cpu->cpu_absolute_cycle = 0;
-  cpu->cpu_current_cycle  = 0;
-  cpu->cpu_emul_syscall   = 1;
-  cpu->cpu_running        = 1;
-  cpu->cpu_stop_on_interrupt = 0;
-  cpu->cpu_frequency = 8 * 1000 * 1000;
-  cpu->cpu_use_elf_start = 0;
-  cpu->cpu_elf_start     = 0;
-  cpu->cpu_use_local_config = 0;
-  cpu->bank_start = 0;
-  cpu->bank_end   = 0;
-  cpu->bank_shift = 0;
-  cpu->cpu_config        = M6811_NOSEC | M6811_NOCOP | M6811_ROMON |
+  memset (&m68hc11_cpu->cpu_regs, 0, sizeof(m68hc11_cpu->cpu_regs));
+
+  m68hc11_cpu->cpu_absolute_cycle = 0;
+  m68hc11_cpu->cpu_current_cycle  = 0;
+  m68hc11_cpu->cpu_emul_syscall   = 1;
+  m68hc11_cpu->cpu_running        = 1;
+  m68hc11_cpu->cpu_stop_on_interrupt = 0;
+  m68hc11_cpu->cpu_frequency = 8 * 1000 * 1000;
+  m68hc11_cpu->cpu_use_elf_start = 0;
+  m68hc11_cpu->cpu_elf_start     = 0;
+  m68hc11_cpu->cpu_use_local_config = 0;
+  m68hc11_cpu->bank_start = 0;
+  m68hc11_cpu->bank_end   = 0;
+  m68hc11_cpu->bank_shift = 0;
+  m68hc11_cpu->cpu_config        = M6811_NOSEC | M6811_NOCOP | M6811_ROMON |
     M6811_EEON;
   interrupts_initialize (sd, cpu);
 
-  cpu->cpu_is_initialized = 1;
+  m68hc11_cpu->cpu_is_initialized = 1;
   return 0;
 }
 
@@ -494,35 +496,37 @@ cpu_initialize (SIM_DESC sd, sim_cpu *cpu)
 int
 cpu_reset (sim_cpu *cpu)
 {
+  struct m68hc11_sim_cpu *m68hc11_cpu = M68HC11_SIM_CPU (cpu);
+
   /* Initialize the config register.
      It is only initialized at reset time.  */
-  memset (cpu->ios, 0, sizeof (cpu->ios));
-  if (cpu->cpu_configured_arch->arch == bfd_arch_m68hc11)
-    cpu->ios[M6811_INIT] = 0x1;
+  memset (m68hc11_cpu->ios, 0, sizeof (m68hc11_cpu->ios));
+  if (m68hc11_cpu->cpu_configured_arch->arch == bfd_arch_m68hc11)
+    m68hc11_cpu->ios[M6811_INIT] = 0x1;
   else
-    cpu->ios[M6811_INIT] = 0;
+    m68hc11_cpu->ios[M6811_INIT] = 0;
 
   /* Output compare registers set to 0xFFFF.  */
-  cpu->ios[M6811_TOC1_H] = 0xFF;
-  cpu->ios[M6811_TOC1_L] = 0xFF;
-  cpu->ios[M6811_TOC2_H] = 0xFF;
-  cpu->ios[M6811_TOC2_L] = 0xFF;
-  cpu->ios[M6811_TOC3_H] = 0xFF;
-  cpu->ios[M6811_TOC4_L] = 0xFF;
-  cpu->ios[M6811_TOC5_H] = 0xFF;
-  cpu->ios[M6811_TOC5_L] = 0xFF;
+  m68hc11_cpu->ios[M6811_TOC1_H] = 0xFF;
+  m68hc11_cpu->ios[M6811_TOC1_L] = 0xFF;
+  m68hc11_cpu->ios[M6811_TOC2_H] = 0xFF;
+  m68hc11_cpu->ios[M6811_TOC2_L] = 0xFF;
+  m68hc11_cpu->ios[M6811_TOC3_H] = 0xFF;
+  m68hc11_cpu->ios[M6811_TOC4_L] = 0xFF;
+  m68hc11_cpu->ios[M6811_TOC5_H] = 0xFF;
+  m68hc11_cpu->ios[M6811_TOC5_L] = 0xFF;
 
   /* Setup the processor registers.  */
-  memset (&cpu->cpu_regs, 0, sizeof(cpu->cpu_regs));
-  cpu->cpu_absolute_cycle = 0;
-  cpu->cpu_current_cycle  = 0;
-  cpu->cpu_is_initialized = 0;
+  memset (&m68hc11_cpu->cpu_regs, 0, sizeof(m68hc11_cpu->cpu_regs));
+  m68hc11_cpu->cpu_absolute_cycle = 0;
+  m68hc11_cpu->cpu_current_cycle  = 0;
+  m68hc11_cpu->cpu_is_initialized = 0;
 
   /* Reset interrupts.  */
-  interrupts_reset (&cpu->cpu_interrupts);
+  interrupts_reset (&m68hc11_cpu->cpu_interrupts);
 
   /* Reinitialize the CPU operating mode.  */
-  cpu->ios[M6811_HPRIO] = cpu->cpu_mode;
+  m68hc11_cpu->ios[M6811_HPRIO] = m68hc11_cpu->cpu_mode;
   return 0;
 }
 
@@ -530,12 +534,13 @@ cpu_reset (sim_cpu *cpu)
 int
 cpu_restart (sim_cpu *cpu)
 {
+  struct m68hc11_sim_cpu *m68hc11_cpu = M68HC11_SIM_CPU (cpu);
   uint16_t addr;
 
   /* Get CPU starting address depending on the CPU mode.  */
-  if (cpu->cpu_use_elf_start == 0)
+  if (m68hc11_cpu->cpu_use_elf_start == 0)
     {
-      switch ((cpu->ios[M6811_HPRIO]) & (M6811_SMOD | M6811_MDA))
+      switch ((m68hc11_cpu->ios[M6811_HPRIO]) & (M6811_SMOD | M6811_MDA))
         {
           /* Single Chip  */
         default:
@@ -561,16 +566,16 @@ cpu_restart (sim_cpu *cpu)
     }
   else
     {
-      addr = cpu->cpu_elf_start;
+      addr = m68hc11_cpu->cpu_elf_start;
     }
   
   /* Setup the processor registers.  */
-  cpu->cpu_insn_pc  = addr;
-  cpu->cpu_regs.pc  = addr;
-  cpu->cpu_regs.ccr = M6811_X_BIT | M6811_I_BIT | M6811_S_BIT;
-  cpu->cpu_absolute_cycle = 0;
-  cpu->cpu_is_initialized = 1;
-  cpu->cpu_current_cycle  = 0;
+  m68hc11_cpu->cpu_insn_pc  = addr;
+  m68hc11_cpu->cpu_regs.pc  = addr;
+  m68hc11_cpu->cpu_regs.ccr = M6811_X_BIT | M6811_I_BIT | M6811_S_BIT;
+  m68hc11_cpu->cpu_absolute_cycle = 0;
+  m68hc11_cpu->cpu_is_initialized = 1;
+  m68hc11_cpu->cpu_current_cycle  = 0;
 
   cpu_call (cpu, addr);
   
@@ -625,7 +630,7 @@ cpu_fetch_relbranch (sim_cpu *cpu)
     {
       addr |= 0xFF00;
     }
-  addr += cpu->cpu_regs.pc;
+  addr += M68HC11_SIM_CPU (cpu)->cpu_regs.pc;
   return addr;
 }
 
@@ -634,7 +639,7 @@ cpu_fetch_relbranch16 (sim_cpu *cpu)
 {
   uint16_t addr = cpu_fetch16 (cpu);
 
-  addr += cpu->cpu_regs.pc;
+  addr += M68HC11_SIM_CPU (cpu)->cpu_regs.pc;
   return addr;
 }
 
@@ -642,21 +647,23 @@ cpu_fetch_relbranch16 (sim_cpu *cpu)
 void
 cpu_push_all (sim_cpu *cpu)
 {
-  if (cpu->cpu_configured_arch->arch == bfd_arch_m68hc11)
+  struct m68hc11_sim_cpu *m68hc11_cpu = M68HC11_SIM_CPU (cpu);
+
+  if (m68hc11_cpu->cpu_configured_arch->arch == bfd_arch_m68hc11)
     {
-      cpu_m68hc11_push_uint16 (cpu, cpu->cpu_regs.pc);
-      cpu_m68hc11_push_uint16 (cpu, cpu->cpu_regs.iy);
-      cpu_m68hc11_push_uint16 (cpu, cpu->cpu_regs.ix);
-      cpu_m68hc11_push_uint16 (cpu, cpu->cpu_regs.d);
-      cpu_m68hc11_push_uint8 (cpu, cpu->cpu_regs.ccr);
+      cpu_m68hc11_push_uint16 (cpu, m68hc11_cpu->cpu_regs.pc);
+      cpu_m68hc11_push_uint16 (cpu, m68hc11_cpu->cpu_regs.iy);
+      cpu_m68hc11_push_uint16 (cpu, m68hc11_cpu->cpu_regs.ix);
+      cpu_m68hc11_push_uint16 (cpu, m68hc11_cpu->cpu_regs.d);
+      cpu_m68hc11_push_uint8 (cpu, m68hc11_cpu->cpu_regs.ccr);
     }
   else
     {
-      cpu_m68hc12_push_uint16 (cpu, cpu->cpu_regs.pc);
-      cpu_m68hc12_push_uint16 (cpu, cpu->cpu_regs.iy);
-      cpu_m68hc12_push_uint16 (cpu, cpu->cpu_regs.ix);
-      cpu_m68hc12_push_uint16 (cpu, cpu->cpu_regs.d);
-      cpu_m68hc12_push_uint8 (cpu, cpu->cpu_regs.ccr);
+      cpu_m68hc12_push_uint16 (cpu, m68hc11_cpu->cpu_regs.pc);
+      cpu_m68hc12_push_uint16 (cpu, m68hc11_cpu->cpu_regs.iy);
+      cpu_m68hc12_push_uint16 (cpu, m68hc11_cpu->cpu_regs.ix);
+      cpu_m68hc12_push_uint16 (cpu, m68hc11_cpu->cpu_regs.d);
+      cpu_m68hc12_push_uint8 (cpu, m68hc11_cpu->cpu_regs.ccr);
     }
 }
 
@@ -737,6 +744,8 @@ cpu_exg (sim_cpu *cpu, uint8_t code)
 void
 cpu_special (sim_cpu *cpu, enum M6811_Special special)
 {
+  struct m68hc11_sim_cpu *m68hc11_cpu = M68HC11_SIM_CPU (cpu);
+
   switch (special)
     {
     case M6811_RTI:
@@ -770,9 +779,9 @@ cpu_special (sim_cpu *cpu, enum M6811_Special special)
     case M6811_WAI:
       /* In the ELF-start mode, we are in a special mode where
 	 the WAI corresponds to an exit.  */
-      if (cpu->cpu_use_elf_start)
+      if (m68hc11_cpu->cpu_use_elf_start)
         {
-          cpu_set_pc (cpu, cpu->cpu_insn_pc);
+          cpu_set_pc (cpu, m68hc11_cpu->cpu_insn_pc);
           sim_engine_halt (CPU_STATE (cpu), cpu,
                            NULL, NULL_CIA, sim_exited,
                            cpu_get_d (cpu));
@@ -783,19 +792,19 @@ cpu_special (sim_cpu *cpu, enum M6811_Special special)
       break;
       
     case M6811_SWI:
-      interrupts_raise (&cpu->cpu_interrupts, M6811_INT_SWI);
-      interrupts_process (&cpu->cpu_interrupts);
+      interrupts_raise (&m68hc11_cpu->cpu_interrupts, M6811_INT_SWI);
+      interrupts_process (&m68hc11_cpu->cpu_interrupts);
       break;
       
     case M6811_EMUL_SYSCALL:
     case M6811_ILLEGAL:
-      if (cpu->cpu_emul_syscall)
+      if (m68hc11_cpu->cpu_emul_syscall)
         {
           uint8_t op = memory_read8 (cpu,
                                    cpu_get_pc (cpu) - 1);
           if (op == 0x41)
             {
-	      cpu_set_pc (cpu, cpu->cpu_insn_pc);
+	      cpu_set_pc (cpu, m68hc11_cpu->cpu_insn_pc);
 	      sim_engine_halt (CPU_STATE (cpu), cpu,
 			       NULL, NULL_CIA, sim_exited,
 			       cpu_get_d (cpu));
@@ -808,8 +817,8 @@ cpu_special (sim_cpu *cpu, enum M6811_Special special)
           return;
         }
       
-      interrupts_raise (&cpu->cpu_interrupts, M6811_INT_ILLEGAL);
-      interrupts_process (&cpu->cpu_interrupts);
+      interrupts_raise (&m68hc11_cpu->cpu_interrupts, M6811_INT_ILLEGAL);
+      interrupts_process (&m68hc11_cpu->cpu_interrupts);
       break;
 
     case M6811_TEST:
@@ -822,7 +831,7 @@ cpu_special (sim_cpu *cpu, enum M6811_Special special)
         /* Breakpoint instruction if we are under gdb.  */
         if (STATE_OPEN_KIND (sd) == SIM_OPEN_DEBUG)
           {
-            cpu->cpu_regs.pc --;
+            m68hc11_cpu->cpu_regs.pc --;
             sim_engine_halt (CPU_STATE (cpu), cpu,
                              0, cpu_get_pc (cpu), sim_stopped,
                              SIM_SIGTRAP);
@@ -1000,20 +1009,22 @@ cpu_special (sim_cpu *cpu, enum M6811_Special special)
 void
 cpu_single_step (sim_cpu *cpu)
 {
-  cpu->cpu_current_cycle = 0;
-  cpu->cpu_insn_pc = cpu_get_pc (cpu);
+  struct m68hc11_sim_cpu *m68hc11_cpu = M68HC11_SIM_CPU (cpu);
+
+  m68hc11_cpu->cpu_current_cycle = 0;
+  m68hc11_cpu->cpu_insn_pc = cpu_get_pc (cpu);
 
   /* Handle the pending interrupts.  If an interrupt is handled,
      treat this as an single step.  */
-  if (interrupts_process (&cpu->cpu_interrupts))
+  if (interrupts_process (&m68hc11_cpu->cpu_interrupts))
     {
-      cpu->cpu_absolute_cycle += cpu->cpu_current_cycle;
+      m68hc11_cpu->cpu_absolute_cycle += m68hc11_cpu->cpu_current_cycle;
       return;
     }
   
   /*  printf("PC = 0x%04x\n", cpu_get_pc (cpu));*/
-  cpu->cpu_interpretor (cpu);
-  cpu->cpu_absolute_cycle += cpu->cpu_current_cycle;
+  m68hc11_cpu->cpu_interpretor (cpu);
+  m68hc11_cpu->cpu_absolute_cycle += m68hc11_cpu->cpu_current_cycle;
 }
 
 /* VARARGS */
@@ -1037,40 +1048,44 @@ void
 cpu_memory_exception (sim_cpu *cpu, SIM_SIGNAL excep,
                       uint16_t addr, const char *message)
 {
-  if (cpu->cpu_running == 0)
+  struct m68hc11_sim_cpu *m68hc11_cpu = M68HC11_SIM_CPU (cpu);
+
+  if (m68hc11_cpu->cpu_running == 0)
     return;
 
-  cpu_set_pc (cpu, cpu->cpu_insn_pc);
+  cpu_set_pc (cpu, m68hc11_cpu->cpu_insn_pc);
   sim_engine_halt (CPU_STATE (cpu), cpu, NULL,
                    cpu_get_pc (cpu), sim_stopped, excep);
   
 #if 0
-  cpu->mem_exception = excep;
-  cpu->fault_addr    = addr;
-  cpu->fault_msg     = strdup (message);
+  m68hc11_cpu->mem_exception = excep;
+  m68hc11_cpu->fault_addr    = addr;
+  m68hc11_cpu->fault_msg     = strdup (message);
 
-  if (cpu->cpu_use_handler)
+  if (m68hc11_cpu->cpu_use_handler)
     {
-      longjmp (&cpu->cpu_exception_handler, 1);
+      longjmp (&m68hc11_cpu->cpu_exception_handler, 1);
     }
-  (* cpu->callback->printf_filtered)
-    (cpu->callback, "Fault at 0x%04x: %s\n", addr, message);
+  (* m68hc11_cpu->callback->printf_filtered)
+    (m68hc11_cpu->callback, "Fault at 0x%04x: %s\n", addr, message);
 #endif
 }
 
 void
 cpu_info (SIM_DESC sd, sim_cpu *cpu)
 {
+  struct m68hc11_sim_cpu *m68hc11_cpu = M68HC11_SIM_CPU (cpu);
+
   sim_io_printf (sd, "CPU info:\n");
   sim_io_printf (sd, "  Absolute cycle: %s\n",
-                 cycle_to_string (cpu, cpu->cpu_absolute_cycle,
+                 cycle_to_string (cpu, m68hc11_cpu->cpu_absolute_cycle,
                                   PRINT_TIME | PRINT_CYCLE));
   
   sim_io_printf (sd, "  Syscall emulation: %s\n",
-                 cpu->cpu_emul_syscall ? "yes, via 0xcd <n>" : "no");
+                 m68hc11_cpu->cpu_emul_syscall ? "yes, via 0xcd <n>" : "no");
   sim_io_printf (sd, "  Memory errors detection: %s\n",
-                 cpu->cpu_check_memory ? "yes" : "no");
+                 m68hc11_cpu->cpu_check_memory ? "yes" : "no");
   sim_io_printf (sd, "  Stop on interrupt: %s\n",
-                 cpu->cpu_stop_on_interrupt ? "yes" : "no");
+                 m68hc11_cpu->cpu_stop_on_interrupt ? "yes" : "no");
 }
 
diff --git a/sim/m68hc11/sim-main.h b/sim/m68hc11/sim-main.h
index 78dbd6728675..26293bc654f0 100644
--- a/sim/m68hc11/sim-main.h
+++ b/sim/m68hc11/sim-main.h
@@ -20,6 +20,8 @@ along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
 #ifndef _SIM_MAIN_H
 #define _SIM_MAIN_H
 
+#define SIM_HAVE_COMMON_SIM_CPU
+
 #include "sim-basics.h"
 #include "sim-base.h"
 
@@ -32,8 +34,6 @@ along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
 #include "sim-signal.h"
 #include "sim-types.h"
 
-struct _sim_cpu;
-
 #include "interrupts.h"
 #include <setjmp.h>
 
@@ -133,11 +133,9 @@ enum M6811_Special
 #define M6812_MAX_PORTS (0x3ff+1)
 #define MAX_PORTS       (M6812_MAX_PORTS)
 
-struct _sim_cpu;
-
-typedef void (* cpu_interp) (struct _sim_cpu*);
+typedef void (* cpu_interp) (sim_cpu *);
 
-struct _sim_cpu {
+struct m68hc11_sim_cpu {
   /* CPU registers.  */
   struct m6811_regs     cpu_regs;
 
@@ -203,42 +201,40 @@ struct _sim_cpu {
   
 
   struct hw            *hw_cpu;
-
-  /* ... base type ... */
-  sim_cpu_base base;
 };
+#define M68HC11_SIM_CPU(cpu) ((struct m68hc11_sim_cpu *) CPU_ARCH_DATA (cpu))
 
 /* Returns the cpu absolute cycle time (A virtual counter incremented
    at each 68HC11 E clock).  */
-#define cpu_current_cycle(cpu)    ((cpu)->cpu_absolute_cycle)
-#define cpu_add_cycles(cpu, T)    ((cpu)->cpu_current_cycle += (int64_t) (T))
-#define cpu_is_running(cpu)       ((cpu)->cpu_running)
+#define cpu_current_cycle(cpu)    (M68HC11_SIM_CPU (cpu)->cpu_absolute_cycle)
+#define cpu_add_cycles(cpu, T)    (M68HC11_SIM_CPU (cpu)->cpu_current_cycle += (int64_t) (T))
+#define cpu_is_running(cpu)       (M68HC11_SIM_CPU (cpu)->cpu_running)
 
 /* Get the IO/RAM base addresses depending on the M6811_INIT register.  */
 #define cpu_get_io_base(cpu) \
-  (((uint16_t)(((cpu)->ios[M6811_INIT]) & 0x0F)) << 12)
+  (((uint16_t)((M68HC11_SIM_CPU (cpu)->ios[M6811_INIT]) & 0x0F)) << 12)
 #define cpu_get_reg_base(cpu) \
-  (((uint16_t)(((cpu)->ios[M6811_INIT]) & 0xF0)) << 8)
+  (((uint16_t)((M68HC11_SIM_CPU (cpu)->ios[M6811_INIT]) & 0xF0)) << 8)
 
 /* Returns the different CPU registers.  */
-#define cpu_get_ccr(cpu)          ((cpu)->cpu_regs.ccr)
-#define cpu_get_pc(cpu)           ((cpu)->cpu_regs.pc)
-#define cpu_get_d(cpu)            ((cpu)->cpu_regs.d)
-#define cpu_get_x(cpu)            ((cpu)->cpu_regs.ix)
-#define cpu_get_y(cpu)            ((cpu)->cpu_regs.iy)
-#define cpu_get_sp(cpu)           ((cpu)->cpu_regs.sp)
-#define cpu_get_a(cpu)            (((cpu)->cpu_regs.d >> 8) & 0x0FF)
-#define cpu_get_b(cpu)            ((cpu)->cpu_regs.d & 0x0FF)
-#define cpu_get_page(cpu)         ((cpu)->cpu_regs.page)
+#define cpu_get_ccr(cpu)          (M68HC11_SIM_CPU (cpu)->cpu_regs.ccr)
+#define cpu_get_pc(cpu)           (M68HC11_SIM_CPU (cpu)->cpu_regs.pc)
+#define cpu_get_d(cpu)            (M68HC11_SIM_CPU (cpu)->cpu_regs.d)
+#define cpu_get_x(cpu)            (M68HC11_SIM_CPU (cpu)->cpu_regs.ix)
+#define cpu_get_y(cpu)            (M68HC11_SIM_CPU (cpu)->cpu_regs.iy)
+#define cpu_get_sp(cpu)           (M68HC11_SIM_CPU (cpu)->cpu_regs.sp)
+#define cpu_get_a(cpu)            ((M68HC11_SIM_CPU (cpu)->cpu_regs.d >> 8) & 0x0FF)
+#define cpu_get_b(cpu)            (M68HC11_SIM_CPU (cpu)->cpu_regs.d & 0x0FF)
+#define cpu_get_page(cpu)         (M68HC11_SIM_CPU (cpu)->cpu_regs.page)
 
 /* 68HC12 specific and Motorola internal registers.  */
 #define cpu_get_tmp3(cpu)         (0)
 #define cpu_get_tmp2(cpu)         (0)
 
-#define cpu_set_d(cpu, val)       ((cpu)->cpu_regs.d = (val))
-#define cpu_set_x(cpu, val)       ((cpu)->cpu_regs.ix = (val))
-#define cpu_set_y(cpu, val)       ((cpu)->cpu_regs.iy = (val))
-#define cpu_set_page(cpu, val)    ((cpu)->cpu_regs.page = (val))
+#define cpu_set_d(cpu, val)       (M68HC11_SIM_CPU (cpu)->cpu_regs.d = (val))
+#define cpu_set_x(cpu, val)       (M68HC11_SIM_CPU (cpu)->cpu_regs.ix = (val))
+#define cpu_set_y(cpu, val)       (M68HC11_SIM_CPU (cpu)->cpu_regs.iy = (val))
+#define cpu_set_page(cpu, val)    (M68HC11_SIM_CPU (cpu)->cpu_regs.page = (val))
 
 /* 68HC12 specific and Motorola internal registers.  */
 #define cpu_set_tmp3(cpu, val)    (0)
@@ -246,17 +242,17 @@ struct _sim_cpu {
 
 #if 0
 /* This is a function in m68hc11_sim.c to keep track of the frame.  */
-#define cpu_set_sp(cpu, val)      ((cpu)->cpu_regs.sp = (val))
+#define cpu_set_sp(cpu, val)      (M68HC11_SIM_CPU (cpu)->cpu_regs.sp = (val))
 #endif
 
-#define cpu_set_pc(cpu, val)      ((cpu)->cpu_regs.pc = (val))
+#define cpu_set_pc(cpu, val)      (M68HC11_SIM_CPU (cpu)->cpu_regs.pc = (val))
 
 #define cpu_set_a(cpu, val)  \
   cpu_set_d(cpu, ((val) << 8) | cpu_get_b (cpu))
 #define cpu_set_b(cpu, val)  \
   cpu_set_d(cpu, ((cpu_get_a (cpu)) << 8) | ((val) & 0x0FF))
 
-#define cpu_set_ccr(cpu, val)     ((cpu)->cpu_regs.ccr = (val))
+#define cpu_set_ccr(cpu, val)     (M68HC11_SIM_CPU (cpu)->cpu_regs.ccr = (val))
 #define cpu_get_ccr_H(cpu)        ((cpu_get_ccr (cpu) & M6811_H_BIT) ? 1 : 0)
 #define cpu_get_ccr_X(cpu)        ((cpu_get_ccr (cpu) & M6811_X_BIT) ? 1 : 0)
 #define cpu_get_ccr_S(cpu)        ((cpu_get_ccr (cpu) & M6811_S_BIT) ? 1 : 0)
@@ -286,10 +282,12 @@ extern void cpu_memory_exception (sim_cpu *cpu,
 STATIC_INLINE UNUSED address_word
 phys_to_virt (sim_cpu *cpu, address_word addr)
 {
-  if (addr >= cpu->bank_start && addr < cpu->bank_end)
-    return ((address_word) (addr - cpu->bank_start)
-            + (((address_word) cpu->cpu_regs.page) << cpu->bank_shift)
-            + cpu->bank_virtual);
+  struct m68hc11_sim_cpu *m68hc11_cpu = M68HC11_SIM_CPU (cpu);
+
+  if (addr >= m68hc11_cpu->bank_start && addr < m68hc11_cpu->bank_end)
+    return ((address_word) (addr - m68hc11_cpu->bank_start)
+            + (((address_word) m68hc11_cpu->cpu_regs.page) << m68hc11_cpu->bank_shift)
+            + m68hc11_cpu->bank_virtual);
   else
     return (address_word) (addr);
 }
@@ -411,40 +409,44 @@ cpu_ccr_update_sub16 (sim_cpu *cpu, uint16_t r, uint16_t a, uint16_t b)
 STATIC_INLINE UNUSED void
 cpu_m68hc11_push_uint8 (sim_cpu *cpu, uint8_t val)
 {
-  uint16_t addr = cpu->cpu_regs.sp;
+  struct m68hc11_sim_cpu *m68hc11_cpu = M68HC11_SIM_CPU (cpu);
+  uint16_t addr = m68hc11_cpu->cpu_regs.sp;
 
   memory_write8 (cpu, addr, val);
-  cpu->cpu_regs.sp = addr - 1;
+  m68hc11_cpu->cpu_regs.sp = addr - 1;
 }
 
 STATIC_INLINE UNUSED void
 cpu_m68hc11_push_uint16 (sim_cpu *cpu, uint16_t val)
 {
-  uint16_t addr = cpu->cpu_regs.sp - 1;
+  struct m68hc11_sim_cpu *m68hc11_cpu = M68HC11_SIM_CPU (cpu);
+  uint16_t addr = m68hc11_cpu->cpu_regs.sp - 1;
 
   memory_write16 (cpu, addr, val);
-  cpu->cpu_regs.sp = addr - 1;
+  m68hc11_cpu->cpu_regs.sp = addr - 1;
 }
 
 STATIC_INLINE UNUSED uint8_t
 cpu_m68hc11_pop_uint8 (sim_cpu *cpu)
 {
-  uint16_t addr = cpu->cpu_regs.sp;
+  struct m68hc11_sim_cpu *m68hc11_cpu = M68HC11_SIM_CPU (cpu);
+  uint16_t addr = m68hc11_cpu->cpu_regs.sp;
   uint8_t val;
   
   val = memory_read8 (cpu, addr + 1);
-  cpu->cpu_regs.sp = addr + 1;
+  m68hc11_cpu->cpu_regs.sp = addr + 1;
   return val;
 }
 
 STATIC_INLINE UNUSED uint16_t
 cpu_m68hc11_pop_uint16 (sim_cpu *cpu)
 {
-  uint16_t addr = cpu->cpu_regs.sp;
+  struct m68hc11_sim_cpu *m68hc11_cpu = M68HC11_SIM_CPU (cpu);
+  uint16_t addr = m68hc11_cpu->cpu_regs.sp;
   uint16_t val;
   
   val = memory_read16 (cpu, addr + 1);
-  cpu->cpu_regs.sp = addr + 2;
+  m68hc11_cpu->cpu_regs.sp = addr + 2;
   return val;
 }
 
@@ -452,42 +454,46 @@ cpu_m68hc11_pop_uint16 (sim_cpu *cpu)
 STATIC_INLINE UNUSED void
 cpu_m68hc12_push_uint8 (sim_cpu *cpu, uint8_t val)
 {
-  uint16_t addr = cpu->cpu_regs.sp;
+  struct m68hc11_sim_cpu *m68hc11_cpu = M68HC11_SIM_CPU (cpu);
+  uint16_t addr = m68hc11_cpu->cpu_regs.sp;
 
   addr --;
   memory_write8 (cpu, addr, val);
-  cpu->cpu_regs.sp = addr;
+  m68hc11_cpu->cpu_regs.sp = addr;
 }
 
 STATIC_INLINE UNUSED void
 cpu_m68hc12_push_uint16 (sim_cpu *cpu, uint16_t val)
 {
-  uint16_t addr = cpu->cpu_regs.sp;
+  struct m68hc11_sim_cpu *m68hc11_cpu = M68HC11_SIM_CPU (cpu);
+  uint16_t addr = m68hc11_cpu->cpu_regs.sp;
 
   addr -= 2;
   memory_write16 (cpu, addr, val);
-  cpu->cpu_regs.sp = addr;
+  m68hc11_cpu->cpu_regs.sp = addr;
 }
 
 STATIC_INLINE UNUSED uint8_t
 cpu_m68hc12_pop_uint8 (sim_cpu *cpu)
 {
-  uint16_t addr = cpu->cpu_regs.sp;
+  struct m68hc11_sim_cpu *m68hc11_cpu = M68HC11_SIM_CPU (cpu);
+  uint16_t addr = m68hc11_cpu->cpu_regs.sp;
   uint8_t val;
   
   val = memory_read8 (cpu, addr);
-  cpu->cpu_regs.sp = addr + 1;
+  m68hc11_cpu->cpu_regs.sp = addr + 1;
   return val;
 }
 
 STATIC_INLINE UNUSED uint16_t
 cpu_m68hc12_pop_uint16 (sim_cpu *cpu)
 {
-  uint16_t addr = cpu->cpu_regs.sp;
+  struct m68hc11_sim_cpu *m68hc11_cpu = M68HC11_SIM_CPU (cpu);
+  uint16_t addr = m68hc11_cpu->cpu_regs.sp;
   uint16_t val;
   
   val = memory_read16 (cpu, addr);
-  cpu->cpu_regs.sp = addr + 2;
+  m68hc11_cpu->cpu_regs.sp = addr + 2;
   return val;
 }
 
@@ -495,22 +501,24 @@ cpu_m68hc12_pop_uint16 (sim_cpu *cpu)
 STATIC_INLINE UNUSED uint8_t
 cpu_fetch8 (sim_cpu *cpu)
 {
-  uint16_t addr = cpu->cpu_regs.pc;
+  struct m68hc11_sim_cpu *m68hc11_cpu = M68HC11_SIM_CPU (cpu);
+  uint16_t addr = m68hc11_cpu->cpu_regs.pc;
   uint8_t val;
   
   val = memory_read8 (cpu, addr);
-  cpu->cpu_regs.pc = addr + 1;
+  m68hc11_cpu->cpu_regs.pc = addr + 1;
   return val;
 }
 
 STATIC_INLINE UNUSED uint16_t
 cpu_fetch16 (sim_cpu *cpu)
 {
-  uint16_t addr = cpu->cpu_regs.pc;
+  struct m68hc11_sim_cpu *m68hc11_cpu = M68HC11_SIM_CPU (cpu);
+  uint16_t addr = m68hc11_cpu->cpu_regs.pc;
   uint16_t val;
   
   val = memory_read16 (cpu, addr);
-  cpu->cpu_regs.pc = addr + 2;
+  m68hc11_cpu->cpu_regs.pc = addr + 2;
   return val;
 }
 
