From patchwork Tue Oct 11 08:00:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Torbjorn SVENSSON X-Patchwork-Id: 58637 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 1FBFB3858289 for ; Tue, 11 Oct 2022 08:05:43 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 1FBFB3858289 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1665475543; bh=/7c8m+5uwL7XivoNLRYO3jW9rqRW1EcMZN/kywDpLDk=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=GrNeuwRyFYjkimda99O7S3/3P/U+aLfRjANZWNBMsXvhxTBRDa6bkJ2Qxc6nPBiUw Xo+esmrb5dMIKzDVlSmbprZSPbLF/NIAtoYkVOh7DqSVBrL30a7BDsGvLBR/njEPE6 gDKm3WwmDuVJ/bZpcB/1NaOC5dmPrZIbynb3BKqk= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by sourceware.org (Postfix) with ESMTPS id B3E763858C2D for ; Tue, 11 Oct 2022 08:05:16 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org B3E763858C2D Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 29B3172t026261; Tue, 11 Oct 2022 10:05:14 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3k4hwex1g9-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 11 Oct 2022 10:05:14 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id E3F2E100038; Tue, 11 Oct 2022 10:05:08 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id D2F93216EED; Tue, 11 Oct 2022 10:05:08 +0200 (CEST) Received: from jkgcxl0002.jkg.st.com (10.75.127.51) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2375.31; Tue, 11 Oct 2022 10:05:07 +0200 To: Subject: [PATCH v2] gdb/arm: Unwind S-registers for exception frames Date: Tue, 11 Oct 2022 10:00:26 +0200 Message-ID: <20221011080025.567502-1-torbjorn.svensson@foss.st.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Originating-IP: [10.75.127.51] X-ClientProxiedBy: SFHDAG2NODE3.st.com (10.75.127.6) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-10-11_03,2022-10-10_02,2022-06-22_01 X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, RCVD_IN_DNSWL_LOW, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: =?utf-8?q?Torbj=C3=B6rn_SVENSSON_via_Gdb-patches?= From: Torbjorn SVENSSON Reply-To: =?utf-8?q?Torbj=C3=B6rn_SVENSSON?= Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" After sending the v1 patch yesterday, I had an epiphany that the solution could be simplified. The v2 of the patch is an alternative implementation that appears to work equally well. Which do you prefer? Save the address on the stack that contains the value for the S-register when unwinding, just like already done for the D-registers. Signed-off-by: Torbjörn SVENSSON --- gdb/arm-tdep.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index d357066653b..f725d437825 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -3625,10 +3625,13 @@ arm_m_exception_cache (struct frame_info *this_frame) if (read_fp_regs_from_stack) { CORE_ADDR addr = unwound_sp + sp_r0_offset + 0x20; - for (int i = 0; i < 8; i++) + for (int i = 0; i < 16; i++) { - cache->saved_regs[ARM_D0_REGNUM + i].set_addr (addr); - addr += 8; + if (tdep->have_s_pseudos) + cache->saved_regs[tdep->s_pseudo_base + i].set_addr (addr); + if (i % 2 == 0) + cache->saved_regs[ARM_D0_REGNUM + i].set_addr (addr); + addr += 4; } } cache->saved_regs[ARM_FPSCR_REGNUM].set_addr (unwound_sp @@ -3641,10 +3644,14 @@ arm_m_exception_cache (struct frame_info *this_frame) if (read_fp_regs_from_stack) { CORE_ADDR addr = unwound_sp + sp_r0_offset + 0x68; - for (int i = 8; i < 16; i++) + for (int i = 16; i < 32; i++) { - cache->saved_regs[ARM_D0_REGNUM + i].set_addr (addr); - addr += 8; + if (tdep->have_s_pseudos) + cache->saved_regs[tdep->s_pseudo_base + i] + .set_addr (addr); + if (i % 2 == 0) + cache->saved_regs[ARM_D0_REGNUM + i].set_addr (addr); + addr += 4; } }