From patchwork Fri Jul 5 09:45:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alan Hayward X-Patchwork-Id: 33601 Received: (qmail 128603 invoked by alias); 5 Jul 2019 09:45:56 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 128512 invoked by uid 89); 5 Jul 2019 09:45:54 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-23.9 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_HELO_PASS autolearn=ham version=3.3.1 spammy=cleanups, HAccept-Language:en-GB X-HELO: EUR04-DB3-obe.outbound.protection.outlook.com Received: from mail-eopbgr60051.outbound.protection.outlook.com (HELO EUR04-DB3-obe.outbound.protection.outlook.com) (40.107.6.51) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 05 Jul 2019 09:45:50 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=qKQgVCNxmFzbZ+dGiWaWYS8Oqjno43nbn9cRnmS5wDE=; b=gYesB7sVw1IO4QBvKmctWgXQBOEGiGSKXdh1b0a67cd5IcGYqU2AAHR7UpHfYqh+Rwbw2gJ5XfFDgzFbMTd9iDldj9AmFXJkYJKiOz+q2qsh1meR6qCTTGLjUWu7HiIH18CxdaVInzTyX102jPymUVTXbeWs/t1fVMogl1irAOI= Received: from VI1PR08CA0248.eurprd08.prod.outlook.com (2603:10a6:803:dc::21) by AM5PR0802MB2594.eurprd08.prod.outlook.com (2603:10a6:203:99::10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2052.16; Fri, 5 Jul 2019 09:45:42 +0000 Received: from AM5EUR03FT046.eop-EUR03.prod.protection.outlook.com (2a01:111:f400:7e08::202) by VI1PR08CA0248.outlook.office365.com (2603:10a6:803:dc::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.2052.18 via Frontend Transport; Fri, 5 Jul 2019 09:45:42 +0000 Authentication-Results: spf=temperror (sender IP is 63.35.35.123) smtp.mailfrom=arm.com; sourceware.org; dkim=pass (signature was verified) header.d=armh.onmicrosoft.com; sourceware.org; dmarc=temperror action=none header.from=arm.com; Received-SPF: TempError (protection.outlook.com: error in processing during lookup of arm.com: DNS Timeout) Received: from 64aa7808-outbound-1.mta.getcheckrecipient.com (63.35.35.123) by AM5EUR03FT046.mail.protection.outlook.com (10.152.16.164) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.2052.18 via Frontend Transport; Fri, 5 Jul 2019 09:45:40 +0000 Received: ("Tessian outbound 189fc018761e:v23"); Fri, 05 Jul 2019 09:45:40 +0000 X-CheckRecipientChecked: true X-CR-MTA-CID: 77cfac4d8333c21d X-CR-MTA-TID: 64aa7808 Received: from 7ecfcbd9f912.4 (cr-mta-lb-1.cr-mta-net [104.47.13.53]) by 64aa7808-outbound-1.mta.getcheckrecipient.com id 506194D0-744A-4ED6-ACAB-8BE5C59BD4EE.1; Fri, 05 Jul 2019 09:45:34 +0000 Received: from EUR04-HE1-obe.outbound.protection.outlook.com (mail-he1eur04lp2053.outbound.protection.outlook.com [104.47.13.53]) by 64aa7808-outbound-1.mta.getcheckrecipient.com with ESMTPS id 7ecfcbd9f912.4 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384); Fri, 05 Jul 2019 09:45:34 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=qKQgVCNxmFzbZ+dGiWaWYS8Oqjno43nbn9cRnmS5wDE=; b=gYesB7sVw1IO4QBvKmctWgXQBOEGiGSKXdh1b0a67cd5IcGYqU2AAHR7UpHfYqh+Rwbw2gJ5XfFDgzFbMTd9iDldj9AmFXJkYJKiOz+q2qsh1meR6qCTTGLjUWu7HiIH18CxdaVInzTyX102jPymUVTXbeWs/t1fVMogl1irAOI= Received: from DB6PR0802MB2133.eurprd08.prod.outlook.com (10.172.227.22) by DB6PR0802MB2472.eurprd08.prod.outlook.com (10.172.251.20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2032.20; Fri, 5 Jul 2019 09:45:33 +0000 Received: from DB6PR0802MB2133.eurprd08.prod.outlook.com ([fe80::259b:8edf:fb65:2760]) by DB6PR0802MB2133.eurprd08.prod.outlook.com ([fe80::259b:8edf:fb65:2760%8]) with mapi id 15.20.2052.010; Fri, 5 Jul 2019 09:45:33 +0000 From: Alan Hayward To: "gdb-patches@sourceware.org" CC: nd , Alan Hayward Subject: [PATCH 1/7] Arm: Minor style cleanups Date: Fri, 5 Jul 2019 09:45:32 +0000 Message-ID: <20190705094525.51536-2-alan.hayward@arm.com> References: <20190705094525.51536-1-alan.hayward@arm.com> In-Reply-To: <20190705094525.51536-1-alan.hayward@arm.com> Authentication-Results-Original: spf=none (sender IP is ) smtp.mailfrom=Alan.Hayward@arm.com; X-Microsoft-Antispam-Untrusted: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600148)(711020)(4605104)(1401327)(4618075)(2017052603328)(7193020); SRVR:DB6PR0802MB2472; x-checkrecipientrouted: true x-ms-oob-tlc-oobclassifiers: OLM:7691;OLM:7691; X-Forefront-Antispam-Report-Untrusted: SFV:NSPM; SFS:(10009020)(4636009)(376002)(396003)(366004)(346002)(39860400002)(136003)(54534003)(189003)(199004)(68736007)(73956011)(44832011)(5660300002)(66946007)(66446008)(305945005)(66556008)(478600001)(6116002)(6916009)(25786009)(446003)(2906002)(3846002)(2616005)(50226002)(476003)(486006)(64756008)(66476007)(7736002)(2351001)(8936002)(86362001)(36756003)(53936002)(102836004)(4326008)(52116002)(81156014)(26005)(256004)(14454004)(76176011)(6512007)(6436002)(186003)(6486002)(81166006)(8676002)(1076003)(2501003)(71190400001)(316002)(11346002)(99286004)(14444005)(54906003)(66066001)(5640700003)(6506007)(386003)(71200400001)(72206003); DIR:OUT; SFP:1101; SCL:1; SRVR:DB6PR0802MB2472; H:DB6PR0802MB2133.eurprd08.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam-Message-Info-Original: GaaN6r3ifxQnYN6xxTZMN0q8N+gPfJdA+54GiX2Oei7B0YMqROvOoB619hc9aAMyabNUd5ql+iUMhX2IlsU07At4ypS3EHC+FAbKBlu0Yf90bzn0qq+OlyeTM22QrV8aPsekVz6BnKzsRP7x0brSjZRnPeWk6w3yzyUmtLQ4l00BUktiPy/IyptimTiuQTahVqwqxkuVsI/mMF+mSIJKMmreE18hypPb+PZQ2V5GkJWWziTLEE6M8UznDEiRcUfq7sSYZMwz1m/8MJT2hcmjZOQ6TvLKIhcdMq83DTYkvrXUkt8T6r4ICZeyL3RGbE5JZBaYE+M8xFjZTlHKwrwoOispugcACgdxltcghGATaFtaCkHWeT/ujYIHreTgM1HfIk4jB5czTJ6bxhXDhInmIc24Id2x2lSZWYYqMoPvksM= MIME-Version: 1.0 Original-Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Alan.Hayward@arm.com; Return-Path: Alan.Hayward@arm.com X-MS-Exchange-Transport-CrossTenantHeadersStripped: AM5EUR03FT046.eop-EUR03.prod.protection.outlook.com X-MS-Office365-Filtering-Correlation-Id-Prvs: 86e19028-2b6e-43f9-7031-08d7012d85c7 X-IsSubscribed: yes *When reading a target description, do the ptrace check before picking the target description. *In wmmxregset functions, declare the counter inside the for. *Call arm_linux_init_hwbp_cap from in arm_arch_setup - it doesn't belong in arm_read_description. gdb/ChangeLog: 2019-07-05 Alan Hayward * arm-linux-nat.c (arm_linux_nat_target::read_description): Check ptrace earlier, gdb/gdbserver/ChangeLog: 2019-07-05 Alan Hayward * linux-arm-low.c (arm_fill_wmmxregset, arm_store_wmmxregset): Move counter inside for. (arm_read_description): Check ptrace earlier. (arm_arch_setup): Call arm_linux_init_hwbp_cap here. --- gdb/arm-linux-nat.c | 27 ++++++++------------ gdb/gdbserver/linux-arm-low.c | 46 +++++++++++++---------------------- 2 files changed, 27 insertions(+), 46 deletions(-) diff --git a/gdb/arm-linux-nat.c b/gdb/arm-linux-nat.c index a1ad6fe01e..fe8a113a27 100644 --- a/gdb/arm-linux-nat.c +++ b/gdb/arm-linux-nat.c @@ -555,29 +555,22 @@ arm_linux_nat_target::read_description () if (arm_hwcap & HWCAP_VFP) { - int pid; - char *buf; - const struct target_desc * result = NULL; + /* Make sure that the kernel supports reading VFP registers. Support was + added in 2.6.30. */ + int pid = inferior_ptid.lwp (); + errno = 0; + char *buf = (char *) alloca (ARM_VFP3_REGS_SIZE); + if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0 && errno == EIO) + return nullptr; /* NEON implies VFPv3-D32 or no-VFP unit. Say that we only support Neon with VFPv3-D32. */ if (arm_hwcap & HWCAP_NEON) - result = tdesc_arm_with_neon; + return tdesc_arm_with_neon; else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3) - result = tdesc_arm_with_vfpv3; + return tdesc_arm_with_vfpv3; else - result = tdesc_arm_with_vfpv2; - - /* Now make sure that the kernel supports reading these - registers. Support was added in 2.6.30. */ - pid = inferior_ptid.lwp (); - errno = 0; - buf = (char *) alloca (ARM_VFP3_REGS_SIZE); - if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0 - && errno == EIO) - result = NULL; - - return result; + return tdesc_arm_with_vfpv2; } return this->beneath ()->read_description (); diff --git a/gdb/gdbserver/linux-arm-low.c b/gdb/gdbserver/linux-arm-low.c index b323b19078..7d6c9d9dd9 100644 --- a/gdb/gdbserver/linux-arm-low.c +++ b/gdb/gdbserver/linux-arm-low.c @@ -175,16 +175,14 @@ arm_cannot_fetch_register (int regno) static void arm_fill_wmmxregset (struct regcache *regcache, void *buf) { - int i; - if (regcache->tdesc != tdesc_arm_with_iwmmxt) return; - for (i = 0; i < 16; i++) + for (int i = 0; i < 16; i++) collect_register (regcache, arm_num_regs + i, (char *) buf + i * 8); /* We only have access to wcssf, wcasf, and wcgr0-wcgr3. */ - for (i = 0; i < 6; i++) + for (int i = 0; i < 6; i++) collect_register (regcache, arm_num_regs + i + 16, (char *) buf + 16 * 8 + i * 4); } @@ -192,16 +190,14 @@ arm_fill_wmmxregset (struct regcache *regcache, void *buf) static void arm_store_wmmxregset (struct regcache *regcache, const void *buf) { - int i; - if (regcache->tdesc != tdesc_arm_with_iwmmxt) return; - for (i = 0; i < 16; i++) + for (int i = 0; i < 16; i++) supply_register (regcache, arm_num_regs + i, (char *) buf + i * 8); /* We only have access to wcssf, wcasf, and wcgr0-wcgr3. */ - for (i = 0; i < 6; i++) + for (int i = 0; i < 6; i++) supply_register (regcache, arm_num_regs + i + 16, (char *) buf + 16 * 8 + i * 4); } @@ -850,40 +846,29 @@ get_next_pcs_syscall_next_pc (struct arm_get_next_pcs *self) static const struct target_desc * arm_read_description (void) { - int pid = lwpid_of (current_thread); unsigned long arm_hwcap = linux_get_hwcap (4); - /* Query hardware watchpoint/breakpoint capabilities. */ - arm_linux_init_hwbp_cap (pid); - if (arm_hwcap & HWCAP_IWMMXT) return tdesc_arm_with_iwmmxt; if (arm_hwcap & HWCAP_VFP) { - const struct target_desc *result; - char *buf; + /* Make sure that the kernel supports reading VFP registers. Support was + added in 2.6.30. */ + int pid = lwpid_of (current_thread); + errno = 0; + char *buf = (char *) alloca (ARM_VFP3_REGS_SIZE); + if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0 && errno == EIO) + return tdesc_arm; /* NEON implies either no VFP, or VFPv3-D32. We only support it with VFP. */ if (arm_hwcap & HWCAP_NEON) - result = tdesc_arm_with_neon; + return tdesc_arm_with_neon; else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3) - result = tdesc_arm_with_vfpv3; + return tdesc_arm_with_vfpv3; else - result = tdesc_arm_with_vfpv2; - - /* Now make sure that the kernel supports reading these - registers. Support was added in 2.6.30. */ - errno = 0; - buf = (char *) xmalloc (ARM_VFP3_REGS_SIZE); - if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0 - && errno == EIO) - result = tdesc_arm; - - free (buf); - - return result; + return tdesc_arm_with_vfpv2; } /* The default configuration uses legacy FPA registers, probably @@ -898,6 +883,9 @@ arm_arch_setup (void) int gpregs[18]; struct iovec iov; + /* Query hardware watchpoint/breakpoint capabilities. */ + arm_linux_init_hwbp_cap (tid); + current_process ()->tdesc = arm_read_description (); iov.iov_base = gpregs;