From patchwork Wed Jun 26 13:19:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alan Hayward X-Patchwork-Id: 33406 Received: (qmail 64716 invoked by alias); 26 Jun 2019 13:19:08 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 64708 invoked by uid 89); 26 Jun 2019 13:19:08 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-23.8 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_HELO_PASS, SPF_PASS autolearn=ham version=3.3.1 spammy= X-HELO: EUR02-AM5-obe.outbound.protection.outlook.com Received: from mail-eopbgr00066.outbound.protection.outlook.com (HELO EUR02-AM5-obe.outbound.protection.outlook.com) (40.107.0.66) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 26 Jun 2019 13:19:06 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=ea+4/DLfVnpk3HpKi4vYYU4+hwc2ey8GHUPwa5Jcnwc=; b=wZJB6M9+t6SYyqNN1ujdQSifhfcAMecvGXEPJJ3g2CLoqRdeTwTdVDZrkk+JgVWVu/D4IlwwpgPBVXw11YceKpcrF8cUZzDR69dkj42etESlmp4U+GtBK6Z0Tn1MnxXXQuNvubCKkdLELh1fenO+7vSwv2vOUWQ4bgP05gMpzg4= Received: from DB6PR0802MB2133.eurprd08.prod.outlook.com (10.172.227.22) by DB6PR0802MB2550.eurprd08.prod.outlook.com (10.172.251.148) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2008.17; Wed, 26 Jun 2019 13:19:03 +0000 Received: from DB6PR0802MB2133.eurprd08.prod.outlook.com ([fe80::259b:8edf:fb65:2760]) by DB6PR0802MB2133.eurprd08.prod.outlook.com ([fe80::259b:8edf:fb65:2760%8]) with mapi id 15.20.2008.017; Wed, 26 Jun 2019 13:19:03 +0000 From: Alan Hayward To: "gdb-patches@sourceware.org" CC: nd , Alan Hayward Subject: [PATCH 1/3] Arm/AArch64: Split DISPLACED_MODIFIED_INSNS name clash Date: Wed, 26 Jun 2019 13:19:03 +0000 Message-ID: <20190626131821.5616-1-alan.hayward@arm.com> authentication-results: spf=none (sender IP is ) smtp.mailfrom=Alan.Hayward@arm.com; x-ms-oob-tlc-oobclassifiers: OLM:9508; received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 MIME-Version: 1.0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: Alan.Hayward@arm.com X-IsSubscribed: yes Both targets define DISPLACED_MODIFIED_INSNS, each with different values. Add ARM_ and AARCH64_ to the start of the name to prevent confusion. No functionality changes. gdb/ChangeLog: 2019-06-26 Alan Hayward * aarch64-linux-tdep.c (aarch64_linux_init_abi): Use AARCH64_DISPLACED_MODIFIED_INSNS. * aarch64-tdep.c (struct aarch64_displaced_step_data) (aarch64_displaced_step_copy_insn): Likewise. * aarch64-tdep.h (DISPLACED_MODIFIED_INSNS): Rename from.. (AARCH64_DISPLACED_MODIFIED_INSNS): ...to this. * arm-linux-tdep.c (arm_linux_cleanup_svc): Use ARM_DISPLACED_MODIFIED_INSNS. * arm-tdep.c (arm_gdbarch_init): Likewise. * arm-tdep.h (DISPLACED_MODIFIED_INSNS): Rename from.. (ARM_DISPLACED_MODIFIED_INSNS): ...to this. (struct arm_displaced_step_closure): Use ARM_DISPLACED_MODIFIED_INSNS. --- gdb/aarch64-linux-tdep.c | 2 +- gdb/aarch64-tdep.c | 4 ++-- gdb/aarch64-tdep.h | 2 +- gdb/arm-linux-tdep.c | 2 +- gdb/arm-tdep.c | 2 +- gdb/arm-tdep.h | 4 ++-- 6 files changed, 8 insertions(+), 8 deletions(-) -- 2.20.1 (Apple Git-117) diff --git a/gdb/aarch64-linux-tdep.c b/gdb/aarch64-linux-tdep.c index 7f2193f2fa..831e62fb86 100644 --- a/gdb/aarch64-linux-tdep.c +++ b/gdb/aarch64-linux-tdep.c @@ -1658,7 +1658,7 @@ aarch64_linux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) set_gdbarch_get_syscall_number (gdbarch, aarch64_linux_get_syscall_number); /* Displaced stepping. */ - set_gdbarch_max_insn_length (gdbarch, 4 * DISPLACED_MODIFIED_INSNS); + set_gdbarch_max_insn_length (gdbarch, 4 * AARCH64_DISPLACED_MODIFIED_INSNS); set_gdbarch_displaced_step_copy_insn (gdbarch, aarch64_displaced_step_copy_insn); set_gdbarch_displaced_step_fixup (gdbarch, aarch64_displaced_step_fixup); diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c index 96ebce4c35..f33cee6622 100644 --- a/gdb/aarch64-tdep.c +++ b/gdb/aarch64-tdep.c @@ -2756,7 +2756,7 @@ struct aarch64_displaced_step_data /* The address where the instruction will be executed at. */ CORE_ADDR new_addr; /* Buffer of instructions to be copied to NEW_ADDR to execute. */ - uint32_t insn_buf[DISPLACED_MODIFIED_INSNS]; + uint32_t insn_buf[AARCH64_DISPLACED_MODIFIED_INSNS]; /* Number of instructions in INSN_BUF. */ unsigned insn_count; /* Registers when doing displaced stepping. */ @@ -3000,7 +3000,7 @@ aarch64_displaced_step_copy_insn (struct gdbarch *gdbarch, dsd.insn_count = 0; aarch64_relocate_instruction (insn, &visitor, (struct aarch64_insn_data *) &dsd); - gdb_assert (dsd.insn_count <= DISPLACED_MODIFIED_INSNS); + gdb_assert (dsd.insn_count <= AARCH64_DISPLACED_MODIFIED_INSNS); if (dsd.insn_count != 0) { diff --git a/gdb/aarch64-tdep.h b/gdb/aarch64-tdep.h index f73392d59b..e4b045b599 100644 --- a/gdb/aarch64-tdep.h +++ b/gdb/aarch64-tdep.h @@ -56,7 +56,7 @@ struct regset; /* The maximum number of modified instructions generated for one single-stepped instruction. */ -#define DISPLACED_MODIFIED_INSNS 1 +#define AARCH64_DISPLACED_MODIFIED_INSNS 1 /* Target-dependent structure in gdbarch. */ struct gdbarch_tdep diff --git a/gdb/arm-linux-tdep.c b/gdb/arm-linux-tdep.c index a5ad06434c..8c0c0585d7 100644 --- a/gdb/arm-linux-tdep.c +++ b/gdb/arm-linux-tdep.c @@ -954,7 +954,7 @@ arm_linux_cleanup_svc (struct gdbarch *gdbarch, within_scratch = (apparent_pc >= dsc->scratch_base && apparent_pc < (dsc->scratch_base - + DISPLACED_MODIFIED_INSNS * 4 + 4)); + + ARM_DISPLACED_MODIFIED_INSNS * 4 + 4)); if (debug_displaced) { diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 2ba77e207d..5b1f360f9f 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -9271,7 +9271,7 @@ arm_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) /* Note: for displaced stepping, this includes the breakpoint, and one word of additional scratch space. This setting isn't used for anything beside displaced stepping at present. */ - set_gdbarch_max_insn_length (gdbarch, 4 * DISPLACED_MODIFIED_INSNS); + set_gdbarch_max_insn_length (gdbarch, 4 * ARM_DISPLACED_MODIFIED_INSNS); /* This should be low enough for everything. */ tdep->lowest_pc = 0x20; diff --git a/gdb/arm-tdep.h b/gdb/arm-tdep.h index 23dd40ea8b..7da11656c2 100644 --- a/gdb/arm-tdep.h +++ b/gdb/arm-tdep.h @@ -152,7 +152,7 @@ struct gdbarch_tdep /* The maximum number of modified instructions generated for one single-stepped instruction, including the breakpoint (usually at the end of the instruction sequence) and any scratch words, etc. */ -#define DISPLACED_MODIFIED_INSNS 8 +#define ARM_DISPLACED_MODIFIED_INSNS 8 struct arm_displaced_step_closure : public displaced_step_closure { @@ -215,7 +215,7 @@ struct arm_displaced_step_closure : public displaced_step_closure - ARM instruction occupies one slot, - Thumb 16 bit instruction occupies one slot, - Thumb 32-bit instruction occupies *two* slots, one part for each. */ - unsigned long modinsn[DISPLACED_MODIFIED_INSNS]; + unsigned long modinsn[ARM_DISPLACED_MODIFIED_INSNS]; int numinsns; CORE_ADDR insn_addr; CORE_ADDR scratch_base;