From patchwork Fri Mar 22 16:27:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alan Hayward X-Patchwork-Id: 31942 Received: (qmail 85693 invoked by alias); 22 Mar 2019 16:27:31 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 85594 invoked by uid 89); 22 Mar 2019 16:27:31 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-25.2 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_HELO_PASS autolearn=ham version=3.3.1 spammy=LWP, converter, UD:core X-HELO: EUR03-AM5-obe.outbound.protection.outlook.com Received: from mail-eopbgr30040.outbound.protection.outlook.com (HELO EUR03-AM5-obe.outbound.protection.outlook.com) (40.107.3.40) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 22 Mar 2019 16:27:28 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector1-arm-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=sYeOTdY5GqlE7rjyWRhKLDF3ou944/un/vYQc8t8yKg=; b=B7fyOsilDmcBEIk89+inxUhnMEIEB06cMSCorLxdiBHKFtXIdSjsjpPhS5CCsr5HgKJwqdbmiEbWeVtWEN4cH1bCmLAk5tnNzIFXx59Y/rNWjQz/hk6XWsTiXMv2WMig0dekyQBA8pguqn81vbvLpK4TSK4fZf09nmpYZ185pyw= Received: from DB6PR0802MB2133.eurprd08.prod.outlook.com (10.172.227.22) by DB6PR0802MB2423.eurprd08.prod.outlook.com (10.172.247.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1709.14; Fri, 22 Mar 2019 16:27:25 +0000 Received: from DB6PR0802MB2133.eurprd08.prod.outlook.com ([fe80::2083:2d62:84fa:a547]) by DB6PR0802MB2133.eurprd08.prod.outlook.com ([fe80::2083:2d62:84fa:a547%3]) with mapi id 15.20.1730.013; Fri, 22 Mar 2019 16:27:25 +0000 From: Alan Hayward To: "gdb-patches@sourceware.org" CC: nd , Alan Hayward Subject: [PATCH 2/3] AArch64 SVE: Check for vector length change when getting gdbarch Date: Fri, 22 Mar 2019 16:27:25 +0000 Message-ID: <20190322162709.55222-3-alan.hayward@arm.com> References: <20190322162709.55222-1-alan.hayward@arm.com> In-Reply-To: <20190322162709.55222-1-alan.hayward@arm.com> authentication-results: spf=none (sender IP is ) smtp.mailfrom=Alan.Hayward@arm.com; received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 MIME-Version: 1.0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-IsSubscribed: yes Override the thread_architecture method, similar to SPU. If the vector length has changed, then find the arch using info, making sure the vector length is passed down to the init routine. In the init routine, ensure the arch has the correct vector length. Example output. Program is stopped in thread 2, just before it calls prctl to change the vector length (gdb) info threads Id Target Id Frame 1 Thread 0xffffbf6f4000 (LWP 3188) "sve_change" 0x0000ffffbf6ae130 in pthread_join () * 2 Thread 0xffffbf55e200 (LWP 3189) "sve_change" thread1 (arg=0xfeedface) at sve_change_size.c:28 (gdb) print $vg $1 = 8 (gdb) print $z0.s.u $2 = {623191333, 623191333, 623191333, 623191333, 0 } (gdb) n 29 int ret = prctl(PR_SVE_SET_VL, vl/2); (gdb) n 30 printf ("Changed: ret\n", ret); (gdb) print $vg $4 = 4 (gdb) print $z0.s.u $5 = {623191333, 623191333, 623191333, 623191333, 0, 0, 0, 0} (gdb) thr 1 [Switching to thread 1 (Thread 0xffffbf6f4000 (LWP 3181))] (gdb) print $vg $6 = 8 (gdb) print $z0.s.u $7 = {623191333, 623191333, 623191333, 623191333, 0 } 2019-03-22 Alan Hayward gdb/ * aarch64-linux-nat.c (aarch64_linux_nat_target::thread_architecture): Add override. * aarch64-tdep.c (aarch64_gdbarch_init): Ensure differemt tdesc for each VQ. --- gdb/aarch64-linux-nat.c | 31 +++++++++++++++++++++++++++++++ gdb/aarch64-tdep.c | 26 +++++++++++++++++++++----- 2 files changed, 52 insertions(+), 5 deletions(-) diff --git a/gdb/aarch64-linux-nat.c b/gdb/aarch64-linux-nat.c index 86c7e87dd5..1fe3b83aac 100644 --- a/gdb/aarch64-linux-nat.c +++ b/gdb/aarch64-linux-nat.c @@ -45,6 +45,7 @@ /* Defines ps_err_e, struct ps_prochandle. */ #include "gdb_proc_service.h" +#include "arch-utils.h" #ifndef TRAP_HWBKPT #define TRAP_HWBKPT 0x0004 @@ -94,6 +95,8 @@ public: /* Add our siginfo layout converter. */ bool low_siginfo_fixup (siginfo_t *ptrace, gdb_byte *inf, int direction) override; + + struct gdbarch *thread_architecture (ptid_t) override; }; static aarch64_linux_nat_target the_aarch64_linux_nat_target; @@ -939,6 +942,34 @@ aarch64_linux_nat_target::can_do_single_step () return 1; } +/* Implement the "thread_architecture" target_ops method. */ + +struct gdbarch * +aarch64_linux_nat_target::thread_architecture (ptid_t ptid) +{ + /* Return the gdbarch for the current thread. If the vector length has + changed since the last time this was called, then do a further lookup. */ + + uint64_t vq = aarch64_sve_get_vq (ptid.lwp ()); + + /* Find the current gdbarch the same way as process_stratum_target. Only + return it if the current vector length matches the one in the tdep. */ + inferior *inf = find_inferior_ptid (ptid); + gdb_assert (inf != NULL); + if (vq == gdbarch_tdep (inf->gdbarch)->vq) + return inf->gdbarch; + + /* We reach here if the vector length for the thread is different from its + value at process start. Lookup gdbarch via info (potentially creating a + new one), stashing the vector length inside id. Use -1 for when SVE + unavailable, to distinguish from an unset value of 0. */ + struct gdbarch_info info; + gdbarch_info_init (&info); + info.bfd_arch_info = bfd_lookup_arch (bfd_arch_spu, bfd_mach_spu); + info.id = (int *) (vq == 0 ? -1 : vq); + return gdbarch_find_by_info (info); +} + /* Define AArch64 maintenance commands. */ static void diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c index 3eb22a8502..737b430d48 100644 --- a/gdb/aarch64-tdep.c +++ b/gdb/aarch64-tdep.c @@ -3155,20 +3155,36 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) int i, num_regs = 0, num_pseudo_regs = 0; int first_pauth_regnum = -1, pauth_ra_state_offset = -1; + /* Use the vector length passed via the target info. Here -1 is used for no + SVE, and 0 is unset. If unset then use the vector length from the existing + tdesc. */ + uint64_t vq = 0; + if (info.id == (int *) -1) + vq = 0; + else if (info.id != 0) + vq = (uint64_t) info.id; + else + vq = aarch64_get_tdesc_vq (info.target_desc); + + if (vq > AARCH64_MAX_SVE_VQ) + internal_error (__FILE__, __LINE__, _("VQ out of bounds: %ld (max %d)"), + vq, AARCH64_MAX_SVE_VQ); + /* If there is already a candidate, use it. */ for (gdbarch_list *best_arch = gdbarch_list_lookup_by_info (arches, &info); best_arch != nullptr; best_arch = gdbarch_list_lookup_by_info (best_arch->next, &info)) { struct gdbarch_tdep *tdep = gdbarch_tdep (best_arch->gdbarch); - if (tdep) + if (tdep && tdep->vq == vq) return best_arch->gdbarch; } - /* Ensure we always have a target description. */ + /* Ensure we always have a target descriptor, and that it is for the given VQ + value. */ const struct target_desc *tdesc = info.target_desc; - if (!tdesc_has_registers (tdesc)) - tdesc = aarch64_read_description (0, false); + if (!tdesc_has_registers (tdesc) || vq != aarch64_get_tdesc_vq (tdesc)) + tdesc = aarch64_read_description (vq, false); gdb_assert (tdesc); feature_core = tdesc_find_feature (tdesc,"org.gnu.gdb.aarch64.core"); @@ -3261,7 +3277,7 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) tdep->lowest_pc = 0x20; tdep->jb_pc = -1; /* Longjump support not enabled by default. */ tdep->jb_elt_size = 8; - tdep->vq = aarch64_get_tdesc_vq (tdesc); + tdep->vq = vq; tdep->pauth_reg_base = first_pauth_regnum; tdep->pauth_ra_state_regnum = (feature_pauth == NULL) ? -1 : pauth_ra_state_offset + num_regs;