From patchwork Fri Mar 22 16:27:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alan Hayward X-Patchwork-Id: 31941 Received: (qmail 85569 invoked by alias); 22 Mar 2019 16:27:30 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 85519 invoked by uid 89); 22 Mar 2019 16:27:30 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-25.0 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_HELO_PASS autolearn=ham version=3.3.1 spammy=UD:core X-HELO: EUR02-AM5-obe.outbound.protection.outlook.com Received: from mail-eopbgr00078.outbound.protection.outlook.com (HELO EUR02-AM5-obe.outbound.protection.outlook.com) (40.107.0.78) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 22 Mar 2019 16:27:28 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector1-arm-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=GuczhQaaJErxhE/f/JhyluZzc7PhYqhjc1CxDMFNvFA=; b=lhhmP/o1F3mmyIs2KZB0EFRiVwXiCp+X22CzVjB80YqMqUO/nUx9oDeLD2qUiF+WK06mfV7KPCnMeoPgvEmqxVEBSNmiZ1GJ4Evk+0sAYSBpRjg8mL5+HMFLbL8CCrgihFL9UHvey3gQduGip9zUR+GVPzezzuQ32NXF/2X/B3s= Received: from DB6PR0802MB2133.eurprd08.prod.outlook.com (10.172.227.22) by DB6PR0802MB2565.eurprd08.prod.outlook.com (10.172.251.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1730.17; Fri, 22 Mar 2019 16:27:25 +0000 Received: from DB6PR0802MB2133.eurprd08.prod.outlook.com ([fe80::2083:2d62:84fa:a547]) by DB6PR0802MB2133.eurprd08.prod.outlook.com ([fe80::2083:2d62:84fa:a547%3]) with mapi id 15.20.1730.013; Fri, 22 Mar 2019 16:27:25 +0000 From: Alan Hayward To: "gdb-patches@sourceware.org" CC: nd , Alan Hayward Subject: [PATCH 1/3] AArch64: Tidy up aarch64_gdbarch_init Date: Fri, 22 Mar 2019 16:27:25 +0000 Message-ID: <20190322162709.55222-2-alan.hayward@arm.com> References: <20190322162709.55222-1-alan.hayward@arm.com> In-Reply-To: <20190322162709.55222-1-alan.hayward@arm.com> authentication-results: spf=none (sender IP is ) smtp.mailfrom=Alan.Hayward@arm.com; received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 MIME-Version: 1.0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-IsSubscribed: yes Move the lookup_by_info to the top of the function to avoid unnecessarily creating a new feature when the gdbarch already exists. Add some additional cleanups that have no functional effect. gdb/ChangeLog: 2019-03-22 Alan Hayward * aarch64-tdep.c (aarch64_gdbarch_init): Move gdbarch lookup. --- gdb/aarch64-tdep.c | 68 ++++++++++++++++++---------------------------- 1 file changed, 26 insertions(+), 42 deletions(-) diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c index 247d0ed4c6..3eb22a8502 100644 --- a/gdb/aarch64-tdep.c +++ b/gdb/aarch64-tdep.c @@ -3149,36 +3149,37 @@ aarch64_cannot_store_register (struct gdbarch *gdbarch, int regnum) static struct gdbarch * aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) { - struct gdbarch_tdep *tdep; - struct gdbarch *gdbarch; - struct gdbarch_list *best_arch; - struct tdesc_arch_data *tdesc_data = NULL; - const struct target_desc *tdesc = info.target_desc; - int i; - int valid_p = 1; - const struct tdesc_feature *feature_core; - const struct tdesc_feature *feature_fpu; - const struct tdesc_feature *feature_sve; + const struct tdesc_feature *feature_core, *feature_fpu, *feature_sve; const struct tdesc_feature *feature_pauth; - int num_regs = 0; - int num_pseudo_regs = 0; - int first_pauth_regnum = -1; - int pauth_ra_state_offset = -1; + bool valid_p = true; + int i, num_regs = 0, num_pseudo_regs = 0; + int first_pauth_regnum = -1, pauth_ra_state_offset = -1; + + /* If there is already a candidate, use it. */ + for (gdbarch_list *best_arch = gdbarch_list_lookup_by_info (arches, &info); + best_arch != nullptr; + best_arch = gdbarch_list_lookup_by_info (best_arch->next, &info)) + { + struct gdbarch_tdep *tdep = gdbarch_tdep (best_arch->gdbarch); + if (tdep) + return best_arch->gdbarch; + } /* Ensure we always have a target description. */ + const struct target_desc *tdesc = info.target_desc; if (!tdesc_has_registers (tdesc)) tdesc = aarch64_read_description (0, false); gdb_assert (tdesc); - feature_core = tdesc_find_feature (tdesc, "org.gnu.gdb.aarch64.core"); + feature_core = tdesc_find_feature (tdesc,"org.gnu.gdb.aarch64.core"); feature_fpu = tdesc_find_feature (tdesc, "org.gnu.gdb.aarch64.fpu"); feature_sve = tdesc_find_feature (tdesc, "org.gnu.gdb.aarch64.sve"); feature_pauth = tdesc_find_feature (tdesc, "org.gnu.gdb.aarch64.pauth"); - if (feature_core == NULL) - return NULL; + if (feature_core == nullptr) + return nullptr; - tdesc_data = tdesc_data_alloc (); + struct tdesc_arch_data *tdesc_data = tdesc_data_alloc (); /* Validate the description provides the mandatory core R registers and allocate their numbers. */ @@ -3190,9 +3191,9 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) num_regs = AARCH64_X0_REGNUM + i; /* Add the V registers. */ - if (feature_fpu != NULL) + if (feature_fpu != nullptr) { - if (feature_sve != NULL) + if (feature_sve != nullptr) error (_("Program contains both fpu and SVE features.")); /* Validate the description provides the mandatory V registers @@ -3206,7 +3207,7 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) } /* Add the SVE registers. */ - if (feature_sve != NULL) + if (feature_sve != nullptr) { /* Validate the description provides the mandatory SVE registers and allocate their numbers. */ @@ -3219,7 +3220,7 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) num_pseudo_regs += 32; /* add the Vn register pseudos. */ } - if (feature_fpu != NULL || feature_sve != NULL) + if (feature_fpu != nullptr || feature_sve != nullptr) { num_pseudo_regs += 32; /* add the Qn scalar register pseudos */ num_pseudo_regs += 32; /* add the Dn scalar register pseudos */ @@ -3247,30 +3248,14 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) if (!valid_p) { tdesc_data_cleanup (tdesc_data); - return NULL; + return nullptr; } /* AArch64 code is always little-endian. */ info.byte_order_for_code = BFD_ENDIAN_LITTLE; - /* If there is already a candidate, use it. */ - for (best_arch = gdbarch_list_lookup_by_info (arches, &info); - best_arch != NULL; - best_arch = gdbarch_list_lookup_by_info (best_arch->next, &info)) - { - /* Found a match. */ - break; - } - - if (best_arch != NULL) - { - if (tdesc_data != NULL) - tdesc_data_cleanup (tdesc_data); - return best_arch->gdbarch; - } - - tdep = XCNEW (struct gdbarch_tdep); - gdbarch = gdbarch_alloc (&info, tdep); + struct gdbarch_tdep *tdep = XCNEW (struct gdbarch_tdep); + struct gdbarch *gdbarch = gdbarch_alloc (&info, tdep); /* This should be low enough for everything. */ tdep->lowest_pc = 0x20; @@ -3281,7 +3266,6 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) tdep->pauth_ra_state_regnum = (feature_pauth == NULL) ? -1 : pauth_ra_state_offset + num_regs; - set_gdbarch_push_dummy_call (gdbarch, aarch64_push_dummy_call); set_gdbarch_frame_align (gdbarch, aarch64_frame_align);