From patchwork Fri Oct 19 21:49:07 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jim Wilson X-Patchwork-Id: 29812 Received: (qmail 116359 invoked by alias); 19 Oct 2018 21:49:35 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 116197 invoked by uid 89); 19 Oct 2018 21:49:33 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-23.5 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_PASS, UNWANTED_LANGUAGE_BODY autolearn=ham version=3.3.2 spammy=Hx-languages-length:4370, HX-Received:3fe4, HX-Received:sk:a91-v6m, gdbarch_tdep X-HELO: mail-pl1-f193.google.com Received: from mail-pl1-f193.google.com (HELO mail-pl1-f193.google.com) (209.85.214.193) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 19 Oct 2018 21:49:32 +0000 Received: by mail-pl1-f193.google.com with SMTP id e67-v6so7422059plb.6 for ; Fri, 19 Oct 2018 14:49:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=OaH50/L51IWPwqIdwUHsu7jwUYO3q7lx8g3ZEO7OrMY=; b=H28BvrTw3PSS2C1rDql997VZGiKODemlfD2+g3cWOlmYPuYJ6jD4qKZqcdbzW/rSsI 6NS6s1B5/cI/FhOeNYa4YQLRIivDI6CsflONgyqvh/iWIiuj9gOgtBHLCUBQjCAMxzuR BFjHtGqrNBUidPP972iyITr7v30MfZCQSw0ErBXGdzaDGHhUmww70JlDcAgGrSmx/evT WhaBv+0mdjyE/nWe9KghO0sEbKkEWjZlYv2CrhXSGUIaz7bivT1ITsf/dJh7T5tvhTwI N2Xz+S1KcrG3Yj1o7OHhYPjHcJmVMpNsSwBnnAVZYv8KKzboSRmSkTC6GLuc2pBR6mLh lPHA== Return-Path: Received: from rohan.guest.sifive.com ([12.206.222.5]) by smtp.gmail.com with ESMTPSA id a79-v6sm34925763pfa.124.2018.10.19.14.49.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 19 Oct 2018 14:49:29 -0700 (PDT) From: Jim Wilson To: gdb-patches@sourceware.org Cc: Andrew Burgess , Jim Wilson Subject: [PATCH 1/2] RISC-V: Print FP regs as union of float types. Date: Fri, 19 Oct 2018 14:49:07 -0700 Message-Id: <20181019214907.8939-1-jimw@sifive.com> In-Reply-To: References: A 64-bit FP register can hold either a single or double float value, so print it as both types by using a union type for FP registers. Likewise for 128-bit regs which can also hold long double. gdb/ * riscv-tdep.c (riscv_fpreg_d_type, riscv_fpreg_q_type): New. (riscv_register_type): Use them. (riscv_print_one_register_info): Handle union of floats same as float. * riscv-tdep.h (struct gdbarch_tdep): Add riscv_fpreg_d_type and riscv_fpreg_q_type fields. --- gdb/riscv-tdep.c | 85 ++++++++++++++++++++++++++++++++++++++++++++++-- gdb/riscv-tdep.h | 4 +++ 2 files changed, 86 insertions(+), 3 deletions(-) diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c index 3402241b97..a4d732f6f9 100644 --- a/gdb/riscv-tdep.c +++ b/gdb/riscv-tdep.c @@ -495,6 +495,76 @@ riscv_register_name (struct gdbarch *gdbarch, int regnum) return NULL; } +/* Construct a type for 64-bit FP registers. */ + +static struct type * +riscv_fpreg_d_type (struct gdbarch *gdbarch) +{ + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + + if (!tdep->riscv_fpreg_d_type) + { + const struct builtin_type *bt = builtin_type (gdbarch); + + /* The type we're building is this: */ +#if 0 + union __gdb_builtin_type_fpreg_d + { + float f; + double d; + }; +#endif + + struct type *t; + + t = arch_composite_type (gdbarch, + "__gdb_builtin_type_fpreg_d", TYPE_CODE_UNION); + append_composite_type_field (t, "float", bt->builtin_float); + append_composite_type_field (t, "double", bt->builtin_double); + TYPE_VECTOR (t) = 1; + TYPE_NAME (t) = "builtin_type_fpreg_d"; + tdep->riscv_fpreg_d_type = t; + } + + return tdep->riscv_fpreg_d_type; +} + +/* Construct a type for 128-bit FP registers. */ + +static struct type * +riscv_fpreg_q_type (struct gdbarch *gdbarch) +{ + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + + if (!tdep->riscv_fpreg_q_type) + { + const struct builtin_type *bt = builtin_type (gdbarch); + + /* The type we're building is this: */ +#if 0 + union __gdb_builtin_type_fpreg_d + { + float f; + double d; + long double ld; + }; +#endif + + struct type *t; + + t = arch_composite_type (gdbarch, + "__gdb_builtin_type_fpreg_q", TYPE_CODE_UNION); + append_composite_type_field (t, "float", bt->builtin_float); + append_composite_type_field (t, "double", bt->builtin_double); + append_composite_type_field (t, "long double", bt->builtin_long_double); + TYPE_VECTOR (t) = 1; + TYPE_NAME (t) = "builtin_type_fpreg_q"; + tdep->riscv_fpreg_q_type = t; + } + + return tdep->riscv_fpreg_q_type; +} + /* Implement the register_type gdbarch method. */ static struct type * @@ -537,9 +607,9 @@ riscv_register_type (struct gdbarch *gdbarch, int regnum) case 4: return builtin_type (gdbarch)->builtin_float; case 8: - return builtin_type (gdbarch)->builtin_double; + return riscv_fpreg_d_type (gdbarch); case 16: - return builtin_type (gdbarch)->builtin_long_double; + return riscv_fpreg_q_type (gdbarch); default: internal_error (__FILE__, __LINE__, _("unknown isa regsize %i"), regsize); @@ -591,7 +661,16 @@ riscv_print_one_register_info (struct gdbarch *gdbarch, print_raw_format = (value_entirely_available (val) && !value_optimized_out (val)); - if (TYPE_CODE (regtype) == TYPE_CODE_FLT) + if (TYPE_CODE (regtype) == TYPE_CODE_FLT + || (TYPE_CODE (regtype) == TYPE_CODE_UNION + && TYPE_NFIELDS (regtype) == 2 + && TYPE_CODE (TYPE_FIELD_TYPE (regtype, 0)) == TYPE_CODE_FLT + && TYPE_CODE (TYPE_FIELD_TYPE (regtype, 1)) == TYPE_CODE_FLT) + || (TYPE_CODE (regtype) == TYPE_CODE_UNION + && TYPE_NFIELDS (regtype) == 3 + && TYPE_CODE (TYPE_FIELD_TYPE (regtype, 0)) == TYPE_CODE_FLT + && TYPE_CODE (TYPE_FIELD_TYPE (regtype, 1)) == TYPE_CODE_FLT + && TYPE_CODE (TYPE_FIELD_TYPE (regtype, 2)) == TYPE_CODE_FLT)) { struct value_print_options opts; const gdb_byte *valaddr = value_contents_for_printing (val); diff --git a/gdb/riscv-tdep.h b/gdb/riscv-tdep.h index 8a2454eb66..e04e728f32 100644 --- a/gdb/riscv-tdep.h +++ b/gdb/riscv-tdep.h @@ -78,6 +78,10 @@ struct gdbarch_tdep features that are supported on the target. These could be cached from the target, or read from the executable when available. */ unsigned core_features; + + /* ISA-specific data types. */ + struct type *riscv_fpreg_d_type; + struct type *riscv_fpreg_q_type; }; /* Return the width in bytes of the general purpose registers for GDBARCH. */