From patchwork Wed Aug 8 02:14:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jim Wilson X-Patchwork-Id: 28779 Received: (qmail 112841 invoked by alias); 8 Aug 2018 02:15:39 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 112463 invoked by uid 89); 8 Aug 2018 02:15:31 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.0 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-oi0-f67.google.com Received: from mail-oi0-f67.google.com (HELO mail-oi0-f67.google.com) (209.85.218.67) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 08 Aug 2018 02:15:29 +0000 Received: by mail-oi0-f67.google.com with SMTP id m11-v6so1184842oic.2 for ; Tue, 07 Aug 2018 19:15:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=4CKF47bggyR39fJMeMD7ULbuUPYwLBDrwS/413PFHiM=; b=JJmPi0P/UCJHP2Nl3X4ghwiXe9mS7kzbwR4XSCnhqmNvIXg5lU6itlqYntL0A3gGNw /hSftu48tWtlXxggDSB4cP8nP0IZZHecvD/njCPR/uNt1CB5CSzorbSX8ZcV87mgjojl Izn+N1FaWaTrp7kAbyW2eCPCxzC2szRY1d8J+MM6ceOY+fKtC3c+hLZ4AxH0vJ+mBYxk a9Q4I8NFQ4Fwz93ipydU3KF9j3nP9YBiMbzvC70qvh6qjdtuO6SPXntKC94lmhQLe7iB l9iLWMklhrDWjjrzy8VBalcr7YhBCoweF7onYQT7crDw+YJ2FqiGsj1ugHvH8IzuO4u2 g0UQ== Return-Path: Received: from rohan.guest.sifive.com ([12.206.222.5]) by smtp.gmail.com with ESMTPSA id e204-v6sm6423782oif.21.2018.08.07.19.15.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 07 Aug 2018 19:15:26 -0700 (PDT) From: Jim Wilson To: gdb-patches@sourceware.org Cc: Jim Wilson Subject: [PATCH 1/5] RISC-V: Make riscv_isa_xlen a global function. Date: Tue, 7 Aug 2018 19:14:06 -0700 Message-Id: <20180808021406.7587-1-jimw@sifive.com> In-Reply-To: References: This allows the function to be used from riscv OS files, which also need to depend on XLEN size. gdb/ * riscv-tdep.c (riscv_isa_xlen): Drop static. * riscv-tdep.h (riscv_isa_xlen): Add extern declaration. --- gdb/riscv-tdep.c | 2 +- gdb/riscv-tdep.h | 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c index abcac98016..20181896c5 100644 --- a/gdb/riscv-tdep.c +++ b/gdb/riscv-tdep.c @@ -346,7 +346,7 @@ riscv_has_feature (struct gdbarch *gdbarch, char feature) Possible return values are 4, 8, or 16 for RiscV variants RV32, RV64, or RV128. */ -static int +int riscv_isa_xlen (struct gdbarch *gdbarch) { switch (gdbarch_tdep (gdbarch)->abi.fields.base_len) diff --git a/gdb/riscv-tdep.h b/gdb/riscv-tdep.h index 4fc05976ba..b35266daf7 100644 --- a/gdb/riscv-tdep.h +++ b/gdb/riscv-tdep.h @@ -76,4 +76,7 @@ struct gdbarch_tdep unsigned core_features; }; +/* Return the width in bytes of the general purpose registers for GDBARCH. */ +extern int riscv_isa_xlen (struct gdbarch *gdbarch); + #endif /* RISCV_TDEP_H */