From patchwork Fri Jul 13 13:52:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pedro Franco de Carvalho X-Patchwork-Id: 28374 Received: (qmail 100192 invoked by alias); 13 Jul 2018 13:53:40 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 100075 invoked by uid 89); 13 Jul 2018 13:53:39 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-27.3 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mx0a-001b2d01.pphosted.com Received: from mx0a-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com) (148.163.156.1) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 13 Jul 2018 13:53:37 +0000 Received: from pps.filterd (m0098394.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w6DDn9eB077507 for ; Fri, 13 Jul 2018 09:53:35 -0400 Received: from e34.co.us.ibm.com (e34.co.us.ibm.com [32.97.110.152]) by mx0a-001b2d01.pphosted.com with ESMTP id 2k6vn9a11h-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Fri, 13 Jul 2018 09:53:35 -0400 Received: from localhost by e34.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 13 Jul 2018 07:53:32 -0600 Received: from b03ledav006.gho.boulder.ibm.com (b03ledav006.gho.boulder.ibm.com [9.17.130.237]) by b03cxnp08027.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w6DDrUV065339472 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 13 Jul 2018 06:53:30 -0700 Received: from b03ledav006.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 81479C605B; Fri, 13 Jul 2018 07:53:30 -0600 (MDT) Received: from b03ledav006.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 17CBCC6057; Fri, 13 Jul 2018 07:53:30 -0600 (MDT) Received: from pedro.localdomain (unknown [9.85.180.127]) by b03ledav006.gho.boulder.ibm.com (Postfix) with ESMTP; Fri, 13 Jul 2018 07:53:30 -0600 (MDT) Received: by pedro.localdomain (Postfix, from userid 1000) id EC88B3C04AE; Fri, 13 Jul 2018 10:53:24 -0300 (-03) From: Pedro Franco de Carvalho To: gdb-patches@sourceware.org Cc: uweigand@de.ibm.com, edjunior@gmail.com Subject: [PATCH 07/17] [PowerPC] Add gdbserver support for PPR and DSCR Date: Fri, 13 Jul 2018 10:52:16 -0300 In-Reply-To: <20180713135226.2321-1-pedromfc@linux.ibm.com> References: <20180713135226.2321-1-pedromfc@linux.ibm.com> x-cbid: 18071313-0016-0000-0000-000009079FFE X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00009363; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000266; SDB=6.01060763; UDB=6.00544526; IPR=6.00838682; MB=3.00022128; MTD=3.00000008; XFM=3.00000015; UTC=2018-07-13 13:53:34 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18071313-0017-0000-0000-00003F9E2A27 Message-Id: <20180713135226.2321-8-pedromfc@linux.ibm.com> From: Edjunior Barbosa Machado This patch extends support for the Program Priority Register and the Data Stream Control Register to the powerpc linux gdbserver stub. gdb/gdbserver/ChangeLog: YYYY-MM-DD Edjunior Barbosa Machado Pedro Franco de Carvalho * linux-ppc-tdesc-init.h (enum ppc_linux_tdesc) : New enum value. (init_registers_powerpc_isa205_ppr_dscr_vsx32l) (init_registers_powerpc_isa205_ppr_dscr_vsx64l): Declare. * linux-ppc-low.c: Include "elf/common.h" and . (ppc_hwcap2): New global. (ppc_check_regset, ppc_fill_pprregset, ppc_store_pprregset) (ppc_fill_dscrregset, ppc_store_dscrregset): New functions. (ppc_regsets): Add entries for the DSCR and PPR regsets. (ppc_arch_setup): Get AT_HWCAP2. Set ppr_dscr in features struct when needed. Set sizes for the the DSCR and PPR regsets. (ppc_get_ipa_tdesc_idx): Return PPC_TDESC_ISA205_PPR_DSCR_VSX. (initialize_low_arch): Call init_registers_powerpc_isa205_ppr_dscr_vsx32l and init_registers_powerpc_isa205_ppr_dscr_vsx64l. * linux-ppc-ipa.c (get_ipa_tdesc): Handle PPC_TDESC_ISA205_PPR_DSCR_VSX. (initialize_low_tracepoint): Call init_registers_powerpc_isa205_ppr_dscr_vsx32l and init_registers_powerpc_isa205_ppr_dscr_vsx64l. --- gdb/gdbserver/linux-ppc-ipa.c | 6 +++ gdb/gdbserver/linux-ppc-low.c | 81 ++++++++++++++++++++++++++++++++++++ gdb/gdbserver/linux-ppc-tdesc-init.h | 7 ++++ 3 files changed, 94 insertions(+) diff --git a/gdb/gdbserver/linux-ppc-ipa.c b/gdb/gdbserver/linux-ppc-ipa.c index f6861f0d98..c8b4c3b2da 100644 --- a/gdb/gdbserver/linux-ppc-ipa.c +++ b/gdb/gdbserver/linux-ppc-ipa.c @@ -191,6 +191,8 @@ get_ipa_tdesc (int idx) return tdesc_powerpc_isa205_altivec64l; case PPC_TDESC_ISA205_VSX: return tdesc_powerpc_isa205_vsx64l; + case PPC_TDESC_ISA205_PPR_DSCR_VSX: + return tdesc_powerpc_isa205_ppr_dscr_vsx64l; #else case PPC_TDESC_BASE: return tdesc_powerpc_32l; @@ -206,6 +208,8 @@ get_ipa_tdesc (int idx) return tdesc_powerpc_isa205_altivec32l; case PPC_TDESC_ISA205_VSX: return tdesc_powerpc_isa205_vsx32l; + case PPC_TDESC_ISA205_PPR_DSCR_VSX: + return tdesc_powerpc_isa205_ppr_dscr_vsx32l; case PPC_TDESC_E500: return tdesc_powerpc_e500l; #endif @@ -234,6 +238,7 @@ initialize_low_tracepoint (void) init_registers_powerpc_isa205_64l (); init_registers_powerpc_isa205_altivec64l (); init_registers_powerpc_isa205_vsx64l (); + init_registers_powerpc_isa205_ppr_dscr_vsx64l (); #else init_registers_powerpc_32l (); init_registers_powerpc_altivec32l (); @@ -242,6 +247,7 @@ initialize_low_tracepoint (void) init_registers_powerpc_isa205_32l (); init_registers_powerpc_isa205_altivec32l (); init_registers_powerpc_isa205_vsx32l (); + init_registers_powerpc_isa205_ppr_dscr_vsx32l (); init_registers_powerpc_e500l (); #endif } diff --git a/gdb/gdbserver/linux-ppc-low.c b/gdb/gdbserver/linux-ppc-low.c index 47428c1529..502ce674fc 100644 --- a/gdb/gdbserver/linux-ppc-low.c +++ b/gdb/gdbserver/linux-ppc-low.c @@ -20,6 +20,8 @@ #include "server.h" #include "linux-low.h" +#include "elf/common.h" +#include #include #include @@ -42,6 +44,7 @@ #define PPC_BD(insn) (PPC_SEXT (PPC_FIELD (insn, 16, 14), 14) << 2) static unsigned long ppc_hwcap; +static unsigned long ppc_hwcap2; #define ppc_num_regs 73 @@ -117,6 +120,21 @@ static int ppc_regmap_e500[] = #endif static int +ppc_check_regset (int tid, int regset_id, int regsetsize) +{ + void *buf = alloca (regsetsize); + struct iovec iov; + + iov.iov_base = buf; + iov.iov_len = regsetsize; + + if (ptrace (PTRACE_GETREGSET, tid, regset_id, &iov) >= 0 + || errno == ENODATA) + return 1; + return 0; +} + +static int ppc_cannot_store_register (int regno) { const struct target_desc *tdesc = current_process ()->tdesc; @@ -460,6 +478,38 @@ static void ppc_fill_gregset (struct regcache *regcache, void *buf) } static void +ppc_fill_pprregset (struct regcache *regcache, void *buf) +{ + char *ppr = (char *) buf; + + collect_register_by_name (regcache, "ppr", ppr); +} + +static void +ppc_store_pprregset (struct regcache *regcache, const void *buf) +{ + const char *ppr = (const char *) buf; + + supply_register_by_name (regcache, "ppr", ppr); +} + +static void +ppc_fill_dscrregset (struct regcache *regcache, void *buf) +{ + char *dscr = (char *) buf; + + collect_register_by_name (regcache, "dscr", dscr); +} + +static void +ppc_store_dscrregset (struct regcache *regcache, const void *buf) +{ + const char *dscr = (const char *) buf; + + supply_register_by_name (regcache, "dscr", dscr); +} + +static void ppc_fill_vsxregset (struct regcache *regcache, void *buf) { int i, base; @@ -572,6 +622,10 @@ static struct regset_info ppc_regsets[] = { fetch them every time, but still fall back to PTRACE_PEEKUSER for the general registers. Some kernels support these, but not the newer PPC_PTRACE_GETREGS. */ + { PTRACE_GETREGSET, PTRACE_SETREGSET, NT_PPC_PPR, 0, EXTENDED_REGS, + ppc_fill_pprregset, ppc_store_pprregset }, + { PTRACE_GETREGSET, PTRACE_SETREGSET, NT_PPC_DSCR, 0, EXTENDED_REGS, + ppc_fill_dscrregset, ppc_store_dscrregset }, { PTRACE_GETVSXREGS, PTRACE_SETVSXREGS, 0, 0, EXTENDED_REGS, ppc_fill_vsxregset, ppc_store_vsxregset }, { PTRACE_GETVRREGS, PTRACE_SETVRREGS, 0, 0, EXTENDED_REGS, @@ -629,6 +683,7 @@ ppc_arch_setup (void) /* The value of current_process ()->tdesc needs to be set for this call. */ ppc_get_auxv (AT_HWCAP, &ppc_hwcap); + ppc_get_auxv (AT_HWCAP2, &ppc_hwcap2); features.isa205 = ppc_linux_has_isa205 (ppc_hwcap); @@ -638,6 +693,11 @@ ppc_arch_setup (void) if (ppc_hwcap & PPC_FEATURE_HAS_ALTIVEC) features.altivec = true; + if ((ppc_hwcap2 & PPC_FEATURE2_DSCR) + && ppc_check_regset (tid, NT_PPC_DSCR, PPC_LINUX_SIZEOF_DSCRREGSET) + && ppc_check_regset (tid, NT_PPC_PPR, PPC_LINUX_SIZEOF_PPRREGSET)) + features.ppr_dscr = true; + if (ppc_hwcap & PPC_FEATURE_CELL) features.cell = true; @@ -682,6 +742,21 @@ ppc_arch_setup (void) else regset->size = 0; break; + case PTRACE_GETREGSET: + switch (regset->nt_type) + { + case NT_PPC_PPR: + regset->size = (features.ppr_dscr ? + PPC_LINUX_SIZEOF_PPRREGSET : 0); + break; + case NT_PPC_DSCR: + regset->size = (features.ppr_dscr ? + PPC_LINUX_SIZEOF_DSCRREGSET : 0); + break; + default: + break; + } + break; default: break; } @@ -3057,6 +3132,8 @@ ppc_get_ipa_tdesc_idx (void) return PPC_TDESC_ISA205_ALTIVEC; if (tdesc == tdesc_powerpc_isa205_vsx64l) return PPC_TDESC_ISA205_VSX; + if (tdesc == tdesc_powerpc_isa205_ppr_dscr_vsx64l) + return PPC_TDESC_ISA205_PPR_DSCR_VSX; #endif if (tdesc == tdesc_powerpc_32l) @@ -3073,6 +3150,8 @@ ppc_get_ipa_tdesc_idx (void) return PPC_TDESC_ISA205_ALTIVEC; if (tdesc == tdesc_powerpc_isa205_vsx32l) return PPC_TDESC_ISA205_VSX; + if (tdesc == tdesc_powerpc_isa205_ppr_dscr_vsx32l) + return PPC_TDESC_ISA205_PPR_DSCR_VSX; if (tdesc == tdesc_powerpc_e500l) return PPC_TDESC_E500; @@ -3131,6 +3210,7 @@ initialize_low_arch (void) init_registers_powerpc_isa205_32l (); init_registers_powerpc_isa205_altivec32l (); init_registers_powerpc_isa205_vsx32l (); + init_registers_powerpc_isa205_ppr_dscr_vsx32l (); init_registers_powerpc_e500l (); #if __powerpc64__ init_registers_powerpc_64l (); @@ -3140,6 +3220,7 @@ initialize_low_arch (void) init_registers_powerpc_isa205_64l (); init_registers_powerpc_isa205_altivec64l (); init_registers_powerpc_isa205_vsx64l (); + init_registers_powerpc_isa205_ppr_dscr_vsx64l (); #endif initialize_regsets_info (&ppc_regsets_info); diff --git a/gdb/gdbserver/linux-ppc-tdesc-init.h b/gdb/gdbserver/linux-ppc-tdesc-init.h index 422e7bd9c4..c5c10c0670 100644 --- a/gdb/gdbserver/linux-ppc-tdesc-init.h +++ b/gdb/gdbserver/linux-ppc-tdesc-init.h @@ -29,6 +29,7 @@ enum ppc_linux_tdesc { PPC_TDESC_ISA205, PPC_TDESC_ISA205_ALTIVEC, PPC_TDESC_ISA205_VSX, + PPC_TDESC_ISA205_PPR_DSCR_VSX, PPC_TDESC_E500, }; @@ -55,6 +56,9 @@ void init_registers_powerpc_isa205_altivec32l (void); /* Defined in auto-generated file powerpc-isa205-vsx32l.c. */ void init_registers_powerpc_isa205_vsx32l (void); +/* Defined in auto-generated file powerpc-isa205-ppr-dscr-vsx32l.c. */ +void init_registers_powerpc_isa205_ppr_dscr_vsx32l (void); + /* Defined in auto-generated file powerpc-e500l.c. */ void init_registers_powerpc_e500l (void); @@ -83,4 +87,7 @@ void init_registers_powerpc_isa205_altivec64l (void); /* Defined in auto-generated file powerpc-isa205-vsx64l.c. */ void init_registers_powerpc_isa205_vsx64l (void); +/* Defined in auto-generated file powerpc-isa205-ppr-dscr-vsx64l.c. */ +void init_registers_powerpc_isa205_ppr_dscr_vsx64l (void); + #endif