From patchwork Fri May 11 10:52:54 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alan Hayward X-Patchwork-Id: 27237 Received: (qmail 101975 invoked by alias); 11 May 2018 10:53:22 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 101879 invoked by uid 89); 11 May 2018 10:53:21 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.0 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_HELO_PASS, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: EUR01-VE1-obe.outbound.protection.outlook.com Received: from mail-ve1eur01on0066.outbound.protection.outlook.com (HELO EUR01-VE1-obe.outbound.protection.outlook.com) (104.47.1.66) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 11 May 2018 10:53:18 +0000 Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Alan.Hayward@arm.com; Received: from C02TF0U7HF1T.arm.com (217.140.96.140) by VI1PR0802MB2143.eurprd08.prod.outlook.com (2603:10a6:800:9b::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.755.16; Fri, 11 May 2018 10:53:05 +0000 From: Alan Hayward To: gdb-patches@sourceware.org Cc: nd@arm.com, Alan Hayward Subject: [PATCH 6/8] Aarch64 SVE pseudo register support Date: Fri, 11 May 2018 11:52:54 +0100 Message-Id: <20180511105256.27388-7-alan.hayward@arm.com> In-Reply-To: <20180511105256.27388-1-alan.hayward@arm.com> References: <20180511105256.27388-1-alan.hayward@arm.com> MIME-Version: 1.0 X-ClientProxiedBy: CWXP265CA0010.GBRP265.PROD.OUTLOOK.COM (2603:10a6:400:2e::22) To VI1PR0802MB2143.eurprd08.prod.outlook.com (2603:10a6:800:9b::12) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-Microsoft-Antispam: UriScan:; BCL:0; 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On SVE the V registers are pseudo registers. This is supported by adding AARCH64_SVE_V0_REGNUM. 2018-05-11 Alan Hayward * aarch64-tdep.c (AARCH64_SVE_V0_REGNUM): Add define. (aarch64_vnv_type): Add function. (aarch64_pseudo_register_name): Add V regs for SVE. (aarch64_pseudo_register_type): Likewise. (aarch64_pseudo_register_reggroup_p): Likewise. (aarch64_pseudo_read_value_2): Use V0 offset for SVE (aarch64_pseudo_read_value): Add V regs for SVE. (aarch64_pseudo_write_2): Use V0 offset for SVE (aarch64_pseudo_write): Add V regs for SVE. * aarch64-tdep.h (struct gdbarch_tdep): Add vnv_type. --- gdb/aarch64-tdep.c | 151 +++++++++++++++++++++++++++++++++++++++++++++-------- gdb/aarch64-tdep.h | 1 + 2 files changed, 130 insertions(+), 22 deletions(-) diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c index 003fefb3c9..6a40a081cb 100644 --- a/gdb/aarch64-tdep.c +++ b/gdb/aarch64-tdep.c @@ -69,6 +69,7 @@ #define AARCH64_S0_REGNUM (AARCH64_D0_REGNUM + 32) #define AARCH64_H0_REGNUM (AARCH64_S0_REGNUM + 32) #define AARCH64_B0_REGNUM (AARCH64_H0_REGNUM + 32) +#define AARCH64_SVE_V0_REGNUM (AARCH64_B0_REGNUM + 32) /* All possible aarch64 target descriptors. */ struct target_desc *tdesc_aarch64_list[AARCH64_MAX_SVE_VQ + 1]; @@ -1766,6 +1767,33 @@ aarch64_vnb_type (struct gdbarch *gdbarch) return tdep->vnb_type; } +/* Return the type for an AdvSISD V register. */ + +static struct type * +aarch64_vnv_type (struct gdbarch *gdbarch) +{ + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + + if (tdep->vnv_type == NULL) + { + struct type *t; + struct type *elem; + + t = arch_composite_type (gdbarch, "__gdb_builtin_type_vnv", + TYPE_CODE_UNION); + + append_composite_type_field (t, "d", aarch64_vnd_type (gdbarch)); + append_composite_type_field (t, "s", aarch64_vns_type (gdbarch)); + append_composite_type_field (t, "h", aarch64_vnh_type (gdbarch)); + append_composite_type_field (t, "b", aarch64_vnb_type (gdbarch)); + append_composite_type_field (t, "q", aarch64_vnq_type (gdbarch)); + + tdep->vnv_type = t; + } + + return tdep->vnv_type; +} + /* Implement the "dwarf2_reg_to_regnum" gdbarch method. */ static int @@ -2114,6 +2142,8 @@ aarch64_gen_return_address (struct gdbarch *gdbarch, static const char * aarch64_pseudo_register_name (struct gdbarch *gdbarch, int regnum) { + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + static const char *const q_name[] = { "q0", "q1", "q2", "q3", @@ -2191,6 +2221,25 @@ aarch64_pseudo_register_name (struct gdbarch *gdbarch, int regnum) if (regnum >= AARCH64_B0_REGNUM && regnum < AARCH64_B0_REGNUM + 32) return b_name[regnum - AARCH64_B0_REGNUM]; + if (tdep->has_sve ()) + { + static const char *const sve_v_name[] = + { + "v0", "v1", "v2", "v3", + "v4", "v5", "v6", "v7", + "v8", "v9", "v10", "v11", + "v12", "v13", "v14", "v15", + "v16", "v17", "v18", "v19", + "v20", "v21", "v22", "v23", + "v24", "v25", "v26", "v27", + "v28", "v29", "v30", "v31", + }; + + if (regnum >= AARCH64_SVE_V0_REGNUM + && regnum < AARCH64_SVE_V0_REGNUM + AARCH64_V_REGS_NUM) + return sve_v_name[regnum - AARCH64_SVE_V0_REGNUM]; + } + internal_error (__FILE__, __LINE__, _("aarch64_pseudo_register_name: bad register number %d"), regnum); @@ -2201,6 +2250,8 @@ aarch64_pseudo_register_name (struct gdbarch *gdbarch, int regnum) static struct type * aarch64_pseudo_register_type (struct gdbarch *gdbarch, int regnum) { + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + regnum -= gdbarch_num_regs (gdbarch); if (regnum >= AARCH64_Q0_REGNUM && regnum < AARCH64_Q0_REGNUM + 32) @@ -2218,6 +2269,10 @@ aarch64_pseudo_register_type (struct gdbarch *gdbarch, int regnum) if (regnum >= AARCH64_B0_REGNUM && regnum < AARCH64_B0_REGNUM + 32) return aarch64_vnb_type (gdbarch); + if (tdep->has_sve () && regnum >= AARCH64_SVE_V0_REGNUM + && regnum < AARCH64_SVE_V0_REGNUM + 32) + return aarch64_vnv_type (gdbarch); + internal_error (__FILE__, __LINE__, _("aarch64_pseudo_register_type: bad register number %d"), regnum); @@ -2229,6 +2284,8 @@ static int aarch64_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum, struct reggroup *group) { + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + regnum -= gdbarch_num_regs (gdbarch); if (regnum >= AARCH64_Q0_REGNUM && regnum < AARCH64_Q0_REGNUM + 32) @@ -2243,6 +2300,9 @@ aarch64_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum, return group == all_reggroup || group == vector_reggroup; else if (regnum >= AARCH64_B0_REGNUM && regnum < AARCH64_B0_REGNUM + 32) return group == all_reggroup || group == vector_reggroup; + else if (tdep->has_sve () && regnum >= AARCH64_SVE_V0_REGNUM + && regnum < AARCH64_SVE_V0_REGNUM + 32) + return group == all_reggroup || group == vector_reggroup; return group == all_reggroup; } @@ -2250,17 +2310,30 @@ aarch64_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum, /* Inner version of aarch64_pseudo_read_value. */ static struct value * -aarch64_pseudo_read_value_2 (readable_regcache *regcache, int regnum_offset, +aarch64_pseudo_read_value_2 (struct gdbarch *gdbarch, + readable_regcache *regcache, int regnum_offset, int regsize, struct value *result_value) { - gdb_byte reg_buf[V_REGISTER_SIZE]; + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + gdb_byte v_buf[V_REGISTER_SIZE], *reg_buf; + gdb_assert (AARCH64_V0_REGNUM == AARCH64_SVE_Z0_REGNUM); unsigned v_regnum = AARCH64_V0_REGNUM + regnum_offset; + /* Enough space to read a full vector register. */ + if (tdep->has_sve ()) + reg_buf = (gdb_byte *) xmalloc (register_size (gdbarch, AARCH64_V0_REGNUM)); + else + reg_buf = v_buf; + if (regcache->raw_read (v_regnum, reg_buf) != REG_VALID) mark_value_bytes_unavailable (result_value, 0, TYPE_LENGTH (value_type (result_value))); else memcpy (value_contents_raw (result_value), reg_buf, regsize); + + if (tdep->has_sve ()) + xfree (reg_buf); + return result_value; } @@ -2270,6 +2343,7 @@ static struct value * aarch64_pseudo_read_value (struct gdbarch *gdbarch, readable_regcache *regcache, int regnum) { + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); struct value *result_value = allocate_value (register_type (gdbarch, regnum)); VALUE_LVAL (result_value) = lval_register; @@ -2278,45 +2352,67 @@ aarch64_pseudo_read_value (struct gdbarch *gdbarch, readable_regcache *regcache, regnum -= gdbarch_num_regs (gdbarch); if (regnum >= AARCH64_Q0_REGNUM && regnum < AARCH64_Q0_REGNUM + 32) - return aarch64_pseudo_read_value_2 (regcache, regnum - AARCH64_Q0_REGNUM, + return aarch64_pseudo_read_value_2 (gdbarch, regcache, + regnum - AARCH64_Q0_REGNUM, Q_REGISTER_SIZE, result_value); if (regnum >= AARCH64_D0_REGNUM && regnum < AARCH64_D0_REGNUM + 32) - return aarch64_pseudo_read_value_2 (regcache, regnum - AARCH64_D0_REGNUM, + return aarch64_pseudo_read_value_2 (gdbarch, regcache, + regnum - AARCH64_D0_REGNUM, D_REGISTER_SIZE, result_value); if (regnum >= AARCH64_S0_REGNUM && regnum < AARCH64_S0_REGNUM + 32) - return aarch64_pseudo_read_value_2 (regcache, regnum - AARCH64_S0_REGNUM, + return aarch64_pseudo_read_value_2 (gdbarch, regcache, + regnum - AARCH64_S0_REGNUM, S_REGISTER_SIZE, result_value); if (regnum >= AARCH64_H0_REGNUM && regnum < AARCH64_H0_REGNUM + 32) - return aarch64_pseudo_read_value_2 (regcache, regnum - AARCH64_H0_REGNUM, + return aarch64_pseudo_read_value_2 (gdbarch, regcache, + regnum - AARCH64_H0_REGNUM, H_REGISTER_SIZE, result_value); if (regnum >= AARCH64_B0_REGNUM && regnum < AARCH64_B0_REGNUM + 32) - return aarch64_pseudo_read_value_2 (regcache, regnum - AARCH64_B0_REGNUM, + return aarch64_pseudo_read_value_2 (gdbarch, regcache, + regnum - AARCH64_B0_REGNUM, B_REGISTER_SIZE, result_value); + if (tdep->has_sve () && regnum >= AARCH64_SVE_V0_REGNUM + && regnum < AARCH64_SVE_V0_REGNUM + 32) + return aarch64_pseudo_read_value_2 (gdbarch, regcache, + regnum - AARCH64_SVE_V0_REGNUM, + V_REGISTER_SIZE, result_value); + gdb_assert_not_reached ("regnum out of bound"); } /* Inner version of aarch64_pseudo_write. */ static void -aarch64_pseudo_write_2 (struct regcache *regcache, int regnum_offset, - int regsize, const gdb_byte *buf) +aarch64_pseudo_write_2 (struct gdbarch *gdbarch, struct regcache *regcache, + int regnum_offset, int regsize, const gdb_byte *buf) { - gdb_byte reg_buf[V_REGISTER_SIZE]; + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + gdb_byte v_buf[V_REGISTER_SIZE], *reg_buf; + gdb_assert (AARCH64_V0_REGNUM == AARCH64_SVE_Z0_REGNUM); unsigned v_regnum = AARCH64_V0_REGNUM + regnum_offset; + /* Enough space to write a full vector register. */ + if (tdep->has_sve ()) + reg_buf = (gdb_byte *) xmalloc (register_size (gdbarch, AARCH64_V0_REGNUM)); + else + reg_buf = v_buf; + /* Ensure the register buffer is zero, we want gdb writes of the various 'scalar' pseudo registers to behavior like architectural writes, register width bytes are written the remainder are set to zero. */ - memset (reg_buf, 0, sizeof (reg_buf)); + memset (reg_buf, 0, register_size (gdbarch, AARCH64_V0_REGNUM)); memcpy (reg_buf, buf, regsize); regcache->raw_write (v_regnum, reg_buf); + + if (tdep->has_sve ()) + xfree (reg_buf); } /* Implement the "pseudo_register_write" gdbarch method. */ @@ -2325,28 +2421,39 @@ static void aarch64_pseudo_write (struct gdbarch *gdbarch, struct regcache *regcache, int regnum, const gdb_byte *buf) { - + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); regnum -= gdbarch_num_regs (gdbarch); if (regnum >= AARCH64_Q0_REGNUM && regnum < AARCH64_Q0_REGNUM + 32) - return aarch64_pseudo_write_2 (regcache, regnum - AARCH64_Q0_REGNUM, - Q_REGISTER_SIZE, buf); + return aarch64_pseudo_write_2 (gdbarch, regcache, + regnum - AARCH64_Q0_REGNUM, Q_REGISTER_SIZE, + buf); if (regnum >= AARCH64_D0_REGNUM && regnum < AARCH64_D0_REGNUM + 32) - return aarch64_pseudo_write_2 (regcache, regnum - AARCH64_D0_REGNUM, - D_REGISTER_SIZE, buf); + return aarch64_pseudo_write_2 (gdbarch, regcache, + regnum - AARCH64_D0_REGNUM, D_REGISTER_SIZE, + buf); if (regnum >= AARCH64_S0_REGNUM && regnum < AARCH64_S0_REGNUM + 32) - return aarch64_pseudo_write_2 (regcache, regnum - AARCH64_S0_REGNUM, - S_REGISTER_SIZE, buf); + return aarch64_pseudo_write_2 (gdbarch, regcache, + regnum - AARCH64_S0_REGNUM, S_REGISTER_SIZE, + buf); if (regnum >= AARCH64_H0_REGNUM && regnum < AARCH64_H0_REGNUM + 32) - return aarch64_pseudo_write_2 (regcache, regnum - AARCH64_H0_REGNUM, - H_REGISTER_SIZE, buf); + return aarch64_pseudo_write_2 (gdbarch, regcache, + regnum - AARCH64_H0_REGNUM, H_REGISTER_SIZE, + buf); if (regnum >= AARCH64_B0_REGNUM && regnum < AARCH64_B0_REGNUM + 32) - return aarch64_pseudo_write_2 (regcache, regnum - AARCH64_B0_REGNUM, - B_REGISTER_SIZE, buf); + return aarch64_pseudo_write_2 (gdbarch, regcache, + regnum - AARCH64_B0_REGNUM, B_REGISTER_SIZE, + buf); + + if (tdep->has_sve () && regnum >= AARCH64_SVE_V0_REGNUM + && regnum < AARCH64_SVE_V0_REGNUM + 32) + return aarch64_pseudo_write_2 (gdbarch, regcache, + regnum - AARCH64_SVE_V0_REGNUM, + V_REGISTER_SIZE, buf); gdb_assert_not_reached ("regnum out of bound"); } diff --git a/gdb/aarch64-tdep.h b/gdb/aarch64-tdep.h index 046de6228f..f4c04d7867 100644 --- a/gdb/aarch64-tdep.h +++ b/gdb/aarch64-tdep.h @@ -70,6 +70,7 @@ struct gdbarch_tdep struct type *vns_type; struct type *vnh_type; struct type *vnb_type; + struct type *vnv_type; /* syscall record. */ int (*aarch64_syscall_record) (struct regcache *regcache, unsigned long svc_number);