From patchwork Mon Nov 28 12:27:56 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Antoine Tremblay X-Patchwork-Id: 17984 Received: (qmail 20553 invoked by alias); 28 Nov 2016 12:28:24 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 20540 invoked by uid 89); 28 Nov 2016 12:28:23 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=BAYES_00, SPF_PASS autolearn=ham version=3.3.2 spammy=thumb2, HX-Envelope-From:sk:antoine, 2637, H*r:Security X-HELO: usplmg20.ericsson.net Received: from usplmg20.ericsson.net (HELO usplmg20.ericsson.net) (198.24.6.45) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 28 Nov 2016 12:28:13 +0000 Received: from EUSAAHC007.ericsson.se (Unknown_Domain [147.117.188.93]) by (Symantec Mail Security) with SMTP id 88.8C.29529.2A72C385; Mon, 28 Nov 2016 13:48:35 +0100 (CET) Received: from elxa4wqvvz1.ca.am.ericsson.se (147.117.188.8) by smtps-am.internal.ericsson.com (147.117.188.93) with Microsoft SMTP Server (TLS) id 14.3.319.2; Mon, 28 Nov 2016 07:28:11 -0500 From: Antoine Tremblay To: CC: Antoine Tremblay Subject: [PATCH 1/3] Fix inferior memory reading in GDBServer for arm/aarch32. Date: Mon, 28 Nov 2016 07:27:56 -0500 Message-ID: <20161128122758.7762-1-antoine.tremblay@ericsson.com> MIME-Version: 1.0 X-IsSubscribed: yes Before this patch, some functions would read the inferior memory with (*the_target)->read_memory, which returns the raw memory, rather than the shadowed memory. This is wrong since these functions do not expect to read a breakpoint instruction and can lead to invalid behavior. Use of raw memory in get_next_pcs_read_memory_unsigned_integer for example could lead to get_next_pc returning an invalid pc. Tested on gdbserver-native/-m{thumb,arm} no regressions. gdb/gdbserver/ChangeLog: * linux-aarch32-low.c (arm_breakpoint_kind_from_pc): Use target_read_memory. * linux-arm-low.c (get_next_pcs_read_memory_unsigned_integer): Likewise. (arm_sigreturn_next_pc): Likewise. (get_next_pcs_syscall_next_pc): Likewise. (arm_get_syscall_trapinfo): Likewise. --- gdb/gdbserver/linux-aarch32-low.c | 4 ++-- gdb/gdbserver/linux-arm-low.c | 13 +++++++------ 2 files changed, 9 insertions(+), 8 deletions(-) diff --git a/gdb/gdbserver/linux-aarch32-low.c b/gdb/gdbserver/linux-aarch32-low.c index 5547cf6..4ff34b6 100644 --- a/gdb/gdbserver/linux-aarch32-low.c +++ b/gdb/gdbserver/linux-aarch32-low.c @@ -237,11 +237,11 @@ arm_breakpoint_kind_from_pc (CORE_ADDR *pcptr) *pcptr = UNMAKE_THUMB_ADDR (*pcptr); /* Check whether we are replacing a thumb2 32-bit instruction. */ - if ((*the_target->read_memory) (*pcptr, buf, 2) == 0) + if (target_read_memory (*pcptr, buf, 2) == 0) { unsigned short inst1 = 0; - (*the_target->read_memory) (*pcptr, (gdb_byte *) &inst1, 2); + target_read_memory (*pcptr, (gdb_byte *) &inst1, 2); if (thumb_insn_size (inst1) == 4) return ARM_BP_KIND_THUMB2; } diff --git a/gdb/gdbserver/linux-arm-low.c b/gdb/gdbserver/linux-arm-low.c index ed9b356..b8365cf 100644 --- a/gdb/gdbserver/linux-arm-low.c +++ b/gdb/gdbserver/linux-arm-low.c @@ -263,7 +263,8 @@ get_next_pcs_read_memory_unsigned_integer (CORE_ADDR memaddr, ULONGEST res; res = 0; - (*the_target->read_memory) (memaddr, (unsigned char *) &res, len); + target_read_memory (memaddr, (unsigned char *) &res, len); + return res; } @@ -769,15 +770,15 @@ arm_sigreturn_next_pc (struct regcache *regcache, int svc_number, gdb_assert (svc_number == __NR_sigreturn || svc_number == __NR_rt_sigreturn); collect_register_by_name (regcache, "sp", &sp); - (*the_target->read_memory) (sp, (unsigned char *) &sp_data, 4); + target_read_memory (sp, (unsigned char *) &sp_data, 4); pc_offset = arm_linux_sigreturn_next_pc_offset (sp, sp_data, svc_number, __NR_sigreturn == svc_number ? 1 : 0); - (*the_target->read_memory) (sp + pc_offset, (unsigned char *) &next_pc, 4); + target_read_memory (sp + pc_offset, (unsigned char *) &next_pc, 4); /* Set IS_THUMB according the CPSR saved on the stack. */ - (*the_target->read_memory) (sp + pc_offset + 4, (unsigned char *) &cpsr, 4); + target_read_memory (sp + pc_offset + 4, (unsigned char *) &cpsr, 4); *is_thumb = ((cpsr & CPSR_T) != 0); return next_pc; @@ -804,7 +805,7 @@ get_next_pcs_syscall_next_pc (struct arm_get_next_pcs *self) unsigned long this_instr; unsigned long svc_operand; - (*the_target->read_memory) (pc, (unsigned char *) &this_instr, 4); + target_read_memory (pc, (unsigned char *) &this_instr, 4); svc_operand = (0x00ffffff & this_instr); if (svc_operand) /* OABI. */ @@ -965,7 +966,7 @@ arm_get_syscall_trapinfo (struct regcache *regcache, int *sysno) collect_register_by_name (regcache, "pc", &pc); - if ((*the_target->read_memory) (pc - 4, (unsigned char *) &insn, 4)) + if (target_read_memory (pc - 4, (unsigned char *) &insn, 4)) *sysno = UNKNOWN_SYSCALL; else {