From patchwork Fri Nov 28 15:32:23 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Joel Brobecker X-Patchwork-Id: 3988 Received: (qmail 17190 invoked by alias); 28 Nov 2014 15:32:32 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 17054 invoked by uid 89); 28 Nov 2014 15:32:31 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.7 required=5.0 tests=AWL, BAYES_00 autolearn=ham version=3.3.2 X-HELO: rock.gnat.com Received: from rock.gnat.com (HELO rock.gnat.com) (205.232.38.15) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-SHA encrypted) ESMTPS; Fri, 28 Nov 2014 15:32:28 +0000 Received: from localhost (localhost.localdomain [127.0.0.1]) by filtered-rock.gnat.com (Postfix) with ESMTP id F3C121167B2; Fri, 28 Nov 2014 10:32:26 -0500 (EST) Received: from rock.gnat.com ([127.0.0.1]) by localhost (rock.gnat.com [127.0.0.1]) (amavisd-new, port 10024) with LMTP id mW3Pbu1O0jSi; Fri, 28 Nov 2014 10:32:26 -0500 (EST) Received: from joel.gnat.com (localhost.localdomain [127.0.0.1]) by rock.gnat.com (Postfix) with ESMTP id 8F29D116064; Fri, 28 Nov 2014 10:32:26 -0500 (EST) Received: by joel.gnat.com (Postfix, from userid 1000) id 2A68E40F79; Fri, 28 Nov 2014 19:32:23 +0400 (RET) Date: Fri, 28 Nov 2014 19:32:23 +0400 From: Joel Brobecker To: Pierre Muller Cc: gdb-patches@sourceware.org Subject: Re: [RFA] Fix amd64 dwarf register number mapping Message-ID: <20141128153223.GK5042@adacore.com> References: <001301cfdd92$43630400$ca290c00$@muller@ics-cnrs.unistra.fr> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <001301cfdd92$43630400$ca290c00$@muller@ics-cnrs.unistra.fr> User-Agent: Mutt/1.5.21 (2010-09-15) hello Pierre, On Wed, Oct 01, 2014 at 06:10:47PM +0200, Pierre Muller wrote: > dwarf register number is defined in > "System V Application Binary Interface > AMD64 Architecture Processor Supplement > Draft Version 0.99.6" > The amd64_dwarf_regmap array > is missing the 8 MMX registers > in Figure 3.36: DWARF Register Number Mapping page 57. > This leads to a wrong value for the > registers past this point. > > I don't know if there are already > cases where this really fixes a problem, > but it is nevertheless a valid correction. > > Is this OK, or is there a valid reason for > this "miss"? > > Pierre Muller > Pascal language maintainer of GDB > > > > 2014-10-01 Pierre Muller > > * amd64-tdep.c (amd64_dwarf_regmap array): Fix amd64 dwarf > register numbering, by adding missing MMX registers. I am so sorry for such a long delay in reviewing your patch. I was also able to confirm that GCC also uses 41-48 for those registers, so your patch is also improving compatibility with GCC (my main concern was to make sure that GDB's numbering was not made on purpose for the sake of supporting something invalid in GCC). The patch is essentially approved, with some minor comments. For my penitence, I made the adjustments, and pushed your patch after having re-tested it on x86_64-linux. Comments below: > diff --git a/gdb/amd64-tdep.c b/gdb/amd64-tdep.c > index 7c8575a..b98bc5d 100644 > --- a/gdb/amd64-tdep.c > +++ b/gdb/amd64-tdep.c > @@ -201,7 +201,11 @@ static int amd64_dwarf_regmap[] = > AMD64_ST0_REGNUM + 4, AMD64_ST0_REGNUM + 5, > AMD64_ST0_REGNUM + 6, AMD64_ST0_REGNUM + 7, > > - /* Control and Status Flags Register. */ > + /* MMX Registers 0 - 7. Currently not handled, > + see "tdep->num_mmx_regs = 0;" below. */ > + -1, -1, -1, -1, -1, -1, -1, -1, > + > + /* Control and Status Flags Register. */ You were adding a space before the "Control and Status" comment, which is probably unintentional. I removed it. I changed the command to explain that those registers are in fact handled (see the routines that convert between GDB and dwarf numbers). They just need special handling because the associated numbers in GDB depend on the target, and on whether those registers are in fact available or not. Attached is what I pushed for you. gdb/ChangeLog: Pushed by Joel Brobecker . * amd64-tdep.c (amd64_dwarf_regmap array): Add missing MMX registers. Tested on x86_64-linux. From f7ca3fcfccd144c234370aa939e4f5f15f3b2a88 Mon Sep 17 00:00:00 2001 From: Pierre Muller Date: Fri, 28 Nov 2014 19:21:58 +0400 Subject: [PATCH] Fix amd64 dwarf register number mapping (MMX register and higher) Dwarf register numbers are defined in "System V Application Binary Interface AMD64 Architecture Processor Supplement Draft Version 0.99.6" The amd64_dwarf_regmap array is missing the 8 MMX registers in Figure 3.36: DWARF Register Number Mapping page 57. This leads to a wrong value for the registers past this point. gdb/ChangeLog: Pushed by Joel Brobecker . * amd64-tdep.c (amd64_dwarf_regmap array): Add missing MMX registers. Tested on x86_64-linux. --- gdb/ChangeLog | 6 ++++++ gdb/amd64-tdep.c | 8 +++++++- 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/gdb/ChangeLog b/gdb/ChangeLog index 6b5c02a..21e1a7e 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,9 @@ +2014-11-28 Pierre Muller + + Pushed by Joel Brobecker . + * amd64-tdep.c (amd64_dwarf_regmap array): Add missing MMX + registers. + 2014-11-28 Ulrich Weigand  * config/ia64/linux.mh (NATDEPFILES): Remove core-regset.o. diff --git a/gdb/amd64-tdep.c b/gdb/amd64-tdep.c index e69da01..7bc4694 100644 --- a/gdb/amd64-tdep.c +++ b/gdb/amd64-tdep.c @@ -199,7 +199,13 @@ static int amd64_dwarf_regmap[] = AMD64_ST0_REGNUM + 2, AMD64_ST0_REGNUM + 3, AMD64_ST0_REGNUM + 4, AMD64_ST0_REGNUM + 5, AMD64_ST0_REGNUM + 6, AMD64_ST0_REGNUM + 7, - + + /* MMX Registers 0 - 7. + We have to handle those registers specifically, as their register + number within GDB depends on the target (or they may even not be + available at all). */ + -1, -1, -1, -1, -1, -1, -1, -1, + /* Control and Status Flags Register. */ AMD64_EFLAGS_REGNUM, -- 1.9.1