From patchwork Tue Jan 10 12:26:14 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yao Qi X-Patchwork-Id: 18834 Received: (qmail 89980 invoked by alias); 10 Jan 2017 12:26:42 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 89790 invoked by uid 89); 10 Jan 2017 12:26:40 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.5 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_SPAM, SPF_PASS autolearn=no version=3.3.2 spammy=944, 6, prin, 9446, HX-Received:10.99.140.77 X-Spam-User: qpsmtpd, 2 recipients X-HELO: mail-pf0-f194.google.com Received: from mail-pf0-f194.google.com (HELO mail-pf0-f194.google.com) (209.85.192.194) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 10 Jan 2017 12:26:35 +0000 Received: by mail-pf0-f194.google.com with SMTP id f144so9892999pfa.2; Tue, 10 Jan 2017 04:26:34 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=16I3cqt6aVqlNaE9uHIz3tClrn14UYCMOiLH6m05lvM=; b=dyVJElIpKwA+ilDOFAWEelGH/2dAl5JJEld3sgcVoUiZj5IqF7LTMPEioiYY2LECdz M6VUEmJ4Gim0lUHuCKz3y/f5bNLwtHqNXQjZ9wY7viGsuZIgdS94q2pwduOfe8k5q2s4 3jRhd1+OJeZ5v+ZhaOAvU9qUeIOnFuwJY+pLp4b6NkIsuGwJ5JOpcxYiguHqDXYSzdoi /FnGihtRB3UAJXtFisUus/NY0nsSHektDHQXJqT34O5iMtcewDkArPmTeNRHi3dEA4/h RncyIhEX16XuKeR1RXir395AL9sXKgYXIuadTwBL19PJPYj1qEkt/dOhHf1fJEcikjHK C7QA== X-Gm-Message-State: AIkVDXLKIzlaQo6HhzPwl5+RRZSMaZxBR1KrdT05WMyasMaEGQhvzRDqZwjvDx9ZtB8GaQ== X-Received: by 10.99.140.77 with SMTP id q13mr3671624pgn.109.1484051193342; Tue, 10 Jan 2017 04:26:33 -0800 (PST) Received: from E107787-LIN.cambridge.arm.com (gcc1-power7.osuosl.org. [140.211.15.137]) by smtp.gmail.com with ESMTPSA id r26sm5450661pgd.42.2017.01.10.04.26.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 10 Jan 2017 04:26:32 -0800 (PST) From: Yao Qi X-Google-Original-From: Yao Qi To: binutils@sourceware.org, gdb-patches@sourceware.org Subject: [PATCH 4/8] Return -1 on memory error in print_insn_msp430 Date: Tue, 10 Jan 2017 12:26:14 +0000 Message-Id: <1484051178-16013-5-git-send-email-yao.qi@linaro.org> In-Reply-To: <1484051178-16013-1-git-send-email-yao.qi@linaro.org> References: <1484051178-16013-1-git-send-email-yao.qi@linaro.org> X-IsSubscribed: yes Disassemblers in opcodes return -1 on memory error, but msp430 doesn't follow this convention. If I change GDB not to throw exception in disassemble_info.memory_error_func and rely on the return value of disassembler, I'll get the following output. (gdb) disassemble 0x0,+8 Dump of assembler code from 0x0 to 0x8: 0x00000000: .word 0xffff; ???? 0x00000002: .word 0xffff; ???? 0x00000004: .word 0xffff; ???? 0x00000006: .word 0xffff; ???? End of assembler dump. This patch teaches print_insn_msp430 and its callees to return -1 on memory error. opcodes: 2017-01-10 Yao Qi * msp430-dis.c (msp430_singleoperand): Return -1 if msp430dis_opcode_signed returns false. (msp430_doubleoperand): Likewise. (msp430_branchinstr): Return -1 if msp430dis_opcode_unsigned returns false. (msp430x_calla_instr): Likewise. (print_insn_msp430): Likewise. --- opcodes/msp430-dis.c | 85 +++++++++++++++++++++++++++++++++++++++++++--------- 1 file changed, 71 insertions(+), 14 deletions(-) diff --git a/opcodes/msp430-dis.c b/opcodes/msp430-dis.c index 9c62193..bb82643 100644 --- a/opcodes/msp430-dis.c +++ b/opcodes/msp430-dis.c @@ -270,6 +270,8 @@ msp430_singleoperand (disassemble_info *info, (long)((addr + 2 + dst) & 0xfffff)); } } + else + return -1; } else if (regd == 2) { @@ -285,6 +287,8 @@ msp430_singleoperand (disassemble_info *info, sprintf (op, "&0x%05x", dst & 0xfffff); } } + else + return -1; } else { @@ -300,6 +304,8 @@ msp430_singleoperand (disassemble_info *info, } sprintf (op, "%d(r%d)", dst, regd); } + else + return -1; } } break; @@ -346,6 +352,8 @@ msp430_singleoperand (disassemble_info *info, sprintf (comm, "#0x%05x", dst); } } + else + return -1; } else * cycles = print_as3_reg_name (regd, op, comm, 1, 1, 3); @@ -370,6 +378,8 @@ msp430_singleoperand (disassemble_info *info, (long)((addr + 2 + dst) & 0xfffff)); } } + else + return -1; } else if (regd == 2) { @@ -384,6 +394,8 @@ msp430_singleoperand (disassemble_info *info, sprintf (op, "&0x%05x", dst & 0xfffff); } } + else + return -1; } else if (regd == 3) { @@ -407,6 +419,8 @@ msp430_singleoperand (disassemble_info *info, if (dst > 9 || dst < 0) sprintf (comm, "%05x", dst); } + else + return -1; } } break; @@ -511,6 +525,8 @@ msp430_doubleoperand (disassemble_info *info, (long)((addr + 2 + dst) & 0xfffff)); } } + else + return -1; } else if (regd == 2) { @@ -526,6 +542,8 @@ msp430_doubleoperand (disassemble_info *info, if (src != dst) return 0; } + else + return -1; cmd_len += 4; *cycles = 6; sprintf (op1, "&0x%04x", PS (dst)); @@ -535,6 +553,8 @@ msp430_doubleoperand (disassemble_info *info, sprintf (op1, "&0x%05x", dst & 0xfffff); } } + else + return -1; } else { @@ -613,6 +633,8 @@ msp430_doubleoperand (disassemble_info *info, sprintf (comm1, "0x%05x", dst & 0xfffff); } } + else + return -1; } else * cycles = print_as3_reg_name (regs, op1, comm1, 1, 1, 2); @@ -640,6 +662,8 @@ msp430_doubleoperand (disassemble_info *info, (long) ((addr + 2 + dst) & 0xfffff)); } } + else + return -1; } else if (regs == 2) { @@ -658,6 +682,8 @@ msp430_doubleoperand (disassemble_info *info, * comm1 = 0; } } + else + return -1; } else if (regs == 3) { @@ -728,6 +754,8 @@ msp430_doubleoperand (disassemble_info *info, (long)((addr + cmd_len + dst) & 0xfffff)); } } + else + return -1; cmd_len += 2; } else if (regd == 2) @@ -821,6 +849,8 @@ msp430_branchinstr (disassemble_info *info, cmd_len += 2; sprintf (op1, "#0x%04x", PS (udst)); } + else + return -1; } else * cycles = print_as3_reg_name (regs, op1, comm1, 1, 1, 2); @@ -849,6 +879,8 @@ msp430_branchinstr (disassemble_info *info, cmd_len += 2; sprintf (op1, "&0x%04x", PS (udst)); } + else + return -1; } else if (regs == 3) { @@ -923,6 +955,8 @@ msp430x_calla_instr (disassemble_info * info, sprintf (op1, "&%d", (ureg << 16) + udst); sprintf (comm1, "0x%05x", (ureg << 16) + udst); } + else + return -1; break; case 9: /* CALLA pcrel-sym */ @@ -944,6 +978,8 @@ msp430x_calla_instr (disassemble_info * info, sprintf (op1, "#%d", (ureg << 16) + udst); sprintf (comm1, "0x%05x", (ureg << 16) + udst); } + else + return -1; break; default: @@ -969,10 +1005,7 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info) unsigned short bits; if (! msp430dis_opcode_unsigned (addr, info, &insn, NULL)) - { - prin (stream, ".word 0xffff; ????"); - return 2; - } + return -1; if (((int) addr & 0xffff) > 0xffdf) { @@ -989,11 +1022,7 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info) extension_word = insn; addr += 2; if (! msp430dis_opcode_unsigned (addr, info, &insn, NULL)) - { - prin (stream, ".word 0x%04x, 0xffff; ????", - extension_word); - return 4; - } + return -1; } for (opcode = msp430_opcodes; opcode->name; opcode++) @@ -1011,9 +1040,13 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info) && (insn & 0x000f) == 0 && (insn & 0x0080) == 0) { - cmd_len += + int ret = msp430_branchinstr (info, opcode, addr, insn, op1, comm1, &cycles); + + if (ret == -1) + return -1; + cmd_len += ret; if (cmd_len) break; } @@ -1022,10 +1055,14 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info) { int n; int reg; + int ret; case 4: - cmd_len += msp430x_calla_instr (info, addr, insn, - op1, comm1, & cycles); + ret = msp430x_calla_instr (info, addr, insn, + op1, comm1, & cycles); + if (ret == -1) + return -1; + cmd_len += ret; break; case 5: /* PUSHM/POPM */ @@ -1080,6 +1117,8 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info) if (n > 9 || n < 0) sprintf (comm1, "0x%05x", n); } + else + return -1; cmd_len = 4; } sprintf (op2, "r%d", reg); @@ -1120,6 +1159,8 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info) if (strcmp (opcode->name, "bra") != 0) sprintf (op2, "r%d", reg); } + else + return -1; break; case 3: /* MOVA x(Rsrc), Rdst */ @@ -1152,6 +1193,8 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info) if (reg > 9 || reg < 0) sprintf (comm2, "0x%05x", reg); } + else + return -1; break; case 7: /* MOVA Rsrc, x(Rdst) */ @@ -1169,6 +1212,8 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info) sprintf (comm2, "0x%05x", n); } } + else + return -1; break; case 8: /* MOVA #imm20, Rdst */ @@ -1185,6 +1230,8 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info) if (strcmp (opcode->name, "bra") != 0) sprintf (op2, "r%d", reg); } + else + return -1; break; case 12: /* MOVA Rsrc, Rdst */ @@ -1206,15 +1253,21 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info) switch (opcode->insn_opnumb) { + int ret; + case 0: cmd_len += msp430_nooperands (opcode, addr, insn, comm1, &cycles); break; case 2: - cmd_len += + ret = msp430_doubleoperand (info, opcode, addr, insn, op1, op2, comm1, comm2, extension_word, &cycles); + + if (ret == -1) + return -1; + cmd_len += ret; if (insn & BYTE_OPERATION) { if (extension_word != 0 && ((extension_word & BYTE_OPERATION) == 0)) @@ -1235,10 +1288,14 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info) break; case 1: - cmd_len += + ret = msp430_singleoperand (info, opcode, addr, insn, op1, comm1, extension_word, &cycles); + + if (ret == -1) + return -1; + cmd_len += ret; if (extension_word && (strcmp (opcode->name, "swpb") == 0 || strcmp (opcode->name, "sxt") == 0))