From patchwork Wed Oct 7 09:26:16 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yao Qi X-Patchwork-Id: 8957 Received: (qmail 130232 invoked by alias); 7 Oct 2015 09:26:39 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 130125 invoked by uid 89); 7 Oct 2015 09:26:38 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.2 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-pa0-f50.google.com Received: from mail-pa0-f50.google.com (HELO mail-pa0-f50.google.com) (209.85.220.50) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Wed, 07 Oct 2015 09:26:37 +0000 Received: by pacfv12 with SMTP id fv12so16589104pac.2 for ; Wed, 07 Oct 2015 02:26:35 -0700 (PDT) X-Received: by 10.68.219.169 with SMTP id pp9mr53591430pbc.115.1444209995551; Wed, 07 Oct 2015 02:26:35 -0700 (PDT) Received: from E107787-LIN.cambridge.arm.com (power-aix.osuosl.org. [140.211.15.154]) by smtp.gmail.com with ESMTPSA id xa4sm38490858pac.28.2015.10.07.02.26.34 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 07 Oct 2015 02:26:35 -0700 (PDT) From: Yao Qi X-Google-Original-From: Yao Qi To: gdb-patches@sourceware.org Subject: [PATCH 02/11] Move target_read_uint32 out of aarch64_relocate_instruction Date: Wed, 7 Oct 2015 10:26:16 +0100 Message-Id: <1444209985-15829-3-git-send-email-yao.qi@linaro.org> In-Reply-To: <1444209985-15829-1-git-send-email-yao.qi@linaro.org> References: <1444209985-15829-1-git-send-email-yao.qi@linaro.org> X-IsSubscribed: yes This patch is to move target_read_uint32 out of aarch64_relocate_instruction and pass INSN to aarch64_relocate_instruction, so that it is cleaner, only decode instructions. gdb/gdbserver: 2015-10-05 Yao Qi * linux-aarch64-low.c (aarch64_relocate_instruction): Add argument insn. Remove local variable insn. Don't call target_read_uint32. (aarch64_install_fast_tracepoint_jump_pad): Call target_read_uint32. --- gdb/gdbserver/linux-aarch64-low.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/gdb/gdbserver/linux-aarch64-low.c b/gdb/gdbserver/linux-aarch64-low.c index 5592e61..909ba65 100644 --- a/gdb/gdbserver/linux-aarch64-low.c +++ b/gdb/gdbserver/linux-aarch64-low.c @@ -1924,8 +1924,8 @@ can_encode_int32 (int32_t val, unsigned bits) return rest == 0 || rest == -1; } -/* Relocate an instruction from OLDLOC to *TO. This function will also - increment TO by the number of bytes the new instruction(s) take(s). +/* Relocate an instruction INSN from OLDLOC to *TO. This function will + also increment TO by the number of bytes the new instruction(s) take(s). PC relative instructions need to be handled specifically: @@ -1937,11 +1937,10 @@ can_encode_int32 (int32_t val, unsigned bits) - LDR/LDRSW (literal) */ static void -aarch64_relocate_instruction (CORE_ADDR *to, CORE_ADDR oldloc) +aarch64_relocate_instruction (CORE_ADDR *to, CORE_ADDR oldloc, uint32_t insn) { uint32_t buf[32]; uint32_t *p = buf; - uint32_t insn; int is_bl; int is64; @@ -1956,8 +1955,6 @@ aarch64_relocate_instruction (CORE_ADDR *to, CORE_ADDR oldloc) unsigned bit; int32_t offset; - target_read_uint32 (oldloc, &insn); - if (aarch64_decode_b (oldloc, insn, &is_bl, &offset)) { offset = (oldloc - *to + offset); @@ -2120,6 +2117,7 @@ aarch64_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint, uint32_t *p = buf; int32_t offset; int i; + uint32_t insn; CORE_ADDR buildaddr = *jump_entry; /* We need to save the current state on the stack both to restore it @@ -2422,7 +2420,8 @@ aarch64_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint, /* Now emit the relocated instruction. */ *adjusted_insn_addr = buildaddr; - aarch64_relocate_instruction (&buildaddr, tpaddr); + target_read_uint32 (tpaddr, &insn); + aarch64_relocate_instruction (&buildaddr, tpaddr, insn); *adjusted_insn_addr_end = buildaddr; /* We may not have been able to relocate the instruction. */