From patchwork Fri Jul 31 15:16:38 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yao Qi X-Patchwork-Id: 7959 Received: (qmail 57570 invoked by alias); 31 Jul 2015 15:17:06 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 57490 invoked by uid 89); 31 Jul 2015 15:17:06 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.1 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-pd0-f171.google.com Received: from mail-pd0-f171.google.com (HELO mail-pd0-f171.google.com) (209.85.192.171) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Fri, 31 Jul 2015 15:17:00 +0000 Received: by pdrg1 with SMTP id g1so44282120pdr.2 for ; Fri, 31 Jul 2015 08:16:58 -0700 (PDT) X-Received: by 10.70.135.104 with SMTP id pr8mr7837307pdb.129.1438355818878; Fri, 31 Jul 2015 08:16:58 -0700 (PDT) Received: from E107787-LIN.cambridge.arm.com (gcc1-power7.osuosl.org. [140.211.15.137]) by smtp.gmail.com with ESMTPSA id pd10sm8253798pdb.66.2015.07.31.08.16.57 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 31 Jul 2015 08:16:58 -0700 (PDT) From: Yao Qi X-Google-Original-From: Yao Qi To: gdb-patches@sourceware.org Subject: [PATCH 4/7] Get and set PC correctly on aarch64 in multi-arch Date: Fri, 31 Jul 2015 16:16:38 +0100 Message-Id: <1438355801-25798-5-git-send-email-yao.qi@linaro.org> In-Reply-To: <1438355801-25798-1-git-send-email-yao.qi@linaro.org> References: <1438355801-25798-1-git-send-email-yao.qi@linaro.org> X-IsSubscribed: yes gdb/gdbserver: 2015-07-31 Yao Qi * linux-aarch64-low.c (aarch64_get_pc): Get PC register on both aarch64 and aarch32. (aarch64_set_pc): Likewise. --- gdb/gdbserver/linux-aarch64-low.c | 34 +++++++++++++++++++++++++++------- 1 file changed, 27 insertions(+), 7 deletions(-) diff --git a/gdb/gdbserver/linux-aarch64-low.c b/gdb/gdbserver/linux-aarch64-low.c index e4a41ce..3512ce9 100644 --- a/gdb/gdbserver/linux-aarch64-low.c +++ b/gdb/gdbserver/linux-aarch64-low.c @@ -155,12 +155,24 @@ extern int debug_threads; static CORE_ADDR aarch64_get_pc (struct regcache *regcache) { - unsigned long pc; + if (register_size (regcache->tdesc, 0) == 8) + { + unsigned long pc; + + collect_register_by_name (regcache, "pc", &pc); + if (debug_threads) + debug_printf ("stop pc is %08lx\n", pc); + return pc; + } + else + { + unsigned int pc; - collect_register_by_name (regcache, "pc", &pc); - if (debug_threads) - debug_printf ("stop pc is %08lx\n", pc); - return pc; + collect_register_by_name (regcache, "pc", &pc); + if (debug_threads) + debug_printf ("stop pc is %04x\n", pc); + return pc; + } } /* Implementation of linux_target_ops method "set_pc". */ @@ -168,8 +180,16 @@ aarch64_get_pc (struct regcache *regcache) static void aarch64_set_pc (struct regcache *regcache, CORE_ADDR pc) { - unsigned long newpc = pc; - supply_register_by_name (regcache, "pc", &newpc); + if (register_size (regcache->tdesc, 0) == 8) + { + unsigned long newpc = pc; + supply_register_by_name (regcache, "pc", &newpc); + } + else + { + unsigned int newpc = pc; + supply_register_by_name (regcache, "pc", &newpc); + } } #define aarch64_breakpoint_len 4