From patchwork Tue Apr 21 07:18:15 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mike Frysinger X-Patchwork-Id: 6333 Received: (qmail 1624 invoked by alias); 21 Apr 2015 07:24:27 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 108248 invoked by uid 89); 21 Apr 2015 07:24:19 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.8 required=5.0 tests=AWL, BAYES_00, SPF_PASS, T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 X-HELO: smtp.gentoo.org Received: from smtp.gentoo.org (HELO smtp.gentoo.org) (140.211.166.183) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Tue, 21 Apr 2015 07:24:17 +0000 Received: from localhost.localdomain (localhost [127.0.0.1]) by smtp.gentoo.org (Postfix) with ESMTP id 5ACE2340DA3 for ; Tue, 21 Apr 2015 07:24:15 +0000 (UTC) From: Mike Frysinger To: gdb-patches@sourceware.org Subject: [PATCH 3/5] sim: mcore: drop watchpoint/dumpmem/clearstats support Date: Tue, 21 Apr 2015 03:18:15 -0400 Message-Id: <1429600697-9142-3-git-send-email-vapier@gentoo.org> In-Reply-To: <1429600697-9142-1-git-send-email-vapier@gentoo.org> References: <1429600697-9142-1-git-send-email-vapier@gentoo.org> X-IsSubscribed: yes In preparation for converting to the common memory framework, the custom commands get in our way. But when we realize that gdb support has been dropped for mcore, it makes things a bit easier: the main runner does not let you run arbitrary commands once simulation starts. So lets disable watchpoint support until it can be converted to the common watchpoint logic. There's already an ifdef to let us do that. We straight up drop support for the dumpmem command (no other sim supports this, and if it's a feature people want, we can add a common func) and the clearstats command (not a big deal -- just restart your simulation). We leave in place the verbose check points as a follow up commit will cut that over to common logic. Committed. --- sim/mcore/ChangeLog | 6 ++++ sim/mcore/interp.c | 79 ++++------------------------------------------------- 2 files changed, 12 insertions(+), 73 deletions(-) diff --git a/sim/mcore/ChangeLog b/sim/mcore/ChangeLog index 6f49fec..20c6f77 100644 --- a/sim/mcore/ChangeLog +++ b/sim/mcore/ChangeLog @@ -1,5 +1,11 @@ 2015-04-21 Mike Frysinger + * interp.c (WATCHFUNCTIONS): Undef it. + (sim_resume): Move WLhash behind WATCHFUNCTIONS. + (sim_do_command): Delete. + +2015-04-21 Mike Frysinger + * Makefile.in (NL_TARGET): Define. * interp.c (NUM_ELEM, opened, log_open, log_close, is_opened): Delete. (syscall_read_mem, syscall_write_mem): New functions. diff --git a/sim/mcore/interp.c b/sim/mcore/interp.c index b7810d2..b837ecf 100644 --- a/sim/mcore/interp.c +++ b/sim/mcore/interp.c @@ -561,7 +561,8 @@ iu_carry (unsigned long a, unsigned long b, int cin) return (x != 0); } -#define WATCHFUNCTIONS 1 +/* TODO: Convert to common watchpoints. */ +#undef WATCHFUNCTIONS #ifdef WATCHFUNCTIONS #define MAXWL 80 @@ -600,7 +601,9 @@ sim_resume (SIM_DESC sd, int step, int siggnal) int insts; int w; int cycs; +#ifdef WATCHFUNCTIONS word WLhash; +#endif cpu.asregs.exception = step ? SIGTRAP: 0; pc = CPU_PC_GET (scpu); @@ -619,11 +622,13 @@ sim_resume (SIM_DESC sd, int step, int siggnal) else cpu.asregs.active_gregs = & cpu.asregs.gregs[0]; +#ifdef WATCHFUNCTIONS /* make a hash to speed exec loop, hope it's nonzero */ WLhash = 0xFFFFFFFF; for (w = 1; w <= ENDWL; w++) WLhash = WLhash & WL[w]; +#endif do { @@ -1889,75 +1894,3 @@ sim_create_inferior (SIM_DESC sd, struct bfd *prog_bfd, char **argv, char **env) return SIM_RC_OK; } - -void -sim_do_command (SIM_DESC sd, const char *cmd) -{ - /* Nothing there yet; it's all an error. */ - - if (cmd != NULL) - { - char ** simargv = buildargv (cmd); - - if (strcmp (simargv[0], "watch") == 0) - { - if ((simargv[1] == NULL) || (simargv[2] == NULL)) - { - fprintf (stderr, "Error: missing argument to watch cmd.\n"); - freeargv (simargv); - return; - } - - ENDWL++; - - WL[ENDWL] = strtol (simargv[2], NULL, 0); - WLstr[ENDWL] = strdup (simargv[1]); - fprintf (stderr, "Added %s (%x) to watchlist, #%d\n",WLstr[ENDWL], - WL[ENDWL], ENDWL); - - } - else if (strcmp (simargv[0], "dumpmem") == 0) - { - unsigned char * p; - FILE * dumpfile; - - if (simargv[1] == NULL) - fprintf (stderr, "Error: missing argument to dumpmem cmd.\n"); - - fprintf (stderr, "Writing dumpfile %s...",simargv[1]); - - dumpfile = fopen (simargv[1], "w"); - p = cpu.mem; - fwrite (p, cpu.asregs.msize-1, 1, dumpfile); - fclose (dumpfile); - - fprintf (stderr, "done.\n"); - } - else if (strcmp (simargv[0], "clearstats") == 0) - { - cpu.asregs.cycles = 0; - cpu.asregs.insts = 0; - cpu.asregs.stalls = 0; - ENDWL = 0; - } - else if (strcmp (simargv[0], "verbose") == 0) - { - issue_messages = 2; - } - else - { - fprintf (stderr,"Error: \"%s\" is not a valid M.CORE simulator command.\n", - cmd); - } - - freeargv (simargv); - } - else - { - fprintf (stderr, "M.CORE sim commands: \n"); - fprintf (stderr, " watch \n"); - fprintf (stderr, " dumpmem \n"); - fprintf (stderr, " clearstats\n"); - fprintf (stderr, " verbose\n"); - } -}