From patchwork Fri Mar 13 14:41:32 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yao Qi X-Patchwork-Id: 5604 Received: (qmail 129455 invoked by alias); 13 Mar 2015 14:41:44 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 129417 invoked by uid 89); 13 Mar 2015 14:41:41 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=2.3 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, KAM_FROM_URIBL_PCCC, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=no version=3.3.2 X-HELO: mail-pa0-f54.google.com Received: from mail-pa0-f54.google.com (HELO mail-pa0-f54.google.com) (209.85.220.54) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Fri, 13 Mar 2015 14:41:39 +0000 Received: by padfa1 with SMTP id fa1so30032089pad.3 for ; Fri, 13 Mar 2015 07:41:38 -0700 (PDT) X-Received: by 10.70.118.38 with SMTP id kj6mr37125653pdb.156.1426257698297; Fri, 13 Mar 2015 07:41:38 -0700 (PDT) Received: from E107787-LIN.cambridge.arm.com (gcc1-power7.osuosl.org. [140.211.15.137]) by mx.google.com with ESMTPSA id i6sm3924861pdm.4.2015.03.13.07.41.36 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 13 Mar 2015 07:41:37 -0700 (PDT) From: Yao Qi To: gdb-patches@sourceware.org Subject: [PATCH 2/2] watchpoint-reuse-slot.exp: skip when requesting two breakpoints in one slot on aarch64 Date: Fri, 13 Mar 2015 14:41:32 +0000 Message-Id: <1426257692-30461-2-git-send-email-qiyaoltc@gmail.com> In-Reply-To: <1426257692-30461-1-git-send-email-qiyaoltc@gmail.com> References: <1426257692-30461-1-git-send-email-qiyaoltc@gmail.com> X-IsSubscribed: yes From: Yao Qi watchpoint-reuse-slot.exp sets two hardware breakpoints in contiguous address to reuse one debug register. However, requested address for breakpoint should be 4-byte aligned on aarch64, so it is impossible to request two hardware breakpoints and use one debug register. This patch is to skip the test in the case on aarch64-linux. Since arm has Thumb mode, in which instruction address can be 2-byte aligned, more thoughts are needed for arm in my next step. gdb/testsuite: 2015-03-13 Yao Qi * gdb.base/watchpoint-reuse-slot.exp: Skip tests when two breakpoints are requested on aarch64-linux. --- gdb/testsuite/gdb.base/watchpoint-reuse-slot.exp | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/gdb/testsuite/gdb.base/watchpoint-reuse-slot.exp b/gdb/testsuite/gdb.base/watchpoint-reuse-slot.exp index df6eeb6..c646f22 100644 --- a/gdb/testsuite/gdb.base/watchpoint-reuse-slot.exp +++ b/gdb/testsuite/gdb.base/watchpoint-reuse-slot.exp @@ -178,10 +178,18 @@ foreach always_inserted {"off" "on" } { foreach cmd2 $cmds { for {set width 1} {$width < 4} {incr width} { - if {$cmd1 == "hbreak" && $cmd2 == "hbreak" && $width > 1} { - # hbreak ignores WIDTH, no use testing more than - # once. - continue + if {$cmd1 == "hbreak" && $cmd2 == "hbreak"} { + if {$width > 1} { + # hbreak ignores WIDTH, no use testing more than + # once. + continue + } + + if { [istarget "aarch64*-*-linux*"] } { + # The address for breakpoint should be 4-byte + # aligned, so can't reuse slot. + continue + } } if {($cmd1 == "hbreak" && $cmd2 != "hbreak"