From patchwork Tue Oct 21 00:57:00 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Victor Kamensky X-Patchwork-Id: 3303 Received: (qmail 12637 invoked by alias); 21 Oct 2014 00:57:31 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 12523 invoked by uid 89); 21 Oct 2014 00:57:31 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-pa0-f50.google.com Received: from mail-pa0-f50.google.com (HELO mail-pa0-f50.google.com) (209.85.220.50) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Tue, 21 Oct 2014 00:57:29 +0000 Received: by mail-pa0-f50.google.com with SMTP id kx10so188430pab.37 for ; Mon, 20 Oct 2014 17:57:27 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=YB53+oijwJ1eUCyPoHxzUbNp7yOq1JNplqy1IOodyu8=; b=JZ4vF29cqxCqMAeHzjA3WtYg1dsZdGXszRJbAlswSm96tZ+UMLoPqS60zH3v/COho0 vULGd+lWjcrJF2qBGSoSFpcKmEuEq/pA1PHJgxifTRjL9iDr+od+/wgAs9QhBOP1aPmU LZzPYD3I5IwblqFGhOTMyrJOzAwGzOmKBBnKA/tH7RXQ7LA4Y6d9gS9245mKMDIiOnmz //Z7IudpNn14guTvdL1l7NeWvH6tUMiGu0bOe4aunkOE8tMLnbk/2qGLngXnxxm8RQiU O+TjuVZM8eNPoiEc4fHIh8LjFE0UkRoIto64r2CZSUm+Hi+RbiTW0xs608125c0cjros CL1A== X-Gm-Message-State: ALoCoQkQdfIM84h4bqzIMXa7gUZn4ky73pfQY0+VjWDFM6HOSslTw45ZYuNO/R3fYCG5QcwUPbu/ X-Received: by 10.68.69.74 with SMTP id c10mr9047996pbu.80.1413853047860; Mon, 20 Oct 2014 17:57:27 -0700 (PDT) Received: from kamensky-w530.cisco.com.net ([24.6.79.41]) by mx.google.com with ESMTPSA id g15sm10230692pdm.68.2014.10.20.17.57.26 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 20 Oct 2014 17:57:27 -0700 (PDT) From: Victor Kamensky To: gdb-patches@sourceware.org Cc: victor.kamensky@linaro.org Subject: [PATCH 4/5] ARM: read_pieced_value do big endian processing only in case of valid gdb_regnum Date: Mon, 20 Oct 2014 17:57:00 -0700 Message-Id: <1413853021-4393-5-git-send-email-victor.kamensky@linaro.org> In-Reply-To: <1413853021-4393-1-git-send-email-victor.kamensky@linaro.org> References: <1413853021-4393-1-git-send-email-victor.kamensky@linaro.org> During armv7b testing gdb.base/store.exp test was failling with 'GDB internal error'. It turns out that compiler generated DWARF with non-existent register numbers. The compiler issue is present in both little endian (armv7) and big endian (armv7b) (it is separate issue). In both case gdbarch_dwarf2_reg_to_regnum returns -1 which is stored into gdb_regnum. But it cause severe problem only in big endian case because in read_pieced_value and write_pieced_value functions BFD_ENDIAN_BIG related processing happen regardless of gdb_regnum value, and in case of gdb_regnum=-1, it cause 'GDB internal error' and crash. Solution is to move BFD_ENDIAN_BIG related processing under (gdb_regnum != -1) branch of processing. --- gdb/ChangeLog | 6 ++++++ gdb/dwarf2loc.c | 30 +++++++++++++++--------------- 2 files changed, 21 insertions(+), 15 deletions(-) diff --git a/gdb/ChangeLog b/gdb/ChangeLog index c32fb3f..6a735b8 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,5 +1,11 @@ 2014-10-13 Victor Kamensky + * dwarf2loc.c (read_pieced_value): do BE processing only if + gdb_regnum is not -1. + (write_pieced_value): Ditto. + +2014-10-13 Victor Kamensky + * arm-tdep.c: (extract_arm_insn): use dbarch_byte_order_for_code to read arm instruction. diff --git a/gdb/dwarf2loc.c b/gdb/dwarf2loc.c index e347e59..fbe99bb 100644 --- a/gdb/dwarf2loc.c +++ b/gdb/dwarf2loc.c @@ -1686,20 +1686,20 @@ read_pieced_value (struct value *v) int gdb_regnum = gdbarch_dwarf2_reg_to_regnum (arch, p->v.regno); int reg_offset = source_offset; - if (gdbarch_byte_order (arch) == BFD_ENDIAN_BIG - && this_size < register_size (arch, gdb_regnum)) - { - /* Big-endian, and we want less than full size. */ - reg_offset = register_size (arch, gdb_regnum) - this_size; - /* We want the lower-order THIS_SIZE_BITS of the bytes - we extract from the register. */ - source_offset_bits += 8 * this_size - this_size_bits; - } - if (gdb_regnum != -1) { int optim, unavail; + if (gdbarch_byte_order (arch) == BFD_ENDIAN_BIG + && this_size < register_size (arch, gdb_regnum)) + { + /* Big-endian, and we want less than full size. */ + reg_offset = register_size (arch, gdb_regnum) - this_size; + /* We want the lower-order THIS_SIZE_BITS of the bytes + we extract from the register. */ + source_offset_bits += 8 * this_size - this_size_bits; + } + if (!get_frame_register_bytes (frame, gdb_regnum, reg_offset, this_size, buffer, &optim, &unavail)) @@ -1878,13 +1878,13 @@ write_pieced_value (struct value *to, struct value *from) int gdb_regnum = gdbarch_dwarf2_reg_to_regnum (arch, p->v.regno); int reg_offset = dest_offset; - if (gdbarch_byte_order (arch) == BFD_ENDIAN_BIG - && this_size <= register_size (arch, gdb_regnum)) - /* Big-endian, and we want less than full size. */ - reg_offset = register_size (arch, gdb_regnum) - this_size; - if (gdb_regnum != -1) { + if (gdbarch_byte_order (arch) == BFD_ENDIAN_BIG + && this_size <= register_size (arch, gdb_regnum)) + /* Big-endian, and we want less than full size. */ + reg_offset = register_size (arch, gdb_regnum) - this_size; + if (need_bitwise) { int optim, unavail;