From patchwork Tue Jun 17 14:12:55 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gary Benson X-Patchwork-Id: 1523 Received: (qmail 2933 invoked by alias); 17 Jun 2014 14:44:33 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 2922 invoked by uid 89); 17 Jun 2014 14:44:33 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.6 required=5.0 tests=AWL, BAYES_00, RP_MATCHES_RCVD, SPF_HELO_PASS, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 17 Jun 2014 14:44:31 +0000 Received: from int-mx09.intmail.prod.int.phx2.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.22]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id s5HED89L027969 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Tue, 17 Jun 2014 10:13:08 -0400 Received: from blade.nx (ovpn-116-59.ams2.redhat.com [10.36.116.59]) by int-mx09.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id s5HED6Pr018299 for ; Tue, 17 Jun 2014 10:13:06 -0400 Received: from blade.nx (localhost [127.0.0.1]) by blade.nx (Postfix) with ESMTP id 182AC262487 for ; Tue, 17 Jun 2014 15:13:05 +0100 (BST) From: Gary Benson To: gdb-patches@sourceware.org Subject: [PATCH 12/15] Create nat/i386-dregs.h Date: Tue, 17 Jun 2014 15:12:55 +0100 Message-Id: <1403014378-4349-13-git-send-email-gbenson@redhat.com> In-Reply-To: <1403014378-4349-1-git-send-email-gbenson@redhat.com> References: <1403014378-4349-1-git-send-email-gbenson@redhat.com> X-IsSubscribed: yes This commit moves code to be shared from i386-{nat,low}.[ch] into a new file, nat/i386-dregs.h. gdb/ 2014-06-17 Gary Benson * nat/i386-dregs.h: New file. * i386-nat.h (i386-dregs.h): New include. (DR_FIRSTADDR): Now in i386-dregs.h. (DR_LASTADDR): Likewise. (DR_NADDR): Likewise. (DR_STATUS): Likewise. (DR_CONTROL): Likewise. (i386_debug_reg_state): Likewise. * i386-nat.c (ALL_DEBUG_REGISTERS): Likewise. gdb/gdbserver/ 2014-06-17 Gary Benson * i386-low.h (i386-dregs.h): New include. (DR_FIRSTADDR): Now in i386-dregs.h. (DR_LASTADDR): Likewise. (DR_NADDR): Likewise. (DR_STATUS): Likewise. (DR_CONTROL): Likewise. (i386_debug_reg_state): Likewise. (i386_dr_insert_watchpoint): Likewise. (i386_dr_remove_watchpoint): Likewise. (i386_dr_region_ok_for_watchpoint): Likewise. (i386_dr_stopped_data_address): Likewise. (i386_dr_stopped_by_watchpoint): Likewise. * i386-low.c (ALL_DEBUG_REGISTERS): Likewise. --- gdb/ChangeLog | 12 ++++ gdb/gdbserver/ChangeLog | 16 +++++ gdb/gdbserver/i386-low.c | 3 - gdb/gdbserver/i386-low.h | 64 +--------------------- gdb/i386-nat.c | 3 - gdb/i386-nat.h | 32 +---------- gdb/nat/i386-dregs.h | 138 ++++++++++++++++++++++++++++++++++++++++++++++ 7 files changed, 170 insertions(+), 98 deletions(-) create mode 100644 gdb/nat/i386-dregs.h diff --git a/gdb/gdbserver/i386-low.c b/gdb/gdbserver/i386-low.c index 1c9d7aa..bd25694 100644 --- a/gdb/gdbserver/i386-low.c +++ b/gdb/gdbserver/i386-low.c @@ -146,9 +146,6 @@ /* Did the watchpoint whose address is in the I'th register break? */ #define I386_DR_WATCH_HIT(dr6, i) ((dr6) & (1 << (i))) -/* A macro to loop over all debug registers. */ -#define ALL_DEBUG_REGISTERS(i) for (i = 0; i < DR_NADDR; i++) - /* Types of operations supported by i386_handle_nonaligned_watchpoint. */ typedef enum { WP_INSERT, WP_REMOVE, WP_COUNT } i386_wp_op_t; diff --git a/gdb/gdbserver/i386-low.h b/gdb/gdbserver/i386-low.h index 3d3feb3..71f7c32 100644 --- a/gdb/gdbserver/i386-low.h +++ b/gdb/gdbserver/i386-low.h @@ -17,74 +17,12 @@ You should have received a copy of the GNU General Public License along with this program. If not, see . */ -/* Support for hardware watchpoints and breakpoints using the i386 - debug registers. - - This provides several functions for inserting and removing - hardware-assisted breakpoints and watchpoints, testing if one or - more of the watchpoints triggered and at what address, checking - whether a given region can be watched, etc. - - The functions below implement debug registers sharing by reference - counts, and allow to watch regions up to 16 bytes long - (32 bytes on 64 bit hosts). */ - -/* Debug registers' indices. */ -#define DR_FIRSTADDR 0 -#define DR_LASTADDR 3 -#define DR_NADDR 4 /* The number of debug address registers. */ -#define DR_STATUS 6 /* Index of debug status register (DR6). */ -#define DR_CONTROL 7 /* Index of debug control register (DR7). */ - -/* Global state needed to track h/w watchpoints. */ - -struct i386_debug_reg_state -{ - /* Mirror the inferior's DRi registers. We keep the status and - control registers separated because they don't hold addresses. - Note that since we can change these mirrors while threads are - running, we never trust them to explain a cause of a trap. - For that, we need to peek directly in the inferior registers. */ - CORE_ADDR dr_mirror[DR_NADDR]; - unsigned dr_status_mirror, dr_control_mirror; - - /* Reference counts for each debug register. */ - int dr_ref_count[DR_NADDR]; -}; + +#include "nat/i386-dregs.h" /* Initialize STATE. */ extern void i386_low_init_dregs (struct i386_debug_reg_state *state); -/* Insert a watchpoint to watch a memory region which starts at - address ADDR and whose length is LEN bytes. Watch memory accesses - of the type TYPE. Return 0 on success, -1 on failure. */ -extern int i386_dr_insert_watchpoint (struct i386_debug_reg_state *state, - enum target_hw_bp_type type, - CORE_ADDR addr, - int len); - -/* Remove a watchpoint that watched the memory region which starts at - address ADDR, whose length is LEN bytes, and for accesses of the - type TYPE. Return 0 on success, -1 on failure. */ -extern int i386_dr_remove_watchpoint (struct i386_debug_reg_state *state, - enum target_hw_bp_type type, - CORE_ADDR addr, - int len); - -/* Return non-zero if we can watch a memory region that starts at - address ADDR and whose length is LEN bytes. */ -extern int i386_dr_region_ok_for_watchpoint (struct i386_debug_reg_state *state, - CORE_ADDR addr, int len); - -/* If the inferior has some break/watchpoint that triggered, set the - address associated with that break/watchpoint and return true. - Otherwise, return false. */ -extern int i386_dr_stopped_data_address (struct i386_debug_reg_state *state, - CORE_ADDR *addr_p); - -/* Return true if the inferior has some watchpoint that triggered. - Otherwise return false. */ -extern int i386_dr_stopped_by_watchpoint (struct i386_debug_reg_state *state); /* Each target needs to provide several low-level functions that will be called to insert watchpoints and hardware breakpoints diff --git a/gdb/i386-nat.c b/gdb/i386-nat.c index 86e655f..1dfa9ee 100644 --- a/gdb/i386-nat.c +++ b/gdb/i386-nat.c @@ -171,9 +171,6 @@ struct i386_dr_low_type i386_dr_low; /* Did the watchpoint whose address is in the I'th register break? */ #define I386_DR_WATCH_HIT(dr6, i) ((dr6) & (1 << (i))) -/* A macro to loop over all debug registers. */ -#define ALL_DEBUG_REGISTERS(i) for (i = 0; i < DR_NADDR; i++) - /* Per-process data. We don't bind this to a per-inferior registry because of targets like x86 GNU/Linux that need to keep track of processes that aren't bound to any inferior (e.g., fork children, diff --git a/gdb/i386-nat.h b/gdb/i386-nat.h index ae2f1a7..1f4130c 100644 --- a/gdb/i386-nat.h +++ b/gdb/i386-nat.h @@ -23,6 +23,8 @@ #ifndef I386_NAT_H #define I386_NAT_H 1 +#include "nat/i386-dregs.h" + /* Hardware-assisted breakpoints and watchpoints. */ /* Add watchpoint methods to the provided target_ops. @@ -34,12 +36,7 @@ extern void i386_use_watchpoints (struct target_ops *); /* Support for hardware watchpoints and breakpoints using the i386 debug registers. - This provides several functions for inserting and removing - hardware-assisted breakpoints and watchpoints, testing if one or - more of the watchpoints triggered and at what address, checking - whether a given region can be watched, etc. - - In addition, each target should provide several low-level functions + Each target should provide several low-level functions regrouped into i386_dr_low_type struct below. These functions that will be called to insert watchpoints and hardware breakpoints into the inferior, remove them, and check their status. These @@ -76,29 +73,6 @@ struct i386_dr_low_type extern struct i386_dr_low_type i386_dr_low; -/* Debug registers' indices. */ -#define DR_FIRSTADDR 0 -#define DR_LASTADDR 3 -#define DR_NADDR 4 /* The number of debug address registers. */ -#define DR_STATUS 6 /* Index of debug status register (DR6). */ -#define DR_CONTROL 7 /* Index of debug control register (DR7). */ - -/* Global state needed to track h/w watchpoints. */ - -struct i386_debug_reg_state -{ - /* Mirror the inferior's DRi registers. We keep the status and - control registers separated because they don't hold addresses. - Note that since we can change these mirrors while threads are - running, we never trust them to explain a cause of a trap. - For that, we need to peek directly in the inferior registers. */ - CORE_ADDR dr_mirror[DR_NADDR]; - unsigned dr_status_mirror, dr_control_mirror; - - /* Reference counts for each debug register. */ - int dr_ref_count[DR_NADDR]; -}; - /* Use this function to set i386_dr_low debug_register_length field rather than setting it directly to check that the length is only set once. It also enables the 'maint set/show show-debug-regs' diff --git a/gdb/nat/i386-dregs.h b/gdb/nat/i386-dregs.h new file mode 100644 index 0000000..c17c6ae --- /dev/null +++ b/gdb/nat/i386-dregs.h @@ -0,0 +1,138 @@ +/* Debug register code for the i386. + + Copyright (C) 2009-2014 Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . */ + +/* Support for hardware watchpoints and breakpoints using the i386 + debug registers. + + This provides several functions for inserting and removing + hardware-assisted breakpoints and watchpoints, testing if one or + more of the watchpoints triggered and at what address, checking + whether a given region can be watched, etc. + + The functions below implement debug registers sharing by reference + counts, and allow to watch regions up to 16 bytes long + (32 bytes on 64 bit hosts). */ + +#ifndef I386_DREGS_H +#define I386_DREGS_H 1 + +/* Forward declaration. */ +enum target_hw_bp_type; + +/* Debug registers' indices. */ +#define DR_FIRSTADDR 0 +#define DR_LASTADDR 3 +#define DR_NADDR 4 /* The number of debug address registers. */ +#define DR_STATUS 6 /* Index of debug status register (DR6). */ +#define DR_CONTROL 7 /* Index of debug control register (DR7). */ + +/* Global state needed to track h/w watchpoints. */ + +struct i386_debug_reg_state +{ + /* Mirror the inferior's DRi registers. We keep the status and + control registers separated because they don't hold addresses. + Note that since we can change these mirrors while threads are + running, we never trust them to explain a cause of a trap. + For that, we need to peek directly in the inferior registers. */ + CORE_ADDR dr_mirror[DR_NADDR]; + unsigned dr_status_mirror, dr_control_mirror; + + /* Reference counts for each debug register. */ + int dr_ref_count[DR_NADDR]; +}; + +/* A macro to loop over all debug registers. */ +#define ALL_DEBUG_REGISTERS(i) for (i = 0; i < DR_NADDR; i++) + +/* High-level functions. */ + +/* Insert a watchpoint to watch a memory region which starts at + address ADDR and whose length is LEN bytes. Watch memory accesses + of the type TYPE. Return 0 on success, -1 on failure. */ +extern int i386_dr_insert_watchpoint (struct i386_debug_reg_state *state, + enum target_hw_bp_type type, + CORE_ADDR addr, + int len); + +/* Remove a watchpoint that watched the memory region which starts at + address ADDR, whose length is LEN bytes, and for accesses of the + type TYPE. Return 0 on success, -1 on failure. */ +extern int i386_dr_remove_watchpoint (struct i386_debug_reg_state *state, + enum target_hw_bp_type type, + CORE_ADDR addr, + int len); + +/* Return non-zero if we can watch a memory region that starts at + address ADDR and whose length is LEN bytes. */ +extern int i386_dr_region_ok_for_watchpoint (struct i386_debug_reg_state *state, + CORE_ADDR addr, int len); + +/* If the inferior has some break/watchpoint that triggered, set the + address associated with that break/watchpoint and return true. + Otherwise, return false. */ +extern int i386_dr_stopped_data_address (struct i386_debug_reg_state *state, + CORE_ADDR *addr_p); + +/* Return true if the inferior has some watchpoint that triggered. + Otherwise return false. */ +extern int i386_dr_stopped_by_watchpoint (struct i386_debug_reg_state *state); + +/* Low-level functions. */ + +/* Print the values of the mirrored debug registers. */ + +extern void i386_dr_show (struct i386_debug_reg_state *state, + const char *func, CORE_ADDR addr, + int len, enum target_hw_bp_type type); + +/* Return the value of a 4-bit field for DR7 suitable for watching a + region of LEN bytes for accesses of type TYPE. LEN is assumed to + have the value of 1, 2, or 4. */ + +extern unsigned i386_dr_length_and_rw_bits (int len, + enum target_hw_bp_type type); + +/* Insert a watchpoint at address ADDR, which is assumed to be aligned + according to the length of the region to watch. LEN_RW_BITS is the + value of the bits from DR7 which describes the length and access + type of the region to be watched by this watchpoint. Return 0 on + success, -1 on failure. */ + +extern int i386_dr_insert_aligned_watchpoint (struct i386_debug_reg_state *state, + CORE_ADDR addr, + unsigned len_rw_bits); + +/* Remove a watchpoint at address ADDR, which is assumed to be aligned + according to the length of the region to watch. LEN_RW_BITS is the + value of the bits from DR7 which describes the length and access + type of the region watched by this watchpoint. Return 0 on + success, -1 on failure. */ + +extern int i386_dr_remove_aligned_watchpoint (struct i386_debug_reg_state *state, + CORE_ADDR addr, + unsigned len_rw_bits); + +/* Update the inferior debug registers state, in STATE, with the + new debug registers state, in NEW_STATE. */ + +extern void i386_dr_update_inferior_debug_regs (struct i386_debug_reg_state *state, + struct i386_debug_reg_state *new_state); + +#endif /* I386_DREGS_H */