From patchwork Fri Dec 23 06:06:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mike Frysinger X-Patchwork-Id: 55382 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 7ED1E384E792 for ; Fri, 23 Dec 2022 06:07:50 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 7ED1E384E792 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1671775670; bh=NghUIt9CHGCRGV89MM6/0z/XjLYGEwKy8oyg6L+3uPA=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=RfcPRf9zVa9uOn9qUUouSdblmKLbq2NBZku5721H8U/4ZGSSvH6VcxvZ9f9ezDD8q vvCopYr73dPuj1kNkMAr6IRM1wpGotNf19XqQdALtxOJWDEaarGEUI+2Cq556xKnJd oVs5D0lDJ0E6UrdeCuiKCkgFEi5PAfHY3Acfrw60= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from smtp.gentoo.org (mail.gentoo.org [IPv6:2001:470:ea4a:1:5054:ff:fec7:86e4]) by sourceware.org (Postfix) with ESMTP id A864C3857C45 for ; Fri, 23 Dec 2022 06:07:17 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org A864C3857C45 Received: by smtp.gentoo.org (Postfix, from userid 559) id 34A4C3411D4; Fri, 23 Dec 2022 06:07:17 +0000 (UTC) To: gdb-patches@sourceware.org Subject: [PATCH 00/20] sim: reduce sim-main.h pollution Date: Fri, 23 Dec 2022 01:06:53 -0500 Message-Id: <20221223060713.28821-1-vapier@gentoo.org> X-Mailer: git-send-email 2.39.0 MIME-Version: 1.0 X-Spam-Status: No, score=-5.1 required=5.0 tests=BAYES_00, JMQ_SPF_NEUTRAL, KAM_DMARC_STATUS, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Mike Frysinger via Gdb-patches From: Mike Frysinger Reply-To: Mike Frysinger Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" The sim-main.h header is supposed to be a minimal interface between the port and the common code to define the sim_state & sim_cpu data structures. Unfortunately it has grown over time to include a lot more stuff for each port, so it's turned into a bit of a dumping ground. The sim_state & sim_cpu logic has been split out & unified at this point, so this header no longer needs to provide nearly as much as it historically has. That isn't to say it's completely unused at this point, but in order to get a better grip on what's left, move unnecessary logic now out of each port's sim-main.h. For most non-cgen ports, this header is reduced to the bare min: including sim-basics.h & sim-base.h and nothing else. Mike Frysinger (20): sim: avr: move arch-specific settings to internal header sim: aarch64: move arch-specific settings to internal header sim: arm: move arch-specific settings to internal header sim: cr16: move arch-specific settings to internal header sim: d10v: move arch-specific settings to internal header sim: ft32: move arch-specific settings to internal header sim: msp430: move arch-specific settings to internal header sim: v850: standardize the arch-specific settings a little sim: riscv: move arch-specific settings to internal header sim: moxie: move arch-specific settings to internal header sim: example-synacor: move arch-specific settings to internal header sim: microblaze: move arch-specific settings to internal header sim: mn10300: standardize the arch-specific settings a little sim: pru: move arch-specific settings to internal header sim: h8300: move arch-specific settings to internal header sim: mcore: move arch-specific settings to internal header sim: sh: move arch-specific settings to internal header sim: m68hc11: move arch-specific settings to internal header sim: bfin: move arch-specific settings to internal header sim: m32r: move arch-specific settings to internal header sim/aarch64/aarch64-sim.h | 60 ++ sim/aarch64/cpustate.c | 2 + sim/aarch64/cpustate.h | 1 + sim/aarch64/interp.c | 2 + sim/aarch64/sim-main.h | 35 - sim/aarch64/simulator.c | 1 + sim/arm/arm-sim.h | 26 + sim/arm/armdefs.h | 6 + sim/arm/armemu.h | 2 + sim/arm/sim-main.h | 5 - sim/arm/wrapper.c | 1 + sim/avr/avr-sim.h | 41 ++ sim/avr/interp.c | 1 + sim/avr/sim-main.h | 18 - sim/bfin/bfin-sim.c | 2 + sim/bfin/bfin-sim.h | 29 + sim/bfin/devices.h | 2 + sim/bfin/dv-bfin_pll.c | 1 - sim/bfin/interp.c | 3 + sim/bfin/machs.c | 3 + sim/bfin/sim-main.h | 36 - sim/cr16/{cr16_sim.h => cr16-sim.h} | 1 + sim/cr16/gencode.c | 3 +- sim/cr16/interp.c | 2 + sim/cr16/sim-main.h | 2 - sim/cr16/simops.c | 2 + sim/d10v/{d10v_sim.h => d10v-sim.h} | 5 + sim/d10v/endian.c | 4 +- sim/d10v/gencode.c | 3 +- sim/d10v/interp.c | 2 + sim/d10v/sim-main.h | 2 - sim/d10v/simops.c | 2 + sim/example-synacor/example-synacor-sim.h | 38 + sim/example-synacor/interp.c | 2 + sim/example-synacor/sim-main.c | 2 + sim/example-synacor/sim-main.h | 14 - sim/ft32/interp.c | 2 + sim/ft32/sim-main.h | 2 - sim/h8300/compile.c | 2 + sim/h8300/h8300-sim.h | 153 ++++ sim/h8300/sim-main.h | 147 ---- sim/m32r/m32r-sim.h | 22 + sim/m32r/m32r.c | 2 + sim/m32r/m32r2.c | 2 + sim/m32r/m32rx.c | 2 + sim/m32r/sim-if.c | 1 + sim/m32r/sim-main.h | 24 +- sim/m32r/traps.c | 2 + sim/m68hc11/dv-m68hc11.c | 2 + sim/m68hc11/dv-m68hc11eepr.c | 2 +- sim/m68hc11/dv-m68hc11sio.c | 1 + sim/m68hc11/dv-m68hc11spi.c | 1 + sim/m68hc11/dv-m68hc11tim.c | 2 + sim/m68hc11/dv-nvram.c | 1 + sim/m68hc11/emulos.c | 2 + sim/m68hc11/gencode.c | 2 +- sim/m68hc11/interp.c | 2 + sim/m68hc11/interrupts.c | 2 + sim/m68hc11/m68hc11-sim.h | 565 +++++++++++++++ sim/m68hc11/m68hc11_sim.c | 4 +- sim/m68hc11/sim-main.h | 541 -------------- sim/mcore/interp.c | 2 + sim/mcore/mcore-sim.h | 64 ++ sim/mcore/sim-main.h | 40 - sim/microblaze/interp.c | 1 + sim/microblaze/microblaze-sim.h | 46 ++ sim/microblaze/sim-main.h | 24 - sim/mn10300/interp.c | 2 - sim/mn10300/{mn10300_sim.h => mn10300-sim.h} | 24 +- sim/mn10300/op_utils.c | 10 +- sim/mn10300/sim-main.h | 34 +- sim/moxie/interp.c | 2 + sim/moxie/moxie-sim.h | 34 + sim/moxie/sim-main.h | 11 - sim/msp430/msp430-sim.c | 2 + sim/msp430/msp430-sim.h | 2 + sim/msp430/sim-main.h | 8 - sim/pru/pru.h | 56 ++ sim/pru/sim-main.h | 58 -- sim/riscv/interp.c | 2 + sim/riscv/machs.c | 1 + sim/riscv/riscv-sim.h | 78 ++ sim/riscv/sim-main.c | 2 + sim/riscv/sim-main.h | 55 -- sim/sh/interp.c | 2 + sim/sh/sh-sim.h | 118 +++ sim/sh/sim-main.h | 96 --- sim/v850/interp.c | 2 +- sim/v850/sim-main.h | 721 +----------------- sim/v850/simops.c | 2 +- sim/v850/simops.h | 3 + sim/v850/v850-sim.h | 722 +++++++++++++++++++ sim/v850/v850_sim.h | 8 - 93 files changed, 2190 insertions(+), 1891 deletions(-) create mode 100644 sim/aarch64/aarch64-sim.h create mode 100644 sim/arm/arm-sim.h create mode 100644 sim/avr/avr-sim.h rename sim/cr16/{cr16_sim.h => cr16-sim.h} (99%) rename sim/d10v/{d10v_sim.h => d10v-sim.h} (99%) create mode 100644 sim/example-synacor/example-synacor-sim.h create mode 100644 sim/h8300/h8300-sim.h create mode 100644 sim/m68hc11/m68hc11-sim.h create mode 100644 sim/mcore/mcore-sim.h create mode 100644 sim/microblaze/microblaze-sim.h rename sim/mn10300/{mn10300_sim.h => mn10300-sim.h} (94%) create mode 100644 sim/moxie/moxie-sim.h create mode 100644 sim/riscv/riscv-sim.h create mode 100644 sim/sh/sh-sim.h create mode 100644 sim/v850/v850-sim.h delete mode 100644 sim/v850/v850_sim.h