[v2,00/26] sim: sim_cpu: invert sim_cpu storage

  This is similar to the patch series for inverting sim_state storage:
https://sourceware.org/pipermail/gdb-patches/2021-May/178806.html

There's more patches here than that series because every arch defines
a custom sim_cpu with real content.
       
Basically we:
1) rename the per-arch "sim_cpu" type to "$arch_sim_cpu",
2) rename the common "sim_cpu_base" to "sim_cpu",
3) add a new "arch_data" to the new common "sim_cpu",
4) define $ARCH_SIM_CPU macro to turn common sim_cpu into the
   $arch_sim_cpu data.

This is another required step along the way to creating a single sim
with multiple arch backends in it -- we can't have common data structs
(like "sim_cpu" which is used everywhere) having completely different
layouts & contents between archs.

v2:
- dropped merged patch: sim: h8300: switch to cpu for state
- reworked cgen integration
- made sure all ports pass their testsuites now

Mike Frysinger (26):
  sim: sim_cpu: invert sim_cpu storage
  sim: bfin: invert sim_cpu storage
  sim: ft32: invert sim_cpu storage
  sim: msp430: invert sim_cpu storage
  sim: moxie: invert sim_cpu storage
  sim: avr: invert sim_cpu storage
  sim: microblaze: invert sim_cpu storage
  sim: aarch64: invert sim_cpu storage
  sim: mcore: invert sim_cpu storage
  sim: v850: invert sim_cpu storage
  sim: mips: invert sim_cpu storage
  sim: m68hc11: invert sim_cpu storage
  sim: h8300: invert sim_cpu storage
  sim: example-synacor: invert sim_cpu storage
  sim: pru: invert sim_cpu storage
  sim: riscv: invert sim_cpu storage
  sim: cgen: prep for inverting sim_cpu storage
  sim: bpf: invert sim_cpu storage
  sim: cris: invert sim_cpu storage
  sim: frv: invert sim_cpu storage
  sim: iq2000: invert sim_cpu storage
  sim: lm32: invert sim_cpu storage
  sim: m32r: invert sim_cpu storage
  sim: or1k: invert sim_cpu storage
  sim: enable common sim_cpu usage everywhere
  sim: fully merge sim_cpu_base into sim_cpu

 sim/aarch64/cpustate.c         | 242 ++++++++++--------
 sim/aarch64/cpustate.h         |   2 +-
 sim/aarch64/interp.c           |   3 +-
 sim/aarch64/sim-main.h         |   6 +-
 sim/aarch64/simulator.c        |   5 +-
 sim/arm/sim-main.h             |   5 -
 sim/avr/interp.c               | 199 ++++++++-------
 sim/avr/sim-main.h             |   6 +-
 sim/bfin/interp.c              |   5 +-
 sim/bfin/sim-main.h            |   8 +-
 sim/bpf/cpu.h                  |   2 +-
 sim/bpf/sim-if.c               |   2 +-
 sim/bpf/sim-main.h             |  14 +-
 sim/common/cgen-cpu.h          |   5 +
 sim/common/sim-cpu.c           |  18 +-
 sim/common/sim-cpu.h           |  61 +++--
 sim/cr16/sim-main.h            |   5 -
 sim/cris/cpuv10.h              |   2 +-
 sim/cris/cpuv32.h              |   2 +-
 sim/cris/cris-tmpl.c           |  19 +-
 sim/cris/sim-if.c              |  31 +--
 sim/cris/sim-main.h            |  15 +-
 sim/cris/traps.c               | 412 ++++++++++++++++---------------
 sim/d10v/sim-main.h            |   5 -
 sim/example-synacor/interp.c   |   3 +-
 sim/example-synacor/sim-main.c |  72 +++---
 sim/example-synacor/sim-main.h |   7 +-
 sim/frv/cpu.h                  |   2 +-
 sim/frv/sim-if.c               |   2 +-
 sim/frv/sim-main.h             |  35 ++-
 sim/ft32/ft32-sim.h            |   2 +
 sim/ft32/interp.c              | 181 +++++++-------
 sim/ft32/sim-main.h            |   9 -
 sim/h8300/compile.c            |  59 ++---
 sim/h8300/sim-main.h           |   9 +-
 sim/iq2000/cpu.h               |   2 +-
 sim/iq2000/sim-if.c            |   3 +-
 sim/iq2000/sim-main.h          |  11 +-
 sim/lm32/cpu.h                 |   2 +-
 sim/lm32/sim-if.c              |   3 +-
 sim/lm32/sim-main.h            |  12 +-
 sim/m32r/cpu.h                 |   2 +-
 sim/m32r/cpu2.h                |   2 +-
 sim/m32r/cpux.h                |   2 +-
 sim/m32r/sim-if.c              |   3 +-
 sim/m32r/sim-main.h            |  13 +-
 sim/m68hc11/dv-m68hc11.c       | 121 +++++----
 sim/m68hc11/dv-m68hc11eepr.c   |  42 ++--
 sim/m68hc11/dv-m68hc11sio.c    |  76 +++---
 sim/m68hc11/dv-m68hc11spi.c    |  45 ++--
 sim/m68hc11/dv-m68hc11tim.c    | 128 +++++-----
 sim/m68hc11/emulos.c           |   4 +-
 sim/m68hc11/interp.c           |  59 +++--
 sim/m68hc11/interrupts.c       |  14 +-
 sim/m68hc11/m68hc11_sim.c      | 195 ++++++++-------
 sim/m68hc11/sim-main.h         | 114 +++++----
 sim/mcore/interp.c             |  59 +++--
 sim/mcore/sim-main.h           |   7 +-
 sim/microblaze/interp.c        |   7 +-
 sim/microblaze/microblaze.h    |   2 +-
 sim/microblaze/sim-main.h      |   5 +-
 sim/mips/interp.c              | 112 +++++----
 sim/mips/sim-main.h            |  49 ++--
 sim/mn10300/sim-main.h         |  11 -
 sim/moxie/interp.c             |   9 +-
 sim/moxie/sim-main.h           |  16 +-
 sim/msp430/msp430-sim.c        | 212 ++++++++--------
 sim/msp430/msp430-sim.h        |   2 +-
 sim/msp430/sim-main.h          |  10 +-
 sim/or1k/cpu.h                 |   2 +-
 sim/or1k/or1k.c                |  36 ++-
 sim/or1k/sim-if.c              |   3 +-
 sim/or1k/sim-main.h            |  12 +-
 sim/or1k/traps.c               |  18 +-
 sim/pru/interp.c               |  30 ++-
 sim/pru/pru.h                  |   2 +-
 sim/pru/sim-main.h             |   5 +-
 sim/riscv/interp.c             |   3 +-
 sim/riscv/sim-main.c           | 439 +++++++++++++++++++--------------
 sim/riscv/sim-main.h           |   5 +-
 sim/sh/sim-main.h              |   5 -
 sim/v850/interp.c              |  15 +-
 sim/v850/sim-main.h            |  22 +-
 sim/v850/v850.igen             |   4 +-
 84 files changed, 1815 insertions(+), 1595 deletions(-)