diff mbox series

RISC-V: Drop __riscv_vendor_feature_bits

Message ID tencent_415FA6209E368DA3166E700C4A4878631A06@qq.com
State Committed
Commit 2605daa6b896aed15dead194462725874f332c0a
Headers
Series RISC-V: Drop __riscv_vendor_feature_bits |

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Commit Message

Yangyu Chen Feb. 11, 2025, 7:35 a.m. UTC 
  As discussed from RISC-V C-API PR #101 [1], As discussed in #96, current
interface is insufficient to support some cases, like a vendor buying a
CPU IP from the upstream vendor but using their own mvendorid and custom
features from the upstream vendor. In this case, we might need to add
these extensions for each downstream vendor many times. Thus, making
__riscv_vendor_feature_bits guarded by mvendorid is not a good idea. So,
drop __riscv_vendor_feature_bits for now, and we should have time to
discuss a better solution.

[1] https://github.com/riscv-non-isa/riscv-c-api-doc/pull/101

Signed-off-by: Yangyu Chen <cyy@cyyself.name>

gcc/ChangeLog:

	* config/riscv/riscv-feature-bits.h (RISCV_VENDOR_FEATURE_BITS_LENGTH): Drop.
	(struct riscv_vendor_feature_bits): Drop.

libgcc/ChangeLog:

	* config/riscv/feature_bits.c (RISCV_VENDOR_FEATURE_BITS_LENGTH): Drop.
	(__init_riscv_features_bits_linux): Drop.
---
 gcc/config/riscv/riscv-feature-bits.h |  7 -------
 libgcc/config/riscv/feature_bits.c    | 10 ----------
 2 files changed, 17 deletions(-)

Comments

Jeffrey Law Feb. 12, 2025, 1:41 a.m. UTC | #1 
On 2/11/25 12:35 AM, Yangyu Chen wrote:
> As discussed from RISC-V C-API PR #101 [1], As discussed in #96, current
> interface is insufficient to support some cases, like a vendor buying a
> CPU IP from the upstream vendor but using their own mvendorid and custom
> features from the upstream vendor. In this case, we might need to add
> these extensions for each downstream vendor many times. Thus, making
> __riscv_vendor_feature_bits guarded by mvendorid is not a good idea. So,
> drop __riscv_vendor_feature_bits for now, and we should have time to
> discuss a better solution.
> 
> [1] https://github.com/riscv-non-isa/riscv-c-api-doc/pull/101
> 
> Signed-off-by: Yangyu Chen <cyy@cyyself.name>
> 
> gcc/ChangeLog:
> 
> 	* config/riscv/riscv-feature-bits.h (RISCV_VENDOR_FEATURE_BITS_LENGTH): Drop.
> 	(struct riscv_vendor_feature_bits): Drop.
> 
> libgcc/ChangeLog:
> 
> 	* config/riscv/feature_bits.c (RISCV_VENDOR_FEATURE_BITS_LENGTH): Drop.
> 	(__init_riscv_features_bits_linux): Drop.
Thanks.  I've pushed this to the trunk.
jeff
diff mbox series

Patch

diff --git a/gcc/config/riscv/riscv-feature-bits.h b/gcc/config/riscv/riscv-feature-bits.h
index b571c44285f..7ef7a2aecb7 100644
--- a/gcc/config/riscv/riscv-feature-bits.h
+++ b/gcc/config/riscv/riscv-feature-bits.h
@@ -28,13 +28,6 @@  struct riscv_feature_bits {
   unsigned long long features[RISCV_FEATURE_BITS_LENGTH];
 };
 
-#define RISCV_VENDOR_FEATURE_BITS_LENGTH 1
-
-struct riscv_vendor_feature_bits {
-  unsigned length;
-  unsigned long long features[RISCV_VENDOR_FEATURE_BITS_LENGTH];
-};
-
 struct riscv_cpu_model {
   unsigned mvendorid;
   unsigned long long marchid;
diff --git a/libgcc/config/riscv/feature_bits.c b/libgcc/config/riscv/feature_bits.c
index b34d4eea1d1..157bcdcad69 100644
--- a/libgcc/config/riscv/feature_bits.c
+++ b/libgcc/config/riscv/feature_bits.c
@@ -30,13 +30,6 @@  struct {
   unsigned long long features[RISCV_FEATURE_BITS_LENGTH];
 } __riscv_feature_bits __attribute__ ((visibility ("hidden"), nocommon));
 
-#define RISCV_VENDOR_FEATURE_BITS_LENGTH 1
-
-struct {
-  unsigned length;
-  unsigned long long features[RISCV_VENDOR_FEATURE_BITS_LENGTH];
-} __riscv_vendor_feature_bits __attribute__ ((visibility ("hidden"), nocommon));
-
 struct {
   unsigned mvendorid;
   unsigned long long marchid;
@@ -382,8 +375,6 @@  static void __init_riscv_features_bits_linux ()
     __riscv_feature_bits.features[i] = features[i];
 
   __riscv_feature_bits.length = RISCV_FEATURE_BITS_LENGTH;
-
-  __riscv_vendor_feature_bits.length = 0;
 }
 #endif
 
@@ -402,7 +393,6 @@  __init_riscv_feature_bits ()
 #else
   /* Unsupported, just initialize that into all zeros.  */
   __riscv_feature_bits.length = 0;
-  __riscv_vendor_feature_bits.length = 0;
   __riscv_cpu_model.mvendorid = 0;
   __riscv_cpu_model.marchid = 0;
   __riscv_cpu_model.mimpid = 0;