aarch64: Remove redundant builtins code

Message ID mptlesy1qsx.fsf@arm.com
State Committed
Commit e80daf04c8888f527d2fc7f6cbcd1b4c853dcd04
Headers
Series aarch64: Remove redundant builtins code |

Commit Message

Richard Sandiford July 12, 2022, 12:03 p.m. UTC
  aarch64_builtin_vectorized_function handles some built-in functions
that already have equivalent internal functions.  This seems to be
redundant now, since the target builtins that it chooses are mapped
to the same optab patterns as the internal functions.

Tested on aarch64-linux-gnu & pushed.

Richard


gcc/
	* config/aarch64/aarch64-builtins.cc
	(aarch64_builtin_vectorized_function): Remove handling of
	floor, ceil, trunc, round, nearbyint, sqrt, clz and ctz.

gcc/testsuite/
	* gcc.target/aarch64/vect_unary_1.c: New test.
---
 gcc/config/aarch64/aarch64-builtins.cc        |  32 ---
 .../gcc.target/aarch64/vect_unary_1.c         | 186 ++++++++++++++++++
 2 files changed, 186 insertions(+), 32 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/aarch64/vect_unary_1.c
  

Patch

diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc
index e0a741ac663..a486321e10f 100644
--- a/gcc/config/aarch64/aarch64-builtins.cc
+++ b/gcc/config/aarch64/aarch64-builtins.cc
@@ -2581,38 +2581,6 @@  aarch64_builtin_vectorized_function (unsigned int fn, tree type_out,
   switch (fn)
     {
 #undef AARCH64_CHECK_BUILTIN_MODE
-#define AARCH64_CHECK_BUILTIN_MODE(C, N) \
-  (out_mode == V##C##N##Fmode && in_mode == V##C##N##Fmode)
-    CASE_CFN_FLOOR:
-      return AARCH64_FIND_FRINT_VARIANT (floor);
-    CASE_CFN_CEIL:
-      return AARCH64_FIND_FRINT_VARIANT (ceil);
-    CASE_CFN_TRUNC:
-      return AARCH64_FIND_FRINT_VARIANT (btrunc);
-    CASE_CFN_ROUND:
-      return AARCH64_FIND_FRINT_VARIANT (round);
-    CASE_CFN_NEARBYINT:
-      return AARCH64_FIND_FRINT_VARIANT (nearbyint);
-    CASE_CFN_SQRT:
-      return AARCH64_FIND_FRINT_VARIANT (sqrt);
-#undef AARCH64_CHECK_BUILTIN_MODE
-#define AARCH64_CHECK_BUILTIN_MODE(C, N) \
-  (out_mode == V##C##SImode && in_mode == V##C##N##Imode)
-    CASE_CFN_CLZ:
-      {
-	if (AARCH64_CHECK_BUILTIN_MODE (4, S))
-	  return aarch64_builtin_decls[AARCH64_SIMD_BUILTIN_UNOP_clzv4si];
-	return NULL_TREE;
-      }
-    CASE_CFN_CTZ:
-      {
-	if (AARCH64_CHECK_BUILTIN_MODE (2, S))
-	  return aarch64_builtin_decls[AARCH64_SIMD_BUILTIN_UNOP_ctzv2si];
-	else if (AARCH64_CHECK_BUILTIN_MODE (4, S))
-	  return aarch64_builtin_decls[AARCH64_SIMD_BUILTIN_UNOP_ctzv4si];
-	return NULL_TREE;
-      }
-#undef AARCH64_CHECK_BUILTIN_MODE
 #define AARCH64_CHECK_BUILTIN_MODE(C, N) \
   (out_mode == V##C##N##Imode && in_mode == V##C##N##Fmode)
     CASE_CFN_IFLOOR:
diff --git a/gcc/testsuite/gcc.target/aarch64/vect_unary_1.c b/gcc/testsuite/gcc.target/aarch64/vect_unary_1.c
new file mode 100644
index 00000000000..8516808becf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/vect_unary_1.c
@@ -0,0 +1,186 @@ 
+/* { dg-options "-O3 --save-temps" } */
+/* { dg-final { check-function-bodies "**" "" "" } } */
+
+#include <stdint.h>
+
+#define TEST2(OUT, NAME, IN)						\
+OUT __attribute__((vector_size(sizeof(OUT) * 2)))			\
+test2_##OUT##_##NAME##_##IN (float dummy,				\
+			     IN __attribute__((vector_size(sizeof(IN) * 2))) y) \
+{									\
+  OUT __attribute__((vector_size(sizeof(OUT) * 2))) x;			\
+  x[0] = __builtin_##NAME (y[0]);					\
+  x[1] = __builtin_##NAME (y[1]);					\
+  return x;								\
+}									\
+
+#define TEST4(OUT, NAME, IN)						\
+OUT __attribute__((vector_size(16)))					\
+test4_##OUT##_##NAME##_##IN (float dummy,				\
+			     IN __attribute__((vector_size(16))) y)	\
+{									\
+  OUT __attribute__((vector_size(16))) x;				\
+  x[0] = __builtin_##NAME (y[0]);					\
+  x[1] = __builtin_##NAME (y[1]);					\
+  x[2] = __builtin_##NAME (y[2]);					\
+  x[3] = __builtin_##NAME (y[3]);					\
+  return x;								\
+}									\
+
+/*
+** test2_float_truncf_float:
+**	frintz	v0.2s, v1.2s
+**	ret
+*/
+TEST2 (float, truncf, float)
+
+/*
+** test2_double_trunc_double:
+**	frintz	v0.2d, v1.2d
+**	ret
+*/
+TEST2 (double, trunc, double)
+
+/*
+** test4_float_truncf_float:
+**	frintz	v0.4s, v1.4s
+**	ret
+*/
+TEST4 (float, truncf, float)
+
+/*
+** test2_float_roundf_float:
+**	frinta	v0.2s, v1.2s
+**	ret
+*/
+TEST2 (float, roundf, float)
+
+/*
+** test2_double_round_double:
+**	frinta	v0.2d, v1.2d
+**	ret
+*/
+TEST2 (double, round, double)
+
+/*
+** test4_float_roundf_float:
+**	frinta	v0.4s, v1.4s
+**	ret
+*/
+TEST4 (float, roundf, float)
+
+/*
+** test2_float_nearbyintf_float:
+**	frinti	v0.2s, v1.2s
+**	ret
+*/
+TEST2 (float, nearbyintf, float)
+
+/*
+** test2_double_nearbyint_double:
+**	frinti	v0.2d, v1.2d
+**	ret
+*/
+TEST2 (double, nearbyint, double)
+
+/*
+** test4_float_nearbyintf_float:
+**	frinti	v0.4s, v1.4s
+**	ret
+*/
+TEST4 (float, nearbyintf, float)
+
+/*
+** test2_float_floorf_float:
+**	frintm	v0.2s, v1.2s
+**	ret
+*/
+TEST2 (float, floorf, float)
+
+/*
+** test2_double_floor_double:
+**	frintm	v0.2d, v1.2d
+**	ret
+*/
+TEST2 (double, floor, double)
+
+/*
+** test4_float_floorf_float:
+**	frintm	v0.4s, v1.4s
+**	ret
+*/
+TEST4 (float, floorf, float)
+
+/*
+** test2_float_ceilf_float:
+**	frintp	v0.2s, v1.2s
+**	ret
+*/
+TEST2 (float, ceilf, float)
+
+/*
+** test2_double_ceil_double:
+**	frintp	v0.2d, v1.2d
+**	ret
+*/
+TEST2 (double, ceil, double)
+
+/*
+** test4_float_ceilf_float:
+**	frintp	v0.4s, v1.4s
+**	ret
+*/
+TEST4 (float, ceilf, float)
+
+/*
+** test2_float_rintf_float:
+**	frintx	v0.2s, v1.2s
+**	ret
+*/
+TEST2 (float, rintf, float)
+
+/*
+** test2_double_rint_double:
+**	frintx	v0.2d, v1.2d
+**	ret
+*/
+TEST2 (double, rint, double)
+
+/*
+** test4_float_rintf_float:
+**	frintx	v0.4s, v1.4s
+**	ret
+*/
+TEST4 (float, rintf, float)
+
+/*
+** test2_int_clz_int:
+**	clz	v0.2s, v1.2s
+**	ret
+*/
+TEST2 (int, clz, int)
+
+/*
+** test4_int_clz_int:
+**	clz	v0.4s, v1.4s
+**	ret
+*/
+TEST4 (int, clz, int)
+
+/*
+** test2_int_ctz_int:
+**	rev32	(v[0-9]+).8b, v1.8b
+**	rbit	(v[0-9]+).8b, \1.8b
+**	clz	v0.2s, \2.2s
+**	ret
+*/
+TEST2 (int, ctz, int)
+
+/*
+** test4_int_ctz_int:
+**	rev32	(v[0-9]+).16b, v1.16b
+**	rbit	(v[0-9]+).16b, \1.16b
+**	clz	v0.4s, \2.4s
+**	ret
+*/
+TEST4 (int, ctz, int)