diff mbox series

[pushed,2/8] aarch64: Generalise vec_set predicate

Message ID mptbkzg6kle.fsf@arm.com
State Committed
Commit fabc5d9bceb0aec8db2147eb50ae375c711eea90
Headers
Series aarch64: Fix regression in vec_init code quality |

Commit Message

Richard Sandiford Feb. 9, 2022, 5 p.m. UTC 
  The aarch64_simd_vec_set<mode> define_insn takes memory operands,
so this patch makes the vec_set<mode> optab expander do the same.

gcc/
	* config/aarch64/aarch64-simd.md (vec_set<mode>): Allow the
	element to be an aarch64_simd_nonimmediate_operand.
---
 gcc/config/aarch64/aarch64-simd.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md
index 9529bdb4997..872a3d78269 100644
--- a/gcc/config/aarch64/aarch64-simd.md
+++ b/gcc/config/aarch64/aarch64-simd.md
@@ -1378,7 +1378,7 @@  (define_insn "vec_shr_<mode>"
 
 (define_expand "vec_set<mode>"
   [(match_operand:VALL_F16 0 "register_operand")
-   (match_operand:<VEL> 1 "register_operand")
+   (match_operand:<VEL> 1 "aarch64_simd_nonimmediate_operand")
    (match_operand:SI 2 "immediate_operand")]
   "TARGET_SIMD"
   {