From patchwork Wed Nov 9 11:17:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrea Corallo X-Patchwork-Id: 60263 X-Patchwork-Delegate: rearnsha@gcc.gnu.org Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 72D63396E432 for ; Wed, 9 Nov 2022 11:18:07 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 72D63396E432 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1667992687; bh=uijU+ySHvoqxMz2Th709+9bIysk7lgAWzfAio7oZmJA=; h=To:CC:Subject:In-Reply-To:References:Date:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=ZMsteVU166/K9EW4cH/yeT9h9HB7ddyc8+GModjIviAeUfCCY1+g8sfGEx/k3WFf/ 6XLSYuOeFY5iRcStF3blj9m+18l/rzDqipIay5qirUJ3Jwjlv4WrNuFqs7emFuKWqB OKMjaTeol//YzUCndEj8POEbAASG2c6fSQxOiTlY= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from EUR05-DB8-obe.outbound.protection.outlook.com (mail-db8eur05on2072.outbound.protection.outlook.com [40.107.20.72]) by sourceware.org (Postfix) with ESMTPS id 310DF396E418 for ; Wed, 9 Nov 2022 11:17:36 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 310DF396E418 ARC-Seal: i=2; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=pass; b=Bu1DK9h6IIY0asF+IWxsvj8RerxTBkN/fu9+MkYCPhqkwhu65qSI6ENVHxpg+DgPu11xuiJWS6ff4eeQAcfOVdjcZd4UWLwjNUhOlT9Nm/sA4PA5nvikWDIsqJE3vf7tWknHJl61NpxXZDUhDQn4OHyD05Lwjf713Pj/2KuIaGzqGcGBGIUkRO99hGEJu5zqNVDM+iktWKTB9LJ/m1ajHkMbPpGgf5ge8gxLJswWkgzKJ8TESoDw34f7K+efSyIoNeQQb1BG4N4w6ZgTci4cCIRgUEGQPu7KfcKG7+BQ5LvYPr+2VA5Z/eUZ91v81l9fenYpj9pventMXbVxx/l+Wg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=uijU+ySHvoqxMz2Th709+9bIysk7lgAWzfAio7oZmJA=; b=kg1ihlW4fPh8FrAdqE+A9t+hENY6A4b/iZgVeRdIKw/AEWzrbUqF80vqLMOhzOKOxMy3LU9cQm30mR/tokfvPts0ROy2mSJ8yhZwYhlFTskIk1mfMM6hfXZ5RhGB1MsxJ4GfLeh6pjg7nF2kbpDI9zQzWDCv6osfnjdqmMFkhHFWHlqKH+6kW1ikfEdYWElVlB9BoLeCgQRcpSkZVNRh7xLgOd7taW8mW9uJsZ3lQqAuU26VkhvxHUr5RWgl2M/JvfzLbVQkPhMv3TMYk2pwlOqqc7wbBSvwBywySZIJTrOTVvxLeNNdPfHNEJ8QJdQlNZGukEL+W4jzlOHYj+VmcQ== ARC-Authentication-Results: i=2; mx.microsoft.com 1; spf=pass (sender ip is 63.35.35.123) smtp.rcpttodomain=gcc.gnu.org smtp.mailfrom=arm.com; dmarc=pass (p=none sp=none pct=100) action=none header.from=arm.com; dkim=pass (signature was verified) header.d=armh.onmicrosoft.com; arc=pass (0 oda=1 ltdi=1 spf=[1,1,smtp.mailfrom=arm.com] dmarc=[1,1,header.from=arm.com]) Received: from DU2PR04CA0027.eurprd04.prod.outlook.com (2603:10a6:10:3b::32) by DB4PR08MB9358.eurprd08.prod.outlook.com (2603:10a6:10:3f2::5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5813.11; Wed, 9 Nov 2022 11:17:33 +0000 Received: from DBAEUR03FT062.eop-EUR03.prod.protection.outlook.com (2603:10a6:10:3b:cafe::f) by DU2PR04CA0027.outlook.office365.com (2603:10a6:10:3b::32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5791.22 via Frontend Transport; Wed, 9 Nov 2022 11:17:33 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 63.35.35.123) smtp.mailfrom=arm.com; dkim=pass (signature was verified) header.d=armh.onmicrosoft.com;dmarc=pass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 63.35.35.123 as permitted sender) receiver=protection.outlook.com; client-ip=63.35.35.123; helo=64aa7808-outbound-1.mta.getcheckrecipient.com; pr=C Received: from 64aa7808-outbound-1.mta.getcheckrecipient.com (63.35.35.123) by DBAEUR03FT062.mail.protection.outlook.com (100.127.142.64) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5813.12 via Frontend Transport; Wed, 9 Nov 2022 11:17:33 +0000 Received: ("Tessian outbound 2ff13c8f2c05:v130"); Wed, 09 Nov 2022 11:17:33 +0000 X-CheckRecipientChecked: true X-CR-MTA-CID: b32aca4cf34bb42b X-CR-MTA-TID: 64aa7808 Received: from f4a1b3c9f548.1 by 64aa7808-outbound-1.mta.getcheckrecipient.com id 73018950-D6E3-46C5-A69D-AC342525876D.1; Wed, 09 Nov 2022 11:17:24 +0000 Received: from EUR03-DBA-obe.outbound.protection.outlook.com by 64aa7808-outbound-1.mta.getcheckrecipient.com with ESMTPS id f4a1b3c9f548.1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384); Wed, 09 Nov 2022 11:17:24 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=DHiUaSpdEx5tLgmmfCXe5Dr0s4mpVEIDI4/vqGoMrmwwrw+AnVq4zeHye47UAw3svDJJtRCVuUxKkmAgxTr/Mop5uyK3y2VWPTRXCJTYC9/VIT0aDxcLMOq/ABeFgvK/90qFmMCtMmNqLK3OaAXlkMksCSFfFbiFDhCb080uz+f0PJ0MBrJeptYUafQbNo9/1oR8H/fD9Ykcu5F7dMXevgowHEL/JjpyJ6/ltKLXFxJyRtT/q6F+dvT5IxOAOAK3DTFdYtAIrLnyx28HdyULjvlDyzHzj9qhQ4+OOaghuJXZFRTWm1V4rLgYPRrCUYae24AQe2c5okFMMt+PcoOJzg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=uijU+ySHvoqxMz2Th709+9bIysk7lgAWzfAio7oZmJA=; b=eeeUXuow8T7NZoZnhh34mxTnEv+qKXaXFZXZVywSfqE34Z/X7m85qizM084cqOEdFaUVpcdxfq7LfRQgXhYI7JF3+zpNlcNDfBPpD8oU1GTO4DLDFSGhgbJ2CjcFS/pqVutgoqAI93Lrz/zHwcqOuEPJsAkvSNVWPOHmQEpKNjlgBb6ibMeqTI1RuAuqWnkcsQ1RNFSG/IyMc6sMZzukZY9Y/flGYRaReC456xNRBmZjIzp39HFiSg2NXZqHRaZE669mWZ25iv4UuteY67dYWSedBg3tjBA5wqI9emdvl9gM7RMyNIG3g7jarg3cDuP8w1G+yDfmbBB3U4nUFB6hBg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 40.67.248.234) smtp.rcpttodomain=gcc.gnu.org smtp.mailfrom=arm.com; dmarc=pass (p=none sp=none pct=100) action=none header.from=arm.com; dkim=none (message not signed); arc=none Received: from AM6P195CA0064.EURP195.PROD.OUTLOOK.COM (2603:10a6:209:87::41) by DB9PR08MB8698.eurprd08.prod.outlook.com (2603:10a6:10:3d2::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5813.11; Wed, 9 Nov 2022 11:17:23 +0000 Received: from AM7EUR03FT054.eop-EUR03.prod.protection.outlook.com (2603:10a6:209:87:cafe::3) by AM6P195CA0064.outlook.office365.com (2603:10a6:209:87::41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5791.27 via Frontend Transport; Wed, 9 Nov 2022 11:17:23 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 40.67.248.234) smtp.mailfrom=arm.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 40.67.248.234 as permitted sender) receiver=protection.outlook.com; client-ip=40.67.248.234; helo=nebula.arm.com; pr=C Received: from nebula.arm.com (40.67.248.234) by AM7EUR03FT054.mail.protection.outlook.com (100.127.140.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.5813.12 via Frontend Transport; Wed, 9 Nov 2022 11:17:23 +0000 Received: from AZ-NEU-EX02.Emea.Arm.com (10.251.26.5) by AZ-NEU-EX04.Arm.com (10.251.24.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Wed, 9 Nov 2022 11:17:23 +0000 Received: from AZ-NEU-EX04.Arm.com (10.251.24.32) by AZ-NEU-EX02.Emea.Arm.com (10.251.26.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Wed, 9 Nov 2022 11:17:22 +0000 Received: from e124257 (10.34.105.24) by mail.arm.com (10.251.24.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12 via Frontend Transport; Wed, 9 Nov 2022 11:17:22 +0000 To: Richard Earnshaw CC: Andrea Corallo via Gcc-patches , "Richard Earnshaw" , nd , Srinath Parvathaneni Subject: [PATCH 6/12 V2] arm: Add pointer authentication for stack-unwinding runtime In-Reply-To: <9beb66cc-7a8d-9f13-0489-c19177853713@foss.arm.com> (Richard Earnshaw's message of "Fri, 1 Jul 2022 15:41:08 +0100") References: <9beb66cc-7a8d-9f13-0489-c19177853713@foss.arm.com> Date: Wed, 9 Nov 2022 12:17:21 +0100 Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) MIME-Version: 1.0 X-EOPAttributedMessage: 1 X-MS-TrafficTypeDiagnostic: AM7EUR03FT054:EE_|DB9PR08MB8698:EE_|DBAEUR03FT062:EE_|DB4PR08MB9358:EE_ X-MS-Office365-Filtering-Correlation-Id: 11f6d601-98f0-40fc-0c20-08dac243ffee x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: vEkSZ1EIvfD81gKj/Vs6815MfD17v4+QVSm2eaG2mKsQbNUZIsJ3iW//VKNxwcLszY7EAES6qYjhd87hIpX4zId0AU1KcSoJZTBbUn30UZ5iPWZ/shxGgVJ1WLSCmw0tYXUVLTLtpAvOu4D8ulnvndVVKq2VZQd2IV5UK54UbGISc7HT+pEP51NQ8UyNkf4Fk4wb+4fT0bJrARHZDAyuviwK+ptHyRlb4M7Dd/YG7OHnGO4eG78gPJKpYaXJtt8JmmtQEky3wLAenOsEvdbJQ9iZhdyvrNzN4b97ycereKWCazlcDiO8IRgB5elNJ2eA7IGQwFzgig7CFHk55Ec8lY6qouJn4mBPAQBye8clTCc2cnlbh0IgF6hdVj30KOYaTk8EnX8Q9WNTdWDFNA6zkrGp9QmFoD+8QQonlge2hhpUdonwJikbWo0fHikJKOa8CBQ8f92Fa3OacJ7V8ss6xcK4eDvez29CYfWtHyU2YXNKzfMMJX1XAM6YThYkh0xGk2XPW+mGXV0BttKa2jw508KHElrelGMXg7wV011PVPtu8isDYWERFU2+/Z4zNa0+XA8IzZizED+wj+Zkt0rb/CCPi+5Rwlv9C+fOmpRnH12oAjPAmFIOyMOAukOXS/hcH0U0CWa4JxsBEuLMOYx2EkjXmraY98TT+A9mxOs0FkyVn293PZRE/YBefIE3CyOO5c2ZV/yshu0A2mI0b3AvfEWStb/khkRZU5Oescr4lmoa9Q56fVhp58UH/c2krU8LO3bq9Tk//6x31ML6J8+Jz5tEHQ8tSRmfCtRw8xYlIJ30H3Op/jXfkcVLGEv3ljfr X-Forefront-Antispam-Report-Untrusted: CIP:40.67.248.234; CTRY:IE; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:nebula.arm.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230022)(4636009)(39860400002)(136003)(396003)(376002)(346002)(451199015)(46966006)(36840700001)(40470700004)(36756003)(81166007)(564344004)(86362001)(36860700001)(44832011)(5660300002)(235185007)(2906002)(2616005)(47076005)(33964004)(26005)(426003)(82740400003)(186003)(336012)(70586007)(8676002)(70206006)(6862004)(356005)(4326008)(40460700003)(41300700001)(316002)(8936002)(54906003)(40480700001)(478600001)(82310400005)(36900700001); DIR:OUT; SFP:1101; X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR08MB8698 X-MS-Exchange-Transport-CrossTenantHeadersStripped: DBAEUR03FT062.eop-EUR03.prod.protection.outlook.com X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id-Prvs: ec955aa3-0e82-4578-d58a-08dac243f9b3 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: tWSzcX4mTbaD7Dq1UmLH8rE43MpRi+x3Wlr4LSgGupV4iLgT/hMptQB/TyMVo+xpO2EPB+EAX5WaUUlOaKPNQEgIPkuYHDk2Vk95KLYv9CrYvS8JgvJhuah+5uFlapWPg7l5riE1ACm+S6m749EONS+eJYtwMMWvIMB9OZI8QBaYFITKMlEpiszNkAm3yvoSPVr7VcaktL/q9TophsaWa3NUCGdN+hq0LtLiA7ZshIlXyyL2CK3EsmCV/vIE+47pnTF5rZartIo8KZepiC0Do9IplKMActaAAoHkrcfutnpy8PeSviGUs0AHczHR4WP26cPemNfk9KKR/WjmNaeODCIpX5yZjRweKgGeWHy/q0VZOiQD5P6I3Mlszmri9hCf0Trsf2ojfjEZEgTYB5FE3Yx+ugXH1z/JMLzBG8zef7rAM+lMP3VfdfFb58S4aZCb9bKzkewiyjIvT41mPr3S+Nm5jHclMWv8v70oZHM+buVjI4ZoWzgnXHKF5c470IynPKmsJd/d3ioGBjvlCeeeXHfPAd68Se0c3sp97mByMACa4WMuzBfb2Br4b84Rv3oGkeIO6f0JOld0s/RqZv4+n+F0oKJX57K2cg1ZPTw/jKSr1Ep4dCTF6WehH1yjUUGomXVStU9bS4PiQ7/cuz6lYw3tKhtrM4zAqWKOgPPSNdPzHzUq+Xx/VE4/HgMJxti5OiMfFLFTHAJMjIn9JFU0ABbehrcsLOS3ezD9HqjUXo1aPrXyZphSiQBCLxOF9zC1aEmw9Kt/8LjyDqaXCXrP0g== X-Forefront-Antispam-Report: CIP:63.35.35.123; CTRY:IE; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:64aa7808-outbound-1.mta.getcheckrecipient.com; PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com; CAT:NONE; SFS:(13230022)(4636009)(39860400002)(376002)(346002)(396003)(136003)(451199015)(36840700001)(40470700004)(46966006)(2906002)(336012)(186003)(426003)(478600001)(47076005)(36756003)(2616005)(33964004)(26005)(82740400003)(40460700003)(316002)(54906003)(564344004)(40480700001)(81166007)(70206006)(36860700001)(70586007)(82310400005)(86362001)(8676002)(4326008)(41300700001)(8936002)(6862004)(44832011)(5660300002)(235185007); DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Nov 2022 11:17:33.8578 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 11f6d601-98f0-40fc-0c20-08dac243ffee X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DBAEUR03FT062.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB4PR08MB9358 X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, FORGED_SPF_HELO, GIT_PATCH_0, KAM_DMARC_NONE, KAM_SHORT, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_NONE, TXREP, UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Andrea Corallo via Gcc-patches From: Andrea Corallo Reply-To: Andrea Corallo Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" Hi all, please find attached the latest version of this patch now updating the stack pointer value after the pop used to read the PAC value. Best Regards Andrea From a78acf8804daa3d493b419b4998f4ac705869ff9 Mon Sep 17 00:00:00 2001 From: Andrea Corallo Date: Mon, 6 Dec 2021 11:42:11 +0100 Subject: [PATCH] [PATCH 6/15] arm: Add pointer authentication for stack-unwinding runtime This patch adds authentication for when the stack is unwound when an exception is taken. All the changes here are done to the runtime code in libgcc's unwinder code for Arm target. All the changes are guarded under defined (__ARM_FEATURE_PAC_DEFAULT) and activated only if the +pacbti feature is switched on for the architecture. This means that switching on the target feature via -march or -mcpu is sufficient and -mbranch-protection need not be enabled. This ensures that the unwinder is authenticated only if the PACBTI instructions are available in the non-NOP space as it uses AUTG. Just generating PAC/AUT instructions using -mbranch-protection will not enable authentication on the unwinder. Pre-approved with the requested changes here . gcc/ChangeLog: * ginclude/unwind-arm-common.h (_Unwind_VRS_RegClass): Introduce new pseudo register class _UVRSC_PAC. * libgcc/config/arm/pr-support.c (__gnu_unwind_execute): Decode exception opcode (0xb4) for saving RA_AUTH_CODE and authenticate with AUTG if found. * libgcc/config/arm/unwind-arm.c (struct pseudo_regs): New. (phase1_vrs): Introduce new field to store pseudo-reg state. (phase2_vrs): Likewise. (_Unwind_VRS_Get): Load pseudo register state from virtual reg set. (_Unwind_VRS_Set): Store pseudo register state to virtual reg set. (_Unwind_VRS_Pop): Load pseudo register value from stack into VRS. Co-Authored-By: Tejas Belagod Co-Authored-By: Srinath Parvathaneni --- gcc/ginclude/unwind-arm-common.h | 3 ++- libgcc/config/arm/pr-support.c | 32 ++++++++++++++++++++++++++++++++ libgcc/config/arm/unwind-arm.c | 28 ++++++++++++++++++++++++++++ 3 files changed, 62 insertions(+), 1 deletion(-) diff --git a/gcc/ginclude/unwind-arm-common.h b/gcc/ginclude/unwind-arm-common.h index d3831f6c60a..f26702e8c6c 100644 --- a/gcc/ginclude/unwind-arm-common.h +++ b/gcc/ginclude/unwind-arm-common.h @@ -127,7 +127,8 @@ extern "C" { _UVRSC_VFP = 1, /* vfp */ _UVRSC_FPA = 2, /* fpa */ _UVRSC_WMMXD = 3, /* Intel WMMX data register */ - _UVRSC_WMMXC = 4 /* Intel WMMX control register */ + _UVRSC_WMMXC = 4, /* Intel WMMX control register */ + _UVRSC_PAC = 5 /* Armv8.1-M Mainline PAC/AUTH pseudo-register */ } _Unwind_VRS_RegClass; diff --git a/libgcc/config/arm/pr-support.c b/libgcc/config/arm/pr-support.c index 2de96c2a447..e48854587c6 100644 --- a/libgcc/config/arm/pr-support.c +++ b/libgcc/config/arm/pr-support.c @@ -106,6 +106,7 @@ __gnu_unwind_execute (_Unwind_Context * context, __gnu_unwind_state * uws) { _uw op; int set_pc; + int set_pac = 0; _uw reg; set_pc = 0; @@ -114,6 +115,27 @@ __gnu_unwind_execute (_Unwind_Context * context, __gnu_unwind_state * uws) op = next_unwind_byte (uws); if (op == CODE_FINISH) { + /* When we reach end, we have to authenticate R12 we just popped + earlier. + + Note: while the check provides additional security against a + corrupted unwind chain, it isn't essential for correct unwinding + of an uncorrupted chain. */ +#if defined(TARGET_HAVE_PACBTI) + if (set_pac) + { + _uw sp; + _uw lr; + _uw pac; + _Unwind_VRS_Get (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32, &sp); + _Unwind_VRS_Get (context, _UVRSC_CORE, R_LR, _UVRSD_UINT32, &lr); + _Unwind_VRS_Get (context, _UVRSC_PAC, R_IP, + _UVRSD_UINT32, &pac); + __asm__ __volatile__ + ("autg %0, %1, %2" : : "r"(pac), "r"(lr), "r"(sp) :); + } +#endif + /* If we haven't already set pc then copy it from lr. */ if (!set_pc) { @@ -227,6 +249,16 @@ __gnu_unwind_execute (_Unwind_Context * context, __gnu_unwind_state * uws) return _URC_FAILURE; continue; } + /* Pop PAC off the stack into VRS pseudo.pac. */ + if (op == 0xb4) + { + if (_Unwind_VRS_Pop (context, _UVRSC_PAC, 0, _UVRSD_UINT32) + != _UVRSR_OK) + return _URC_FAILURE; + set_pac = 1; + continue; + } + if ((op & 0xfc) == 0xb4) /* Obsolete FPA. */ return _URC_FAILURE; diff --git a/libgcc/config/arm/unwind-arm.c b/libgcc/config/arm/unwind-arm.c index 386406564af..9acb3de6bc3 100644 --- a/libgcc/config/arm/unwind-arm.c +++ b/libgcc/config/arm/unwind-arm.c @@ -64,6 +64,12 @@ struct wmmxc_regs _uw wc[4]; }; +/* Holds value of pseudo registers eg. PAC. */ +struct pseudo_regs +{ + _uw pac; +}; + /* The ABI specifies that the unwind routines may only use core registers, except when actually manipulating coprocessor state. This allows us to write one implementation that works on all platforms by @@ -78,6 +84,9 @@ typedef struct /* The first fields must be the same as a phase2_vrs. */ _uw demand_save_flags; struct core_regs core; + /* Armv8.1-M Mainline PAC/AUTH values. This field should be in the same field + order as phase2_vrs. */ + struct pseudo_regs pseudo; _uw prev_sp; /* Only valid during forced unwinding. */ struct vfp_regs vfp; struct vfpv3_regs vfp_regs_16_to_31; @@ -99,6 +108,7 @@ typedef struct { _uw demand_save_flags; struct core_regs core; + struct pseudo_regs pac; } phase2_vrs; /* Coprocessor register state manipulation functions. */ @@ -175,6 +185,10 @@ _Unwind_VRS_Result _Unwind_VRS_Get (_Unwind_Context *context, case _UVRSC_WMMXC: return _UVRSR_NOT_IMPLEMENTED; + case _UVRSC_PAC: + *(_uw *) valuep = vrs->pseudo.pac; + return _UVRSR_OK; + default: return _UVRSR_FAILED; } @@ -206,6 +220,10 @@ _Unwind_VRS_Result _Unwind_VRS_Set (_Unwind_Context *context, case _UVRSC_WMMXC: return _UVRSR_NOT_IMPLEMENTED; + case _UVRSC_PAC: + vrs->pseudo.pac = *(_uw *) valuep; + return _UVRSR_OK; + default: return _UVRSR_FAILED; } @@ -246,6 +264,16 @@ _Unwind_VRS_Result _Unwind_VRS_Pop (_Unwind_Context *context, } return _UVRSR_OK; + case _UVRSC_PAC: + { + _uw *ptr = (_uw *) vrs->core.r[R_SP]; + if (discriminator != 0) + return _UVRSR_FAILED; + vrs->pseudo.pac = *(ptr++); + vrs->core.r[R_SP] = (_uw) ptr; + return _UVRSR_OK; + } + case _UVRSC_VFP: { _uw start = discriminator >> 16;