From patchwork Tue Nov 30 08:46:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: HAO CHEN GUI X-Patchwork-Id: 48271 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id AA8003858421 for ; Tue, 30 Nov 2021 08:47:21 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org AA8003858421 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1638262041; bh=myS1zmZJk/19UAUo2jlz0395PsyzlH/sIerrCp4h2iY=; h=Date:To:Subject:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=gmnK8UvAstvNC8WKc/QjsT/1G9jvLvrfL0hov73dhthZu8ympG69vG0H6a7JYXOd1 Gh8s8AnPLjvFEyFRhDNpfWBepuxEkRhxMXimmk+pehiI111cDeN8cH2BegzdDP16tX G0i2p1b45msa4Flp1I6HLYvS++zGqpyFIUdk3FYQ= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by sourceware.org (Postfix) with ESMTPS id 0723E3857829 for ; Tue, 30 Nov 2021 08:46:46 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 0723E3857829 Received: from pps.filterd (m0098417.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 1AU8dQSU013999; Tue, 30 Nov 2021 08:46:44 GMT Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com with ESMTP id 3cngargj54-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 30 Nov 2021 08:46:44 +0000 Received: from m0098417.ppops.net (m0098417.ppops.net [127.0.0.1]) by pps.reinject (8.16.0.43/8.16.0.43) with SMTP id 1AU8ZcH6029401; Tue, 30 Nov 2021 08:46:44 GMT Received: from ppma04ams.nl.ibm.com (63.31.33a9.ip4.static.sl-reverse.com [169.51.49.99]) by mx0a-001b2d01.pphosted.com with ESMTP id 3cngargj4s-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 30 Nov 2021 08:46:43 +0000 Received: from pps.filterd (ppma04ams.nl.ibm.com [127.0.0.1]) by ppma04ams.nl.ibm.com (8.16.1.2/8.16.1.2) with SMTP id 1AU8h2U8009809; Tue, 30 Nov 2021 08:46:42 GMT Received: from b06cxnps3074.portsmouth.uk.ibm.com (d06relay09.portsmouth.uk.ibm.com [9.149.109.194]) by ppma04ams.nl.ibm.com with ESMTP id 3ckcaccbgn-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 30 Nov 2021 08:46:41 +0000 Received: from d06av21.portsmouth.uk.ibm.com (d06av21.portsmouth.uk.ibm.com [9.149.105.232]) by b06cxnps3074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 1AU8kdEa33292570 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 30 Nov 2021 08:46:39 GMT Received: from d06av21.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 4DDD352059; Tue, 30 Nov 2021 08:46:39 +0000 (GMT) Received: from [9.197.238.113] (unknown [9.197.238.113]) by d06av21.portsmouth.uk.ibm.com (Postfix) with ESMTP id BDFC352054; Tue, 30 Nov 2021 08:46:37 +0000 (GMT) Message-ID: Date: Tue, 30 Nov 2021 16:46:34 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.3.1 Content-Language: en-US To: gcc-patches Subject: [PATCH] Modify combine pattern by anding a pseudo with its nonzero bits X-TM-AS-GCONF: 00 X-Proofpoint-GUID: hWadOy2PqsvHo3L3QOfFyDaJepar6n3j X-Proofpoint-ORIG-GUID: RhLHKyYV5whJHKRgBkO_2INIwFnnk21- X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475 definitions=2021-11-30_06,2021-11-28_01,2020-04-07_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 priorityscore=1501 impostorscore=0 malwarescore=0 mlxlogscore=999 adultscore=0 spamscore=0 phishscore=0 clxscore=1015 bulkscore=0 lowpriorityscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2110150000 definitions=main-2111300048 X-Spam-Status: No, score=-11.1 required=5.0 tests=BAYES_00, BODY_8BITS, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: HAO CHEN GUI via Gcc-patches From: HAO CHEN GUI Reply-To: HAO CHEN GUI Cc: Bill Schmidt , David , Segher Boessenkool Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" Hi,     This patch modifies the combine pattern with a helper - change_pseudo_and_mask when recog fails. The helper converts a single pseudo to the pseudo and with a mask if the outer operator is IOR/XOR/PLUS and the inner operator is ASHIFT/LSHIFTRT/AND. The conversion helps match shift + ior pattern.     Bootstrapped and tested on powerpc64-linux BE and LE with no regressions. Is this okay for trunk? Any recommendations? Thanks a lot. ChangeLog 2021-11-30 Haochen Gui gcc/         * combine.c (change_pseudo_and_mask): New.         (recog_for_combine): If recog fails, try again with the pattern         modified by change_pseudo_and_mask. gcc/testsuite/         * gcc.target/powerpc/20050603-3.c: Modify the dump check conditions.         * gcc.target/powerpc/rlwimi-2.c: Likewise. patch.diff diff --git a/gcc/combine.c b/gcc/combine.c index 03e9a780919..c83c0aceb57 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -11539,6 +11539,42 @@ change_zero_ext (rtx pat)    return changed;  } +/* When the outer code of set_src is IOR/XOR/PLUS and the inner code is +   ASHIFT/LSHIFTRT/AND, convert a psuedo to psuedo AND with a mask if its +   nonzero_bits is less than its mode mask.  */ +static bool +change_pseudo_and_mask (rtx pat) +{ +  bool changed = false; + +  rtx src = SET_SRC (pat); +  if ((GET_CODE (src) == IOR +       || GET_CODE (src) == XOR +       || GET_CODE (src) == PLUS) +      && (((GET_CODE (XEXP (src, 0)) == ASHIFT +           || GET_CODE (XEXP (src, 0)) == LSHIFTRT +           || GET_CODE (XEXP (src, 0)) == AND) +          && REG_P (XEXP (src, 1))) +         || ((GET_CODE (XEXP (src, 1)) == ASHIFT +              || GET_CODE (XEXP (src, 1)) == LSHIFTRT +              || GET_CODE (XEXP (src, 1)) == AND) +             && REG_P (XEXP (src, 0))))) +    { +      rtx *reg = REG_P (XEXP (src, 0)) +                ? &XEXP (SET_SRC (pat), 0) +                : &XEXP (SET_SRC (pat), 1); +      machine_mode mode = GET_MODE (*reg); +      unsigned HOST_WIDE_INT nonzero = nonzero_bits (*reg, mode); +      if (nonzero < GET_MODE_MASK (mode)) +       { +         rtx x = gen_rtx_AND (mode, *reg, GEN_INT (nonzero)); +         SUBST (*reg, x); +         changed = true; +       } +     } +  return changed; +} +  /* Like recog, but we receive the address of a pointer to a new pattern.     We try to match the rtx that the pointer points to.     If that fails, we may try to modify or replace the pattern, @@ -11586,7 +11622,14 @@ recog_for_combine (rtx *pnewpat, rtx_insn *insn, rtx *pnotes)             }         }        else -       changed = change_zero_ext (pat); +       { +         if (change_pseudo_and_mask (pat)) +           { +             maybe_swap_commutative_operands (SET_SRC (pat)); +             changed = true; +           } +         changed |= change_zero_ext (pat); +       }      }    else if (GET_CODE (pat) == PARALLEL)      { diff --git a/gcc/testsuite/gcc.target/powerpc/20050603-3.c b/gcc/testsuite/gcc.target/powerpc/20050603-3.c index 4017d34f429..e628be11532 100644 --- a/gcc/testsuite/gcc.target/powerpc/20050603-3.c +++ b/gcc/testsuite/gcc.target/powerpc/20050603-3.c @@ -12,7 +12,7 @@ void rotins (unsigned int x)    b.y = (x<<12) | (x>>20);  } -/* { dg-final { scan-assembler-not {\mrlwinm} } } */ +/* { dg-final { scan-assembler-not {\mrlwinm} { target ilp32 } } } */  /* { dg-final { scan-assembler-not {\mrldic} } } */  /* { dg-final { scan-assembler-not {\mrot[lr]} } } */  /* { dg-final { scan-assembler-not {\ms[lr][wd]} } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/rlwimi-2.c b/gcc/testsuite/gcc.target/powerpc/rlwimi-2.c index bafa371db73..ffb5f9e450f 100644 --- a/gcc/testsuite/gcc.target/powerpc/rlwimi-2.c +++ b/gcc/testsuite/gcc.target/powerpc/rlwimi-2.c @@ -2,14 +2,14 @@  /* { dg-options "-O2" } */  /* { dg-final { scan-assembler-times {(?n)^\s+[a-z]} 14121 { target ilp32 } } } */ -/* { dg-final { scan-assembler-times {(?n)^\s+[a-z]} 20217 { target lp64 } } } */ +/* { dg-final { scan-assembler-times {(?n)^\s+[a-z]} 21279 { target lp64 } } } */  /* { dg-final { scan-assembler-times {(?n)^\s+blr} 6750 } } */  /* { dg-final { scan-assembler-times {(?n)^\s+mr} 643 { target ilp32 } } } */  /* { dg-final { scan-assembler-times {(?n)^\s+mr} 11 { target lp64 } } } */  /* { dg-final { scan-assembler-times {(?n)^\s+rldicl} 7790 { target lp64 } } } */  /* { dg-final { scan-assembler-times {(?n)^\s+rlwimi} 1692 { target ilp32 } } } */ -/* { dg-final { scan-assembler-times {(?n)^\s+rlwimi} 1666 { target lp64 } } } */ +/* { dg-final { scan-assembler-times {(?n)^\s+rlwimi} 1692 { target lp64 } } } */  /* { dg-final { scan-assembler-times {(?n)^\s+mulli} 5036 } } */