From patchwork Tue Feb 28 04:36:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sinan X-Patchwork-Id: 65721 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id E9E6A3858C50 for ; Tue, 28 Feb 2023 04:36:48 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org E9E6A3858C50 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1677559009; bh=48Bb5nBlI9ThXnj462FoPx/n13+CIJDJYO4pVml2/04=; h=Date:To:Cc:Subject:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From:Reply-To:From; b=VWoIv3W9wvuVbCD0C0xDPMJIqtakzYOFhuCqRf1lBez/icP6YgHeqjuYwYyqpRHUN iWrCO0ljNiSBZ0M2nvVeFfPiVF6ptyyf7x4mUDlLwIYbMwi4kZ89WbEQ3canNoj1t2 Yg62eoTR55+TF8P3aworl4CHLOFQTShV1ROIo0Uo= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from out30-132.freemail.mail.aliyun.com (out30-132.freemail.mail.aliyun.com [115.124.30.132]) by sourceware.org (Postfix) with ESMTPS id BA8CC3858D39 for ; Tue, 28 Feb 2023 04:36:19 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org BA8CC3858D39 X-Alimail-AntiSpam: AC=PASS; BC=-1|-1; BR=01201311R121e4; CH=green; DM=||false|; DS=||; FP=0|-1|-1|-1|0|-1|-1|-1; HT=ay29a033018045168; MF=sinan.lin@linux.alibaba.com; NM=1; PH=DW; RN=4; SR=0; TI=W4_0.1.41_DEFAULT_210DD506_1677558720198_o7001c15d; Received: from WS-web (sinan.lin@linux.alibaba.com[W4_0.1.41_DEFAULT_210DD506_1677558720198_o7001c15d]) at Tue, 28 Feb 2023 12:36:15 +0800 Date: Tue, 28 Feb 2023 12:36:15 +0800 To: "gcc-patches" Cc: "kito.cheng" , "palmer" , "jlaw" Message-ID: Subject: =?utf-8?q?=5BPATCH=5D_RISC-V=3A_Allow_const0=5Frtx_operand_in_max/m?= =?utf-8?q?in?= X-Mailer: [Alimail-Mailagent][W4_0.1.41][DEFAULT][Chrome] MIME-Version: 1.0 x-aliyun-mail-creator: W4_0.1.41_DEFAULT_QvNTW96aWxsYS81LjAgKE1hY2ludG9zaDsgSW50ZWwgTWFjIE9TIFggMTBfMTVfNykgQXBwbGVXZWJLaXQvNTM3LjM2IChLSFRNTCwgbGlrZSBHZWNrbykgQ2hyb21lLzExMC4wLjAuMCBTYWZhcmkvNTM3LjM2La X-Spam-Status: No, score=-19.7 required=5.0 tests=BAYES_00, ENV_AND_HDR_SPF_MATCH, GIT_PATCH_0, HTML_MESSAGE, KAM_DMARC_STATUS, KAM_SHORT, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP, UNPARSEABLE_RELAY, USER_IN_DEF_SPF_WL autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-Content-Filtered-By: Mailman/MimeDel 2.1.29 X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Sinan via Gcc-patches From: Sinan Reply-To: Sinan Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" From 73e743348a49a7fffcf2e328b8179e8dbbc3b2b4 Mon Sep 17 00:00:00 2001 From: Lin Sinan Date: Tue, 28 Feb 2023 00:44:55 +0800 Subject: [PATCH] RISC-V: Allow const0_rtx operand in max/min Optimize cases that use max[u]/min[u] against a zero constant. E.g., the case int f(int x) { return x >= 0 ? x : 0; } the current asm output in rv64gc_zba_zbb li rtmp,0 max a0,a0,rtmp could be optimized into max a0,a0,zero gcc/ChangeLog: * config/riscv/bitmanip.md: allow 0 constant in max/min pattern. gcc/testsuite/ChangeLog: * gcc.target/riscv/zbb-min-max-03.c: New test. --- gcc/config/riscv/bitmanip.md | 4 ++-- gcc/testsuite/gcc.target/riscv/zbb-min-max-03.c | 10 ++++++++++ 2 files changed, 12 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/zbb-min-max-03.c diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md index 58a86bd929f..f771835369c 100644 --- a/gcc/config/riscv/bitmanip.md +++ b/gcc/config/riscv/bitmanip.md @@ -363,9 +363,9 @@ (define_insn "3" [(set (match_operand:X 0 "register_operand" "=r") (bitmanip_minmax:X (match_operand:X 1 "register_operand" "r") - (match_operand:X 2 "register_operand" "r")))] + (match_operand:X 2 "reg_or_0_operand" "rJ")))] "TARGET_ZBB" - "\t%0,%1,%2" + "\t%0,%1,%z2" [(set_attr "type" "bitmanip")]) ;; Optimize the common case of a SImode min/max against a constant diff --git a/gcc/testsuite/gcc.target/riscv/zbb-min-max-03.c b/gcc/testsuite/gcc.target/riscv/zbb-min-max-03.c new file mode 100644 index 00000000000..947300d599d --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zbb-min-max-03.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc_zba_zbb -mabi=lp64d" } */ +/* { dg-skip-if "" { *-*-* } { "-O0" } } */ + +int f(int x) { + return x >= 0 ? x : 0; +} + +/* { dg-final { scan-assembler-times "max\t" 1 } } */ +/* { dg-final { scan-assembler-not "li\t" } } */