diff mbox series

[v1,1/1] aarch64: Remove +mpamv2 and support for MPAMV2_VID.

Message ID bmm.hk6ard8g32.gcc.gcc-TEST.rearnsha.185.1.1@forge-stage.sourceware.org
State Committed
Commit f1245f9923e29b707df2ecaf0e796c1e2b035ec5
Delegated to: Alice Carlotti
Headers
Series aarch64: Remove +mpamv2 and support for MPAMV2_VID. |

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Commit Message

Richard Earnshaw via Sourceware Forge July 7, 2026, 2:37 p.m. UTC 
  From: Richard Earnshaw <rearnsha@arm.com>

There are no known implementations of the MPAMV2_VID extension, and
Arm has decided to remove it from the AArch64 architecture specification.
This patch implements that withdrawal.  The only purpose of the +mpamv2
architectural feature extension was to enable the instructions added
by MPAMV2_VID in the assembler and these have also been removed.  The
feature extension is thus redundant and has been removed.  The sysreg
specifications have been updated to conform with similar sysregs that
have no associated instructions in the feature.

gcc/ChangeLog:

	* config/aarch64/aarch64-option-extensions.def (AARCH64_OPT_EXTENSION):
	Remove +mpamv2.
	* config/aarch64/aarch64-sys-regs.def: Remove sysregs associated
	with MPAMv2_VID and adjust other related sysregs to use the
	base permitted architecture.
	* doc/invoke.texi (aarch64: +mpamv2): Remove option.
---
 gcc/config/aarch64/aarch64-option-extensions.def |  2 --
 gcc/config/aarch64/aarch64-sys-regs.def          | 11 ++++-------
 gcc/doc/invoke.texi                              |  2 --
 3 files changed, 4 insertions(+), 11 deletions(-)

Comments

Alice Carlotti July 7, 2026, 3:40 p.m. UTC | #1 
On Tue, Jul 07, 2026 at 02:37:47PM +0000, Richard Earnshaw via Sourceware Forge wrote:
> From: Richard Earnshaw <rearnsha@arm.com>
> 
> There are no known implementations of the MPAMV2_VID extension, and
> Arm has decided to remove it from the AArch64 architecture specification.
> This patch implements that withdrawal.  The only purpose of the +mpamv2
> architectural feature extension was to enable the instructions added
> by MPAMV2_VID in the assembler and these have also been removed.  The
> feature extension is thus redundant and has been removed.  The sysreg
> specifications have been updated to conform with similar sysregs that
> have no associated instructions in the feature.

Ok for master, and ok for the release branch if noone objects in 48 hours.

Alice

> 
> gcc/ChangeLog:
> 
> 	* config/aarch64/aarch64-option-extensions.def (AARCH64_OPT_EXTENSION):
> 	Remove +mpamv2.
> 	* config/aarch64/aarch64-sys-regs.def: Remove sysregs associated
> 	with MPAMv2_VID and adjust other related sysregs to use the
> 	base permitted architecture.
> 	* doc/invoke.texi (aarch64: +mpamv2): Remove option.
> ---
>  gcc/config/aarch64/aarch64-option-extensions.def |  2 --
>  gcc/config/aarch64/aarch64-sys-regs.def          | 11 ++++-------
>  gcc/doc/invoke.texi                              |  2 --
>  3 files changed, 4 insertions(+), 11 deletions(-)
> 
> diff --git a/gcc/config/aarch64/aarch64-option-extensions.def b/gcc/config/aarch64/aarch64-option-extensions.def
> index b23e44efeb03..85483f38cc47 100644
> --- a/gcc/config/aarch64/aarch64-option-extensions.def
> +++ b/gcc/config/aarch64/aarch64-option-extensions.def
> @@ -359,8 +359,6 @@ AARCH64_OPT_EXTENSION("tlbid", TLBID, (), (), (), "")
>  
>  AARCH64_OPT_EXTENSION("gcie", GCIE, (), (), (), "")
>  
> -AARCH64_OPT_EXTENSION("mpamv2", MPAMv2, (), (), (), "")
> -
>  AARCH64_OPT_EXTENSION("lscp", LSCP, (), (), (), "")
>  
>  AARCH64_OPT_EXTENSION("mops-go", MOPS_GO, (MOPS, MEMTAG), (), (), "")
> diff --git a/gcc/config/aarch64/aarch64-sys-regs.def b/gcc/config/aarch64/aarch64-sys-regs.def
> index 9daa178ed7b7..1efbc3f3de5a 100644
> --- a/gcc/config/aarch64/aarch64-sys-regs.def
> +++ b/gcc/config/aarch64/aarch64-sys-regs.def
> @@ -922,16 +922,13 @@
>    SYSREG ("mpambwcap_el2",	CPENC (3,4,10,5,6),	0,		AARCH64_FEATURE (V9_3A)) /* MPAM_PE_BW_CTRL */
>    SYSREG ("mpambwidr_el1",	CPENC (3,0,10,4,5),	F_REG_READ,	AARCH64_FEATURE (V9_3A)) /* MPAM_PE_BW_CTRL */
>    SYSREG ("mpambwsm_el1",	CPENC (3,0,10,5,7),	0,		AARCH64_FEATURES (2, SME, V9_3A)) /* SME && MPAM_PE_BW_CTRL */
> -  SYSREG ("mpamctl_el1",	CPENC (3,0,10,5,2),	0,		AARCH64_FEATURE (MPAMv2))
> -  SYSREG ("mpamctl_el12",	CPENC (3,5,10,5,2),	0,		AARCH64_FEATURE (MPAMv2))
> -  SYSREG ("mpamctl_el2",	CPENC (3,4,10,5,2),	0,		AARCH64_FEATURE (MPAMv2))
> -  SYSREG ("mpamctl_el3",	CPENC (3,6,10,5,2),	0,		AARCH64_FEATURE (MPAMv2))
> +  SYSREG ("mpamctl_el1",	CPENC (3,0,10,5,2),	0,		AARCH64_FEATURE (V9_3A)) /* MPAMv2 */
> +  SYSREG ("mpamctl_el12",	CPENC (3,5,10,5,2),	0,		AARCH64_FEATURE (V9_3A)) /* MPAMv2 */
> +  SYSREG ("mpamctl_el2",	CPENC (3,4,10,5,2),	0,		AARCH64_FEATURE (V9_3A)) /* MPAMv2 */
> +  SYSREG ("mpamctl_el3",	CPENC (3,6,10,5,2),	0,		AARCH64_FEATURE (V9_3A)) /* MPAMv2 */
>    SYSREG ("mpamhcr_el2",	CPENC (3,4,10,4,0),	0,		AARCH64_FEATURE (V8_2A)) /* MPAM */
>    SYSREG ("mpamidr_el1",	CPENC (3,0,10,4,4),	F_REG_READ,	AARCH64_FEATURE (V8_2A)) /* MPAM */
>    SYSREG ("mpamsm_el1",		CPENC (3,0,10,5,3),	0,		AARCH64_FEATURES (2, SME, V8_2A)) /* SME && MPAM */
> -  SYSREG ("mpamvidcr_el2",	CPENC (3,4,10,7,0),	0,		AARCH64_FEATURE (MPAMv2))
> -  SYSREG ("mpamvidsr_el2",	CPENC (3,4,10,7,1),	0,		AARCH64_FEATURE (MPAMv2))
> -  SYSREG ("mpamvidsr_el3",	CPENC (3,6,10,7,1),	0,		AARCH64_FEATURE (MPAMv2))
>    SYSREG ("mpamvpm0_el2",	CPENC (3,4,10,6,0),	0,		AARCH64_FEATURE (V8_2A)) /* MPAM */
>    SYSREG ("mpamvpm1_el2",	CPENC (3,4,10,6,1),	0,		AARCH64_FEATURE (V8_2A)) /* MPAM */
>    SYSREG ("mpamvpm2_el2",	CPENC (3,4,10,6,2),	0,		AARCH64_FEATURE (V8_2A)) /* MPAM */
> diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
> index 455ea08d7c73..d0a14484547e 100644
> --- a/gcc/doc/invoke.texi
> +++ b/gcc/doc/invoke.texi
> @@ -22082,8 +22082,6 @@ Enable the TIndex Exception-like Vector Extension.
>  Enable the TLBI Domains Extension.
>  @item gcie
>  Enable the GICv5 (Generic Interrupt Controller) CPU Interface Extension.
> -@item mpamv2
> -Enable MPAMv2 system registers.
>  @item lscp
>  Enable the load acquire and store release pair extension.
>  @item mops-go
> -- 
> 2.54.0
>
diff mbox series

Patch

diff --git a/gcc/config/aarch64/aarch64-option-extensions.def b/gcc/config/aarch64/aarch64-option-extensions.def
index b23e44efeb03..85483f38cc47 100644
--- a/gcc/config/aarch64/aarch64-option-extensions.def
+++ b/gcc/config/aarch64/aarch64-option-extensions.def
@@ -359,8 +359,6 @@  AARCH64_OPT_EXTENSION("tlbid", TLBID, (), (), (), "")
 
 AARCH64_OPT_EXTENSION("gcie", GCIE, (), (), (), "")
 
-AARCH64_OPT_EXTENSION("mpamv2", MPAMv2, (), (), (), "")
-
 AARCH64_OPT_EXTENSION("lscp", LSCP, (), (), (), "")
 
 AARCH64_OPT_EXTENSION("mops-go", MOPS_GO, (MOPS, MEMTAG), (), (), "")
diff --git a/gcc/config/aarch64/aarch64-sys-regs.def b/gcc/config/aarch64/aarch64-sys-regs.def
index 9daa178ed7b7..1efbc3f3de5a 100644
--- a/gcc/config/aarch64/aarch64-sys-regs.def
+++ b/gcc/config/aarch64/aarch64-sys-regs.def
@@ -922,16 +922,13 @@ 
   SYSREG ("mpambwcap_el2",	CPENC (3,4,10,5,6),	0,		AARCH64_FEATURE (V9_3A)) /* MPAM_PE_BW_CTRL */
   SYSREG ("mpambwidr_el1",	CPENC (3,0,10,4,5),	F_REG_READ,	AARCH64_FEATURE (V9_3A)) /* MPAM_PE_BW_CTRL */
   SYSREG ("mpambwsm_el1",	CPENC (3,0,10,5,7),	0,		AARCH64_FEATURES (2, SME, V9_3A)) /* SME && MPAM_PE_BW_CTRL */
-  SYSREG ("mpamctl_el1",	CPENC (3,0,10,5,2),	0,		AARCH64_FEATURE (MPAMv2))
-  SYSREG ("mpamctl_el12",	CPENC (3,5,10,5,2),	0,		AARCH64_FEATURE (MPAMv2))
-  SYSREG ("mpamctl_el2",	CPENC (3,4,10,5,2),	0,		AARCH64_FEATURE (MPAMv2))
-  SYSREG ("mpamctl_el3",	CPENC (3,6,10,5,2),	0,		AARCH64_FEATURE (MPAMv2))
+  SYSREG ("mpamctl_el1",	CPENC (3,0,10,5,2),	0,		AARCH64_FEATURE (V9_3A)) /* MPAMv2 */
+  SYSREG ("mpamctl_el12",	CPENC (3,5,10,5,2),	0,		AARCH64_FEATURE (V9_3A)) /* MPAMv2 */
+  SYSREG ("mpamctl_el2",	CPENC (3,4,10,5,2),	0,		AARCH64_FEATURE (V9_3A)) /* MPAMv2 */
+  SYSREG ("mpamctl_el3",	CPENC (3,6,10,5,2),	0,		AARCH64_FEATURE (V9_3A)) /* MPAMv2 */
   SYSREG ("mpamhcr_el2",	CPENC (3,4,10,4,0),	0,		AARCH64_FEATURE (V8_2A)) /* MPAM */
   SYSREG ("mpamidr_el1",	CPENC (3,0,10,4,4),	F_REG_READ,	AARCH64_FEATURE (V8_2A)) /* MPAM */
   SYSREG ("mpamsm_el1",		CPENC (3,0,10,5,3),	0,		AARCH64_FEATURES (2, SME, V8_2A)) /* SME && MPAM */
-  SYSREG ("mpamvidcr_el2",	CPENC (3,4,10,7,0),	0,		AARCH64_FEATURE (MPAMv2))
-  SYSREG ("mpamvidsr_el2",	CPENC (3,4,10,7,1),	0,		AARCH64_FEATURE (MPAMv2))
-  SYSREG ("mpamvidsr_el3",	CPENC (3,6,10,7,1),	0,		AARCH64_FEATURE (MPAMv2))
   SYSREG ("mpamvpm0_el2",	CPENC (3,4,10,6,0),	0,		AARCH64_FEATURE (V8_2A)) /* MPAM */
   SYSREG ("mpamvpm1_el2",	CPENC (3,4,10,6,1),	0,		AARCH64_FEATURE (V8_2A)) /* MPAM */
   SYSREG ("mpamvpm2_el2",	CPENC (3,4,10,6,2),	0,		AARCH64_FEATURE (V8_2A)) /* MPAM */
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 455ea08d7c73..d0a14484547e 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -22082,8 +22082,6 @@  Enable the TIndex Exception-like Vector Extension.
 Enable the TLBI Domains Extension.
 @item gcie
 Enable the GICv5 (Generic Interrupt Controller) CPU Interface Extension.
-@item mpamv2
-Enable MPAMv2 system registers.
 @item lscp
 Enable the load acquire and store release pair extension.
 @item mops-go