From patchwork Fri Feb 4 23:55:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Maciej W. Rozycki" X-Patchwork-Id: 50815 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 3E0283858431 for ; Fri, 4 Feb 2022 23:56:32 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-lf1-x12e.google.com (mail-lf1-x12e.google.com [IPv6:2a00:1450:4864:20::12e]) by sourceware.org (Postfix) with ESMTPS id D1B653858C3A for ; Fri, 4 Feb 2022 23:55:35 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org D1B653858C3A Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=embecosm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=embecosm.com Received: by mail-lf1-x12e.google.com with SMTP id x23so15695912lfc.0 for ; Fri, 04 Feb 2022 15:55:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=embecosm.com; s=google; h=date:from:to:cc:subject:message-id:user-agent:mime-version; bh=SpM0ivrSz1chfVNSw5uw1/Mbetyb+hz7aXEn4ZTeDaE=; b=Drd5FWEt3SO4ZpAlJsw89pq4c8MH4PNj65W34lFc9D2v7psFlzsprwGLR/RjlYtpcD /0nyxbaHUKdTqZ2VLPApMrGJZVeMlUGCjLj4g7s26dSSdmHzDdmFDPrj0ZSBFbL1/XLE usbfFEw4YbrTYW5aw0OHBPxM0/eVu/My250rVhie9B1jADXshdBiWVxtkutf3SV1NWLh 67rLJQ48GKJrGUc7BK6m0gvP3jllnOnNHn3J0bwMBGPD9WXwWJkD9HkUeGQ3OYv6qzSK rZ1abEo3p79PclSBkLXVPyz0KdzLwkJBEbpe8KSBHTtyqnzv3F8beBuQwInmcSVeabvE vc0A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:user-agent :mime-version; bh=SpM0ivrSz1chfVNSw5uw1/Mbetyb+hz7aXEn4ZTeDaE=; b=pETHwW9CbLZx3C+GaSezDGCm2ozvsta00ZYX5QSF3o64gHsjbIanmMcF7wWwCvU+PJ H7TfAbtY0gNgGgHjJvZSCiC2olFQ8llLjE006HjK86bXWqu5oFl0ZqAjBg2mUjsVbRu/ JrzUJIbQ67FlweocaQwlth7MvJLA2DUsn1rtuprlqMJZQ/epqjCxUfi63Kx9/8vgzD3b NflV9xCPjN4rEhrtIP0z0Je4dY/K0GosLG3t4AipKvyYOxergWAkCpcNEUExujNNdF4C 6hOTGAD0agaPasr5YMi+DYWxT9rWHNR13xnhKelCRcM96BxMbTCb0gVGfGwP5ZgolqX+ NN8A== X-Gm-Message-State: AOAM53078ilAckS1mlvLFlGKWlQb7roDOJLnIbJOo/8ho+LhgJDanRb4 MCy1ieQrKjGtTk0p1BCBSWSeOLYFGCgd6Q== X-Google-Smtp-Source: ABdhPJxobT5aBKFcnspDh9nOsoihrManq+EP9o8qfXgkFXtT3k+doMXNG+cVCHemrT6NCvekNnp8BA== X-Received: by 2002:ac2:598e:: with SMTP id w14mr958076lfn.218.1644018934549; Fri, 04 Feb 2022 15:55:34 -0800 (PST) Received: from [192.168.219.3] ([78.8.192.131]) by smtp.gmail.com with ESMTPSA id b2sm446771ljd.12.2022.02.04.15.55.33 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Fri, 04 Feb 2022 15:55:34 -0800 (PST) Date: Fri, 4 Feb 2022 23:55:30 +0000 (GMT) From: "Maciej W. Rozycki" To: gcc-patches@gcc.gnu.org Subject: [PATCH v2] doc: RISC-V: Document the `-misa-spec=' option Message-ID: User-Agent: Alpine 2.20 (DEB 67 2015-01-07) MIME-Version: 1.0 X-Spam-Status: No, score=-2.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, KAM_ASCII_DIVIDERS, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kito Cheng , Andrew Waterman Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" We have recently updated the default for the `-misa-spec=' option, yet we still have not documented it nor its `--with-isa-spec=' counterpart in the GCC manuals. Fix that. gcc/ * doc/install.texi (Configuration): Document `--with-isa-spec=' RISC-V option. * doc/invoke.texi (Option Summary): List `-misa-spec=' RISC-V option. (RISC-V Options): Document it. Reviewed-by: Palmer Dabbelt Acked-by: Palmer Dabbelt --- > Thanks. I have a version of this floating around somewhere. I probably forgot > to post it and it's generally inferior to yours, so this LGTM. Thank you for your review. > The only thing I'd point out is that this specifically controls the version of > the Unprivileged (formally called user) specification, as there are many RISC-V > specifications and it can be a bit ambiguous what folks mean when they just say > "specification". Not sure exactly what the right wording is there, maybe > "version of the RISC-V Unprivileged (formerly user-level) ISA specification"? Good point. I have updated the text to your suggested wording, which is also what I would use if I were to propose it (modulo capitalisation). I will commit the change as included here shortly then unless I hear an objection. Maciej Changes from v1: - Clarify it is the Unprivileged (formerly User-Level) ISA specification the options concerned refer to. - Fix a typo `-misa-spec' vs `-misa-spec=' in ChangeLog. --- gcc/doc/install.texi | 14 ++++++++++++++ gcc/doc/invoke.texi | 17 +++++++++++++++++ 2 files changed, 31 insertions(+) gcc-riscv-misa-doc.diff Index: gcc/gcc/doc/install.texi =================================================================== --- gcc.orig/gcc/doc/install.texi +++ gcc/gcc/doc/install.texi @@ -1599,6 +1599,20 @@ On certain targets this option sets the size as a power of two in bytes. On AArch64 @var{size} is required to be either 12 (4KB) or 16 (64KB). +@item --with-isa-spec=@var{ISA-spec-string} +On RISC-V targets specify the default version of the RISC-V Unprivileged +(formerly User-Level) ISA specification to produce code conforming to. +The possibilities for @var{ISA-spec-string} are: +@table @code +@item 2.2 +Produce code conforming to version 2.2. +@item 20190608 +Produce code conforming to version 20190608. +@item 20191213 +Produce code conforming to version 20191213. +@end table +In the absence of this configuration option the default version is 20191213. + @item --enable-__cxa_atexit Define if you want to use __cxa_atexit, rather than atexit, to register C++ destructors for local statics and global objects. Index: gcc/gcc/doc/invoke.texi =================================================================== --- gcc.orig/gcc/doc/invoke.texi +++ gcc/gcc/doc/invoke.texi @@ -1184,6 +1184,7 @@ See RS/6000 and PowerPC Options. -mabi=@var{ABI-string} @gol -mfdiv -mno-fdiv @gol -mdiv -mno-div @gol +-misa-spec=@var{ISA-spec-string} @gol -march=@var{ISA-string} @gol -mtune=@var{processor-string} @gol -mpreferred-stack-boundary=@var{num} @gol @@ -27632,6 +27633,22 @@ Do or don't use hardware instructions fo M extension. The default is to use them if the specified architecture has these instructions. +@item -misa-spec=@var{ISA-spec-string} +@opindex misa-spec +Specify the version of the RISC-V Unprivileged (formerly User-Level) +ISA specification to produce code conforming to. The possibilities +for @var{ISA-spec-string} are: +@table @code +@item 2.2 +Produce code conforming to version 2.2. +@item 20190608 +Produce code conforming to version 20190608. +@item 20191213 +Produce code conforming to version 20191213. +@end table +The default is @option{-misa-spec=20191213} unless GCC has been configured +with @option{--with-isa-spec=} specifying a different default version. + @item -march=@var{ISA-string} @opindex march Generate code for given RISC-V ISA (e.g.@: @samp{rv64im}). ISA strings must be