From patchwork Wed Nov 3 13:53:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Maciej W. Rozycki" X-Patchwork-Id: 46988 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 29FEF3857C6E for ; Wed, 3 Nov 2021 13:56:21 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-wr1-x42a.google.com (mail-wr1-x42a.google.com [IPv6:2a00:1450:4864:20::42a]) by sourceware.org (Postfix) with ESMTPS id 678F6385800B for ; Wed, 3 Nov 2021 13:54:01 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 678F6385800B Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=embecosm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=embecosm.com Received: by mail-wr1-x42a.google.com with SMTP id c4so3679751wrd.9 for ; Wed, 03 Nov 2021 06:54:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=embecosm.com; s=google; h=date:from:to:cc:subject:message-id:user-agent:mime-version; bh=hlNmkO1hKHLc/O+qDbEnT5l/ou09BD9B6McQ88s9NZY=; b=X5K/ZLZbZuOhhkJlwWeUGD3M5FkcrTY+HkqtV2GeHLo+kOIoyA07q6E7Hh8zaa2jJv 6QoALw75ggLUBrg7FXUmfrLqTx5NxnbVU3OKRSdUzGeoOGydPt7r+fFo9/to+KJwHQ43 VwbOMzzOnGU+QsS9VmG8H95xQCnx/+fRmdAgTq2TyGbK9StQU4Q+6Xg/K2kFXFLrD8Os 9mLlg5NKXLuVmuj9OUuQzu3cWOpQVdECqet1XPcVC1tEjg+QzW4QviRn1lqxxF7kKC0G 2Td2OqwF93q4H8o8wimBg+aC+7+1DMtIwIzwQ86cBe7k6dbUIbX9AHRNa/fZbBgZQ8Ph 9jGQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:user-agent :mime-version; bh=hlNmkO1hKHLc/O+qDbEnT5l/ou09BD9B6McQ88s9NZY=; b=dkjOOMm7CyiNIh5YF04X/3YcyDVro1iGHEeau+Pv1FjKtoyvgYeBJuiML4XIy3CEmG vUP3X1E/VT87vxu/9ONy9DnFwGKDwOyAM2SHt3YkRmNDeo+63dvwm/UYd0wzIip9JtWh Ql2tV8mf/b9I4Ly0SPgbvLoCzRrZbG2XjKG7pwBxAKSkUo+GmeFDE0QCfmtE0wcfaUnH 3I3qh2tG8MJirSsn7u5AwWdaVq0fQ9ZRcmRSWZTfxWlqfOURvtWTw4sweLlDzB5EWcZ7 AXyQeC9PogPILWmxfon5N/MB51/yppKQHZHK+pkOYj4kZPc6pdwGbu1EQfPLjRJ5sXxw cCrg== X-Gm-Message-State: AOAM530DCdHp8zqQHRHRHqrSUiucOIsJ69ZO02s8nlMLQBdjRi04rSil ZiaIUgVZIcblc7afNy2C3/8gjaeKsgc4aw== X-Google-Smtp-Source: ABdhPJz+DNcwf/yvTlBjMtSYooeNkGYfvcSWAwaIXF4HTewUZydG8FnARWa9CK0IiYlodWwM7uPYOg== X-Received: by 2002:a5d:5151:: with SMTP id u17mr27553724wrt.126.1635947640381; Wed, 03 Nov 2021 06:54:00 -0700 (PDT) Received: from [192.168.0.201] ([212.69.42.53]) by smtp.gmail.com with ESMTPSA id m20sm6064694wmq.5.2021.11.03.06.53.59 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Wed, 03 Nov 2021 06:53:59 -0700 (PDT) Date: Wed, 3 Nov 2021 13:53:58 +0000 (GMT) From: "Maciej W. Rozycki" To: gcc-patches@gcc.gnu.org Subject: [PATCH] PR middle-end/103059: reload: Also accept ASHIFT with indexed addressing Message-ID: User-Agent: Alpine 2.20 (DEB 67 2015-01-07) MIME-Version: 1.0 X-Spam-Status: No, score=-3.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ulrich Weigand Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" Correct a `vax-netbsdelf' target regression ultimately caused by commit c605a8bf9270 ("VAX: Accept ASHIFT in address expressions") (needed for LRA) and as of commit 4a960d548b7d ("Avoid invalid loop transformations in jump threading registry.") causing a build error in libgcc: .../libgcc/libgcov-driver.c: In function 'gcov_do_dump': .../libgcc/libgcov-driver.c:686:1: error: insn does not satisfy its constraints: 686 | } | ^ (insn 2051 2050 2052 185 (set (reg/f:SI 0 %r0 [555]) (plus:SI (ashift:SI (mem/c:SI (plus:SI (reg/f:SI 13 %fp) (const_int -28 [0xffffffffffffffe4])) [40 %sfp+-28 S4 A32]) (const_int 3 [0x3])) (plus:SI (reg/v/f:SI 9 %r9 [orig:176 fn_buffer ] [176]) (const_int 24 [0x18])))) ".../libgcc/libgcov-driver.c":172:40 614 {movaddrdi} (nil)) during RTL pass: postreload .../libgcc/libgcov-driver.c:686:1: internal compiler error: in extract_constrain_insn, at recog.c:2670 0x1122a5ff _fatal_insn(char const*, rtx_def const*, char const*, int, char const*) .../gcc/rtl-error.c:108 0x1122a697 _fatal_insn_not_found(rtx_def const*, char const*, int, char const*) .../gcc/rtl-error.c:118 0x111b5f2f extract_constrain_insn(rtx_insn*) .../gcc/recog.c:2670 0x11143eef reload_cse_simplify_operands .../gcc/postreload.c:407 0x11142fdb reload_cse_simplify .../gcc/postreload.c:132 0x11143533 reload_cse_regs_1 .../gcc/postreload.c:238 0x11142ce7 reload_cse_regs .../gcc/postreload.c:66 0x1114af33 execute .../gcc/postreload.c:2355 Please submit a full bug report, with preprocessed source if appropriate. Please include the complete backtrace with any bug report. See for instructions. This is because reload does not recognize the ASHIFT form of scaled indexed addressing that the offending commit enabled the backend to produce, and as seen in the RTL above lets the pseudo holding the index part become the original memory reference rather than reloading it into a hard register. Fix it then by adding said form to reload, removing the build failure and numerous similar regressions throughout `vax-netbsdelf' test suites run with the source as at right before the build regression. Cf. , and commit 6b3034eaba83 ("lra: Canonicalize mult to shift in address reloads"). gcc/ PR middle-end/103059 * reload.c (find_reloads_address_1): Also accept the ASHIFT form of indexed addressing. (find_reloads): Adjust accordingly. --- Hi, NB the change to `find_reloads_address_1' is one that removes the build error and I am fairly sure I have nailed it. The change to `find_reloads' seemed a natural consequence then as surely it deals with the results from `find_reloads_address_1', though things appear to work regardless and I haven't investigated what difference it makes. I have not yet tracked down which change after commit c605a8bf9270 made regressions appear in the test suites, however clearly the commit wasn't as complete a change as it should have been. I'll see if I can find it and will mention it in the final commit description if there is anything useful in that. As noted in the commit description this has been regression-tested with commit 4a960d548b7d^. I'm running regression-testing with GCC 11 right now as well and expect results by the end of week. I was trying to chase another target I could use to regression-test this with that does do scaled indexed addressing while still using old reload. The i386 port would be a good candidate, but it has switched to LRA long ago with no option to use old reload, and I think there would be little point in adding one just for the sake of such verification. Do we have any other port actually that could be affected by this change? OK to apply to trunk then and, as a stable regression, to GCC 11? Maciej --- gcc/reload.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) gcc-find-reloads-address-ashift.diff Index: gcc/gcc/reload.c =================================================================== --- gcc.orig/gcc/reload.c +++ gcc/gcc/reload.c @@ -2846,10 +2846,11 @@ find_reloads (rtx_insn *insn, int replac i, operand_type[i], ind_levels, insn); /* If we now have a simple operand where we used to have a - PLUS or MULT, re-recognize and try again. */ + PLUS or MULT or ASHIFT, re-recognize and try again. */ if ((OBJECT_P (*recog_data.operand_loc[i]) || GET_CODE (*recog_data.operand_loc[i]) == SUBREG) && (GET_CODE (recog_data.operand[i]) == MULT + || GET_CODE (recog_data.operand[i]) == ASHIFT || GET_CODE (recog_data.operand[i]) == PLUS)) { INSN_CODE (insn) = -1; @@ -5562,7 +5563,8 @@ find_reloads_address_1 (machine_mode mod return 1; } - if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE + if (code0 == MULT || code0 == ASHIFT + || code0 == SIGN_EXTEND || code0 == TRUNCATE || code0 == ZERO_EXTEND || code1 == MEM) { find_reloads_address_1 (mode, as, orig_op0, 1, PLUS, SCRATCH, @@ -5573,7 +5575,8 @@ find_reloads_address_1 (machine_mode mod insn); } - else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE + else if (code1 == MULT || code1 == ASHIFT + || code1 == SIGN_EXTEND || code1 == TRUNCATE || code1 == ZERO_EXTEND || code0 == MEM) { find_reloads_address_1 (mode, as, orig_op0, 0, PLUS, code1,