[8/11] Change TARGET_MODULO to TARGET_POWER9

Message ID Zxv2T7SS-3yKhonj@cowardly-lion.the-meissners.org
State New
Headers
Series Separate PowerPC architecture bits from ISA flags that use command line options |

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Commit Message

Michael Meissner Oct. 25, 2024, 7:49 p.m. UTC
  As part of the architecture flags patches, this patch changes the use of
TARGET_MODULO to TARGET_POWER9.  The modulo instructions were added in power9 (ISA
3.0).  Note, I did not change the uses of TARGET_MODULO where it was explicitly
generating different code if the machine had a modulo instruction.

I have built both big endian and little endian bootstrap compilers and there
were no regressions.

In addition, I constructed a test case that used every archiecture define (like
_ARCH_PWR4, etc.) and I also looked at the .machine directive generated.  I ran
this test for all supported combinations of -mcpu, big/little endian, and 32/64
bit support.  Every single instance generated exactly the same code with the
patches installed compared to the compiler before installing the patches.

Can I install this patch on the GCC 15 trunk?

2024-10-25  Michael Meissner  <meissner@linux.ibm.com>

	* config/rs6000/rs6000-builtin.cc (rs6000_builtin_is_supported): Use
	TARGET_POWER9 instead of TARGET_MODULO.
	* config/rs6000/rs6000.h (TARGET_CTZ): Likewise.
	(TARGET_EXTSWSLI): Likewise.
	(TARGET_MADDLD): Likewise.
	* config/rs6000/rs6000.md (enabled attribute): Likewise.
---
 gcc/config/rs6000/rs6000-builtin.cc | 4 ++--
 gcc/config/rs6000/rs6000.h          | 6 +++---
 gcc/config/rs6000/rs6000.md         | 2 +-
 3 files changed, 6 insertions(+), 6 deletions(-)
  

Patch

diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc
index dae43b672ea..b6093b3cb64 100644
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -169,9 +169,9 @@  rs6000_builtin_is_supported (enum rs6000_gen_builtins fncode)
     case ENB_P8V:
       return TARGET_P8_VECTOR;
     case ENB_P9:
-      return TARGET_MODULO;
+      return TARGET_POWER9;
     case ENB_P9_64:
-      return TARGET_MODULO && TARGET_POWERPC64;
+      return TARGET_POWER9 && TARGET_POWERPC64;
     case ENB_P9V:
       return TARGET_P9_VECTOR;
     case ENB_P10:
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 3a03c32f222..89ca1bad80f 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -461,9 +461,9 @@  extern int rs6000_vector_align[];
 #define TARGET_FCTIWUZ	TARGET_POWER7
 /* Only powerpc64 and powerpc476 support fctid.  */
 #define TARGET_FCTID	(TARGET_POWERPC64 || rs6000_cpu == PROCESSOR_PPC476)
-#define TARGET_CTZ	TARGET_MODULO
-#define TARGET_EXTSWSLI	(TARGET_MODULO && TARGET_POWERPC64)
-#define TARGET_MADDLD	TARGET_MODULO
+#define TARGET_CTZ	TARGET_POWER9
+#define TARGET_EXTSWSLI	(TARGET_POWER9 && TARGET_POWERPC64)
+#define TARGET_MADDLD	TARGET_POWER9
 
 /* TARGET_DIRECT_MOVE is redundant to TARGET_P8_VECTOR, so alias it to that.  */
 #define TARGET_DIRECT_MOVE	TARGET_P8_VECTOR
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index bff898a4eff..fc0d454e9a4 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -403,7 +403,7 @@  (define_attr "enabled" ""
      (const_int 1)
 
      (and (eq_attr "isa" "p9")
-	  (match_test "TARGET_MODULO"))
+	  (match_test "TARGET_POWER9"))
      (const_int 1)
 
      (and (eq_attr "isa" "p9v")