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Fri, 25 Oct 2024 19:45:12 +0000 Received: from smtpav02.wdc07v.mail.ibm.com (smtpav02.wdc07v.mail.ibm.com [10.39.53.229]) by smtprelay07.wdc07v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 49PJjBTj18940568 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 25 Oct 2024 19:45:11 GMT Received: from smtpav02.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C67CA58059; Fri, 25 Oct 2024 19:45:11 +0000 (GMT) Received: from smtpav02.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 334EA58058; Fri, 25 Oct 2024 19:45:11 +0000 (GMT) Received: from cowardly-lion.the-meissners.org (unknown [9.61.120.201]) by smtpav02.wdc07v.mail.ibm.com (Postfix) with ESMTPS; Fri, 25 Oct 2024 19:45:11 +0000 (GMT) Date: Fri, 25 Oct 2024 15:45:09 -0400 From: Michael Meissner To: Michael Meissner , gcc-patches@gcc.gnu.org, Segher Boessenkool , "Kewen.Lin" , Peter Bergner Subject: [PATCH 4/11] Change TARGET_POPCNTB to TARGET_POWER5 Message-ID: Mail-Followup-To: Michael Meissner , gcc-patches@gcc.gnu.org, Segher Boessenkool , "Kewen.Lin" , Peter Bergner References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: _r4NeKo3FCLOb_ly146Ze8VF8lu0uLV0 X-Proofpoint-GUID: _r4NeKo3FCLOb_ly146Ze8VF8lu0uLV0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1051,Hydra:6.0.680,FMLib:17.12.62.30 definitions=2024-10-15_01,2024-10-11_01,2024-09-30_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 malwarescore=0 mlxscore=0 phishscore=0 priorityscore=1501 suspectscore=0 impostorscore=0 lowpriorityscore=0 spamscore=0 mlxlogscore=709 bulkscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410250148 X-Spam-Status: No, score=-10.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_NUMSUBJECT, RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~patchwork=sourceware.org@gcc.gnu.org As part of the architecture flags patches, this patch changes the use of TARGET_POPCNTB to TARGET_POWER5. The POPCNTB instruction was added in ISA 2.02 (power5). I have built both big endian and little endian bootstrap compilers and there were no regressions. In addition, I constructed a test case that used every archiecture define (like _ARCH_PWR4, etc.) and I also looked at the .machine directive generated. I ran this test for all supported combinations of -mcpu, big/little endian, and 32/64 bit support. Every single instance generated exactly the same code with the patches installed compared to the compiler before installing the patches. Can I install this patch on the GCC 15 trunk? 2024-10-22 Michael Meissner * config/rs6000/rs6000-builtin.cc (rs6000_builtin_is_supported): Use TARGET_POWER5 instead of TARGET_POPCNTB. * config/rs6000/rs6000.h (TARGET_EXTRA_BUILTINS): Use TARGET_POWER5 instead of TARGET_POPCNTB. Eliminate TARGET_CMPB and TARGET_POPCNTD tests since TARGET_POWER5 will always be true for those tests. (TARGET_FRE): Use TARGET_POWER5 instead of TARGET_POPCNTB. (TARGET_FRSQRTES): Likewise. * config/rs6000/rs6000.md (enabled attribute): Likewise. (popcount): Use TARGET_POWER5 instead of TARGET_POPCNTB. Drop test for TARGET_POPCNTD (i.e power7), since TARGET_POPCNTB will always be set if TARGET_POPCNTD is set. (popcntb2): Use TARGET_POWER5 instead of TARGET_POPCNTB. (parity2): Likewise. (parity2_cmpb): Remove TARGET_POPCNTB test, since it will always be true when TARGET_CMPB (i.e. power6) is set. --- gcc/config/rs6000/rs6000-builtin.cc | 2 +- gcc/config/rs6000/rs6000.h | 8 +++----- gcc/config/rs6000/rs6000.md | 10 +++++----- 3 files changed, 9 insertions(+), 11 deletions(-) diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc index 9bdbae1ecf9..98a0545030c 100644 --- a/gcc/config/rs6000/rs6000-builtin.cc +++ b/gcc/config/rs6000/rs6000-builtin.cc @@ -155,7 +155,7 @@ rs6000_builtin_is_supported (enum rs6000_gen_builtins fncode) case ENB_ALWAYS: return true; case ENB_P5: - return TARGET_POPCNTB; + return TARGET_POWER5; case ENB_P6: return TARGET_CMPB; case ENB_P6_64: diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 7ad8baca177..4500724d895 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -547,9 +547,7 @@ extern int rs6000_vector_align[]; #define TARGET_EXTRA_BUILTINS (TARGET_POWERPC64 \ || TARGET_PPC_GPOPT /* 970/power4 */ \ - || TARGET_POPCNTB /* ISA 2.02 */ \ - || TARGET_CMPB /* ISA 2.05 */ \ - || TARGET_POPCNTD /* ISA 2.06 */ \ + || TARGET_POWER5 /* ISA 2.02 & above */ \ || TARGET_ALTIVEC \ || TARGET_VSX \ || TARGET_HARD_FLOAT) @@ -563,9 +561,9 @@ extern int rs6000_vector_align[]; #define TARGET_FRES (TARGET_HARD_FLOAT && TARGET_PPC_GFXOPT) #define TARGET_FRE (TARGET_HARD_FLOAT \ - && (TARGET_POPCNTB || VECTOR_UNIT_VSX_P (DFmode))) + && (TARGET_POWER5 || VECTOR_UNIT_VSX_P (DFmode))) -#define TARGET_FRSQRTES (TARGET_HARD_FLOAT && TARGET_POPCNTB \ +#define TARGET_FRSQRTES (TARGET_HARD_FLOAT && TARGET_POWER5 \ && TARGET_PPC_GFXOPT) #define TARGET_FRSQRTE (TARGET_HARD_FLOAT \ diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 8eda2f7bb0d..10d13bf812d 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -379,7 +379,7 @@ (define_attr "enabled" "" (const_int 1) (and (eq_attr "isa" "p5") - (match_test "TARGET_POPCNTB")) + (match_test "TARGET_POWER5")) (const_int 1) (and (eq_attr "isa" "p6") @@ -2510,7 +2510,7 @@ (define_expand "ffs2" (define_expand "popcount2" [(set (match_operand:GPR 0 "gpc_reg_operand") (popcount:GPR (match_operand:GPR 1 "gpc_reg_operand")))] - "TARGET_POPCNTB || TARGET_POPCNTD" + "TARGET_POWER5" { rs6000_emit_popcount (operands[0], operands[1]); DONE; @@ -2520,7 +2520,7 @@ (define_insn "popcntb2" [(set (match_operand:GPR 0 "gpc_reg_operand" "=r") (unspec:GPR [(match_operand:GPR 1 "gpc_reg_operand" "r")] UNSPEC_POPCNTB))] - "TARGET_POPCNTB" + "TARGET_POWER5" "popcntb %0,%1" [(set_attr "type" "popcnt")]) @@ -2535,7 +2535,7 @@ (define_insn "popcntd2" (define_expand "parity2" [(set (match_operand:GPR 0 "gpc_reg_operand") (parity:GPR (match_operand:GPR 1 "gpc_reg_operand")))] - "TARGET_POPCNTB" + "TARGET_POWER5" { rs6000_emit_parity (operands[0], operands[1]); DONE; @@ -2544,7 +2544,7 @@ (define_expand "parity2" (define_insn "parity2_cmpb" [(set (match_operand:GPR 0 "gpc_reg_operand" "=r") (unspec:GPR [(match_operand:GPR 1 "gpc_reg_operand" "r")] UNSPEC_PARITY))] - "TARGET_CMPB && TARGET_POPCNTB" + "TARGET_CMPB" "prty %0,%1" [(set_attr "type" "popcnt")])