diff mbox series

[committed] hppa: Fix (plus (plus (mult (a) (mem_shadd_constant)) (b)) (c)) optimization

Message ID ZrJ0g8mzRpq2fc5Y@mx3210.local
State Committed
Commit dc01f249db5c4d08b76dc2783b1539290a800f2d
Headers
Series [committed] hppa: Fix (plus (plus (mult (a) (mem_shadd_constant)) (b)) (c)) optimization |

Checks

Context Check Description
linaro-tcwg-bot/tcwg_gcc_build--master-arm warning Patch is already merged
linaro-tcwg-bot/tcwg_gcc_build--master-aarch64 warning Patch is already merged

Commit Message

John David Anglin Aug. 6, 2024, 7:07 p.m. UTC 
  Tested on hppa-unknown-linux-gnu.  Committed to active branches.

Dave
---

hppa: Fix (plus (plus (mult (a) (mem_shadd_constant)) (b)) (c)) optimization

The constant C must be an integral multiple of the shift value in
the above optimization.  Non integral values can occur evaluating
IMAGPART_EXPR when the shadd constant is 8 and we have SFmode.

2024-08-06  John David Anglin  <danglin@gcc.gnu.org>

gcc/ChangeLog:

	PR target/113384
	* config/pa/pa.cc (hppa_legitimize_address): Add check to
	ensure constant is an integral multiple of shift the value.
diff mbox series

Patch

diff --git a/gcc/config/pa/pa.cc b/gcc/config/pa/pa.cc
index ab4bfc5d0c2..7b222875247 100644
--- a/gcc/config/pa/pa.cc
+++ b/gcc/config/pa/pa.cc
@@ -1410,6 +1410,7 @@  hppa_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED,
       /* If the index adds a large constant, try to scale the
 	 constant so that it can be loaded with only one insn.  */
       if (GET_CODE (XEXP (idx, 1)) == CONST_INT
+	  && INTVAL (XEXP (idx, 1)) % (1 << shift_val) == 0
 	  && VAL_14_BITS_P (INTVAL (XEXP (idx, 1))
 			    / INTVAL (XEXP (XEXP (idx, 0), 1)))
 	  && INTVAL (XEXP (idx, 1)) % INTVAL (XEXP (XEXP (idx, 0), 1)) == 0)