diff mbox series

[4/9] Change TARGET_POPCNTB to TARGET_POWER5

Message ID Zqx5LkRC4l_U2RJc@cowardly-lion.the-meissners.org
State New
Headers
Series Adding PowerPC architecture flags in addition to ISA flags |

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Commit Message

Michael Meissner Aug. 2, 2024, 6:14 a.m. UTC 
  As part of the architecture flags patches, this patch changes the use of
TARGET_POPCNTB to TARGET_POWER5.  The POPCNTB instruction was added in ISA 2.02
(power5).

I have built both big endian and little endian bootstrap compilers and there
were no regressions.

In addition, I constructed a test case that used every archiecture define (like
_ARCH_PWR4, etc.) and I also looked at the .machine directive generated.  I ran
this test for all supported combinations of -mcpu, big/little endian, and 32/64
bit support.  Every single instance generated exactly the same code with the
patches installed compared to the compiler before installing the patches.

Can I install this patch on the GCC 15 trunk?

2024-08-01  Michael Meissner  <meissner@linux.ibm.com>

	* config/rs6000/rs6000-builtin.cc (rs6000_builtin_is_supported): Use
	TARGET_POWER5 instead of TARGET_POPCNTB.
	* config/rs6000/rs6000.h (TARGET_EXTRA_BUILTINS): Use TARGET_POWER5
	instead of TARGET_POPCNTB.  Eliminate TARGET_CMPB and TARGET_POPCNTD
	tests since TARGET_POWER5 will always be true for those tests.
	(TARGET_FRE): Use TARGET_POWER5 instead of TARGET_POPCNTB.
	(TARGET_FRSQRTES): Likewise.
	* config/rs6000/rs6000.md (enabled attribute): Likewise.
	(popcount<mode>): Use TARGET_POWER5 instead of TARGET_POPCNTB.  Drop
	test for TARGET_POPCNTD (i.e power7), since TARGET_POPCNTB will always
	be set if TARGET_POPCNTD is set.
	(popcntb<mode>2): Use TARGET_POWER5 instead of TARGET_POPCNTB.
	(parity<mode>2): Likewise.
	(parity<mode>2_cmpb): Remove TARGET_POPCNTB test, since it will always
	be true when TARGET_CMPB (i.e. power6) is set.
---
 gcc/config/rs6000/rs6000-builtin.cc |  2 +-
 gcc/config/rs6000/rs6000.h          |  8 +++-----
 gcc/config/rs6000/rs6000.md         | 10 +++++-----
 3 files changed, 9 insertions(+), 11 deletions(-)
diff mbox series

Patch

diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc
index 099cbc82245..ba2eba15378 100644
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -155,7 +155,7 @@  rs6000_builtin_is_supported (enum rs6000_gen_builtins fncode)
     case ENB_ALWAYS:
       return true;
     case ENB_P5:
-      return TARGET_POPCNTB;
+      return TARGET_POWER5;
     case ENB_P6:
       return TARGET_CMPB;
     case ENB_P6_64:
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 292b2ca164d..4ad0fca1d60 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -547,9 +547,7 @@  extern int rs6000_vector_align[];
 
 #define TARGET_EXTRA_BUILTINS	(TARGET_POWERPC64			 \
 				 || TARGET_PPC_GPOPT /* 970/power4 */	 \
-				 || TARGET_POPCNTB   /* ISA 2.02 */	 \
-				 || TARGET_CMPB      /* ISA 2.05 */	 \
-				 || TARGET_POPCNTD   /* ISA 2.06 */	 \
+				 || TARGET_POWER5    /* ISA 2.02 & above */ \
 				 || TARGET_ALTIVEC			 \
 				 || TARGET_VSX				 \
 				 || TARGET_HARD_FLOAT)
@@ -563,9 +561,9 @@  extern int rs6000_vector_align[];
 #define TARGET_FRES	(TARGET_HARD_FLOAT && TARGET_PPC_GFXOPT)
 
 #define TARGET_FRE	(TARGET_HARD_FLOAT \
-			 && (TARGET_POPCNTB || VECTOR_UNIT_VSX_P (DFmode)))
+			 && (TARGET_POWER5 || VECTOR_UNIT_VSX_P (DFmode)))
 
-#define TARGET_FRSQRTES	(TARGET_HARD_FLOAT && TARGET_POPCNTB \
+#define TARGET_FRSQRTES	(TARGET_HARD_FLOAT && TARGET_POWER5 \
 			 && TARGET_PPC_GFXOPT)
 
 #define TARGET_FRSQRTE	(TARGET_HARD_FLOAT \
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index d352a1431ad..4e5a3e1b345 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -365,7 +365,7 @@  (define_attr "enabled" ""
      (const_int 1)
 
      (and (eq_attr "isa" "p5")
-	  (match_test "TARGET_POPCNTB"))
+	  (match_test "TARGET_POWER5"))
      (const_int 1)
 
      (and (eq_attr "isa" "p6")
@@ -2475,7 +2475,7 @@  (define_expand "ffs<mode>2"
 (define_expand "popcount<mode>2"
   [(set (match_operand:GPR 0 "gpc_reg_operand")
 	(popcount:GPR (match_operand:GPR 1 "gpc_reg_operand")))]
-  "TARGET_POPCNTB || TARGET_POPCNTD"
+  "TARGET_POWER5"
 {
   rs6000_emit_popcount (operands[0], operands[1]);
   DONE;
@@ -2485,7 +2485,7 @@  (define_insn "popcntb<mode>2"
   [(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
 	(unspec:GPR [(match_operand:GPR 1 "gpc_reg_operand" "r")]
 		    UNSPEC_POPCNTB))]
-  "TARGET_POPCNTB"
+  "TARGET_POWER5"
   "popcntb %0,%1"
   [(set_attr "type" "popcnt")])
 
@@ -2500,7 +2500,7 @@  (define_insn "popcntd<mode>2"
 (define_expand "parity<mode>2"
   [(set (match_operand:GPR 0 "gpc_reg_operand")
 	(parity:GPR (match_operand:GPR 1 "gpc_reg_operand")))]
-  "TARGET_POPCNTB"
+  "TARGET_POWER5"
 {
   rs6000_emit_parity (operands[0], operands[1]);
   DONE;
@@ -2509,7 +2509,7 @@  (define_expand "parity<mode>2"
 (define_insn "parity<mode>2_cmpb"
   [(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
 	(unspec:GPR [(match_operand:GPR 1 "gpc_reg_operand" "r")] UNSPEC_PARITY))]
-  "TARGET_CMPB && TARGET_POPCNTB"
+  "TARGET_CMPB"
   "prty<wd> %0,%1"
   [(set_attr "type" "popcnt")])