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Message-ID: Mail-Followup-To: Michael Meissner , gcc-patches@gcc.gnu.org, Segher Boessenkool , "Kewen.Lin" , David Edelsohn , Peter Bergner , Will Schmidt References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: _XzkSrcKsH_1u_2iUkpm47NJ9lugO5Tv X-Proofpoint-GUID: NLVSIl5EweytE40ti_cWUw9U2Q3hrFR2 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-07-27_08,2022-07-27_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 mlxlogscore=999 clxscore=1015 adultscore=0 malwarescore=0 mlxscore=0 spamscore=0 impostorscore=0 suspectscore=0 bulkscore=0 lowpriorityscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2206140000 definitions=main-2207280019 X-Spam-Status: No, score=-10.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_MANYTO, KAM_SHORT, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Michael Meissner via Gcc-patches From: Michael Meissner Reply-To: Michael Meissner Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" [PATCH 4/5] Support IEEE 128-bit overload extract and insert built-in functions. This patch adds support for overloading the IEEE 128-bit extract and insert built-in functions bewteeen KFmode and TFmode arguments. I have tested these patches on a power10 that is running Fedora 36, which defaults to using long doubles that are IEEE 128-bit. I have built two parallel GCC compilers, one that defaults to using IEEE 128-bit long doubles and one that defaults to using IBM 128-bit long doubles. I have compared the test results to the original compiler results, comparing a modified GCC to the original compiler using an IEEE 128-bit long double default, and also comparing a modified GCC to the original compiler using an IBM 128-bit long double default. In both cases, the results are the same. I have also compared the compilers with the future patch in progress that does switch the internal type handling. Once those patches are installed, the overload mechanism will insure the correct built-in is used. Can I install this patch to the trunk, assuming I have installed the first three patches in the series? 2022-07-27 Michael Meissner gcc/ * config/rs6000/rs6000-builtins.def (__builtin_vsx_scalar_extract_expq_kf): Rename KFmode IEEE 128-bit insert and extract built-in functions to have a KF suffix to allow overloading. (__builtin_vsx_scalar_extract_sigq_kf): Likewise. (__builtin_vsx_scalar_insert_exp_qp_kf): Likewise. (__builtin_vsx_scalar_extract_expq_tf): Add TFmode variants for IEEE 128-bit insert and extract support. (__builtin_vsx_scalar_extract_sigq_tf): Likewise. (__builtin_vsx_scalar_insert_exp_qp_tf): Likewise. * config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin): Add support for having KFmode and TFmode variants of VSIEQPF. * config/rs6000/rs6000-overload.def (__builtin_vec_scalar_extract_exp): Add TFmode overloads. (__builtin_vec_scalar_extract_sig): Likewise. (__builtin_vec_scalar_insert_exp): Likewise. gcc/testsuite/ * gcc.target/powerpc/bfp/scalar-extract-exp-4.c: Update the expected error message. * gcc.target/powerpc/bfp/scalar-extract-sig-4.c: Likewise. * gcc.target/powerpc/bfp/scalar-insert-exp-10.c: Likewise. --- gcc/config/rs6000/rs6000-builtins.def | 26 ++++++++++++++----- gcc/config/rs6000/rs6000-c.cc | 10 ++++--- gcc/config/rs6000/rs6000-overload.def | 12 ++++++--- .../powerpc/bfp/scalar-extract-exp-4.c | 2 +- .../powerpc/bfp/scalar-extract-sig-4.c | 2 +- .../powerpc/bfp/scalar-insert-exp-10.c | 2 +- 6 files changed, 37 insertions(+), 17 deletions(-) diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def index 23fc4a5f108..2ac66b39975 100644 --- a/gcc/config/rs6000/rs6000-builtins.def +++ b/gcc/config/rs6000/rs6000-builtins.def @@ -2902,19 +2902,21 @@ fpmath double __builtin_truncf128_round_to_odd_kf (_Float128); TRUNCF128_ODD_KF trunckfdf2_odd {} - const signed long long __builtin_vsx_scalar_extract_expq (_Float128); - VSEEQP xsxexpqp_kf {} + const signed long long __builtin_vsx_scalar_extract_expq_kf (_Float128); + VSEEQP_KF xsxexpqp_kf {} - const signed __int128 __builtin_vsx_scalar_extract_sigq (_Float128); - VSESQP xsxsigqp_kf {} + const signed __int128 __builtin_vsx_scalar_extract_sigq_kf (_Float128); + VSESQP_KF xsxsigqp_kf {} +; Note we cannot overload this function since it does not have KFmode +; or TFmode arguments. const _Float128 __builtin_vsx_scalar_insert_exp_q (unsigned __int128, \ unsigned long long); VSIEQP xsiexpqp_kf {} - const _Float128 __builtin_vsx_scalar_insert_exp_qp (_Float128, \ - unsigned long long); - VSIEQPF xsiexpqpf_kf {} + const _Float128 __builtin_vsx_scalar_insert_exp_qp_kf (_Float128, \ + unsigned long long); + VSIEQPF_KF xsiexpqpf_kf {} const signed int __builtin_vsx_scalar_test_data_class_qp (_Float128, \ const int<7>); @@ -2968,6 +2970,16 @@ fpmath double __builtin_truncf128_round_to_odd_tf (long double); TRUNCF128_ODD_TF trunctfdf2_odd {ieeeld} + const signed long long __builtin_vsx_scalar_extract_expq_tf (long double); + VSEEQP_TF xsxexpqp_tf {ieeeld} + + const signed __int128 __builtin_vsx_scalar_extract_sigq_tf (long double); + VSESQP_TF xsxsigqp_tf {ieeeld} + + const long double __builtin_vsx_scalar_insert_exp_qp_tf (long double, \ + unsigned long long); + VSIEQPF_TF xsiexpqpf_tf {ieeeld} + ; Decimal floating-point builtins. [dfp] diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc index 0d13645040f..4532cb4624b 100644 --- a/gcc/config/rs6000/rs6000-c.cc +++ b/gcc/config/rs6000/rs6000-c.cc @@ -1935,11 +1935,13 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, 128-bit variant of built-in function. */ if (GET_MODE_PRECISION (arg1_mode) > 64) { - /* If first argument is of float variety, choose variant - that expects __ieee128 argument. Otherwise, expect - __int128 argument. */ + /* If first argument is of float variety, choose variant that + expects _Float128 argument (or long double if long doubles are + IEEE 128-bit). Otherwise, expect __int128 argument. */ if (GET_MODE_CLASS (arg1_mode) == MODE_FLOAT) - instance_code = RS6000_BIF_VSIEQPF; + instance_code = ((arg1_mode == TFmode) + ? RS6000_BIF_VSIEQPF_TF + : RS6000_BIF_VSIEQPF_KF); else instance_code = RS6000_BIF_VSIEQP; } diff --git a/gcc/config/rs6000/rs6000-overload.def b/gcc/config/rs6000/rs6000-overload.def index 511a3821d5b..546883ece19 100644 --- a/gcc/config/rs6000/rs6000-overload.def +++ b/gcc/config/rs6000/rs6000-overload.def @@ -4506,13 +4506,17 @@ unsigned int __builtin_vec_scalar_extract_exp (double); VSEEDP unsigned int __builtin_vec_scalar_extract_exp (_Float128); - VSEEQP + VSEEQP_KF + unsigned int __builtin_vec_scalar_extract_exp (long double); + VSEEQP_TF [VEC_VSES, scalar_extract_sig, __builtin_vec_scalar_extract_sig] unsigned long long __builtin_vec_scalar_extract_sig (double); VSESDP unsigned __int128 __builtin_vec_scalar_extract_sig (_Float128); - VSESQP + VSESQP_KF + unsigned __int128 __builtin_vec_scalar_extract_sig (long double); + VSESQP_TF [VEC_VSIE, scalar_insert_exp, __builtin_vec_scalar_insert_exp] double __builtin_vec_scalar_insert_exp (unsigned long long, unsigned long long); @@ -4522,7 +4526,9 @@ _Float128 __builtin_vec_scalar_insert_exp (unsigned __int128, unsigned long long); VSIEQP _Float128 __builtin_vec_scalar_insert_exp (_Float128, unsigned long long); - VSIEQPF + VSIEQPF_KF + long double __builtin_vec_scalar_insert_exp (long double, unsigned long long); + VSIEQPF_TF [VEC_VSTDC, scalar_test_data_class, __builtin_vec_scalar_test_data_class] unsigned int __builtin_vec_scalar_test_data_class (float, const int); diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-4.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-4.c index 850ff620490..14c6554f417 100644 --- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-4.c +++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-4.c @@ -11,7 +11,7 @@ get_exponent (__ieee128 *p) { __ieee128 source = *p; - return __builtin_vec_scalar_extract_exp (source); /* { dg-error "'__builtin_vsx_scalar_extract_expq' requires" } */ + return __builtin_vec_scalar_extract_exp (source); /* { dg-error "'__builtin_vsx_scalar_extract_expq.*' requires" } */ } diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-4.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-4.c index 32a53c6fffd..9800cf65017 100644 --- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-4.c +++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-4.c @@ -11,5 +11,5 @@ get_significand (__ieee128 *p) { __ieee128 source = *p; - return __builtin_vec_scalar_extract_sig (source); /* { dg-error "'__builtin_vsx_scalar_extract_sigq' requires" } */ + return __builtin_vec_scalar_extract_sig (source); /* { dg-error "'__builtin_vsx_scalar_extract_sigq.*' requires" } */ } diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-10.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-10.c index 769d3b0546a..4018c8fa08a 100644 --- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-10.c +++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-10.c @@ -13,5 +13,5 @@ insert_exponent (__ieee128 *significand_p, __ieee128 significand = *significand_p; unsigned long long int exponent = *exponent_p; - return __builtin_vec_scalar_insert_exp (significand, exponent); /* { dg-error "'__builtin_vsx_scalar_insert_exp_qp' requires" } */ + return __builtin_vec_scalar_insert_exp (significand, exponent); /* { dg-error "'__builtin_vsx_scalar_insert_exp_qp.*' requires" } */ }