From patchwork Thu Jul 28 04:50:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Meissner X-Patchwork-Id: 56382 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id C7E703857C7A for ; Thu, 28 Jul 2022 04:51:33 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org C7E703857C7A DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1658983893; bh=Jvy7a8wG8ouK2rZV200LUijNPeqkAKeCaKk7CEc9Va8=; h=Date:To:Subject:References:In-Reply-To:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To: From; b=X44MGABZBjMeQi0wa0v9yWsHuML9lt7hCnp6iG3ern0zyip/rjPInwdeNT1cjoBr0 MOt64B6WpkZiDC6xpjdpd9FDZ/1R0JLlLA0hh5f9hE7C8IW2vK5WxtqaSKuroLAhQA LbYMv6392+1KWRyeoUFWii2vsExZhwC14f9npwkQ= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by sourceware.org (Postfix) with ESMTPS id BAE1E3858295 for ; Thu, 28 Jul 2022 04:51:04 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org BAE1E3858295 Received: from pps.filterd (m0098410.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 26S4fs5m012489; Thu, 28 Jul 2022 04:51:04 GMT Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3hkknd0861-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 28 Jul 2022 04:51:03 +0000 Received: from m0098410.ppops.net (m0098410.ppops.net [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 26S4iK12022332; Thu, 28 Jul 2022 04:51:03 GMT Received: from ppma03wdc.us.ibm.com (ba.79.3fa9.ip4.static.sl-reverse.com [169.63.121.186]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3hkknd085e-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 28 Jul 2022 04:51:03 +0000 Received: from pps.filterd (ppma03wdc.us.ibm.com [127.0.0.1]) by ppma03wdc.us.ibm.com (8.16.1.2/8.16.1.2) with SMTP id 26S4K2g4017821; Thu, 28 Jul 2022 04:50:46 GMT Received: from b03cxnp08026.gho.boulder.ibm.com (b03cxnp08026.gho.boulder.ibm.com [9.17.130.18]) by ppma03wdc.us.ibm.com with ESMTP id 3hg97s5du6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 28 Jul 2022 04:50:46 +0000 Received: from b03ledav001.gho.boulder.ibm.com (b03ledav001.gho.boulder.ibm.com [9.17.130.232]) by b03cxnp08026.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 26S4ojdt34341174 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 28 Jul 2022 04:50:46 GMT Received: from b03ledav001.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DFE1F6E053; Thu, 28 Jul 2022 04:50:45 +0000 (GMT) Received: from b03ledav001.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 59B096E050; Thu, 28 Jul 2022 04:50:45 +0000 (GMT) Received: from toto.the-meissners.org (unknown [9.65.225.181]) by b03ledav001.gho.boulder.ibm.com (Postfix) with ESMTPS; Thu, 28 Jul 2022 04:50:45 +0000 (GMT) Date: Thu, 28 Jul 2022 00:50:43 -0400 To: Michael Meissner , gcc-patches@gcc.gnu.org, Segher Boessenkool , "Kewen.Lin" , David Edelsohn , Peter Bergner , Will Schmidt Subject: [PATCH 3/5] Support IEEE 128-bit overload comparison built-in functions. Message-ID: Mail-Followup-To: Michael Meissner , gcc-patches@gcc.gnu.org, Segher Boessenkool , "Kewen.Lin" , David Edelsohn , Peter Bergner , Will Schmidt References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: hht9esKKe9i4WLiDLQ1o0hyTnXJGYLH_ X-Proofpoint-GUID: aBKl5htNDSZAua7wBixxTA0x2gfDzbB1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-07-27_08,2022-07-27_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 priorityscore=1501 bulkscore=0 adultscore=0 mlxscore=0 clxscore=1015 spamscore=0 impostorscore=0 phishscore=0 suspectscore=0 lowpriorityscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2206140000 definitions=main-2207280019 X-Spam-Status: No, score=-10.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_MANYTO, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Michael Meissner via Gcc-patches From: Michael Meissner Reply-To: Michael Meissner Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" PATCH 3/5] Support IEEE 128-bit overload comparison built-in functions. This patch adds support for overloading the IEEE 128-bit comparison built-in functions bewteeen KFmode and TFmode arguments. I have tested these patches on a power10 that is running Fedora 36, which defaults to using long doubles that are IEEE 128-bit. I have built two parallel GCC compilers, one that defaults to using IEEE 128-bit long doubles and one that defaults to using IBM 128-bit long doubles. I have compared the test results to the original compiler results, comparing a modified GCC to the original compiler using an IEEE 128-bit long double default, and also comparing a modified GCC to the original compiler using an IBM 128-bit long double default. In both cases, the results are the same. I have also compared the compilers with the future patch in progress that does switch the internal type handling. Once those patches are installed, the overload mechanism will insure the correct built-in is used. Can I install this patch to the trunk, assuming I have installed the first two patches in the series? 2022-07-27 Michael Meissner gcc/ * config/rs6000/rs6000-builtins.def (__builtin_vsx_scalar_cmp_exp_qp_eq_kf): Rename KFmode comparison built-in functions to have a KF suffix to allow overloading. (__builtin_vsx_scalar_cmp_exp_qp_gt_kf): Likewise. (__builtin_vsx_scalar_cmp_exp_qp_lt_kf): Likewise. (__builtin_vsx_scalar_cmp_exp_qp_unordered_kf): Likewise. (__builtin_vsx_scalar_cmp_exp_qp_eq_tf): Add TFmode comparison built-in functions. (__builtin_vsx_scalar_cmp_exp_qp_gt_tf): Likewise. (__builtin_vsx_scalar_cmp_exp_qp_lt_tf): Likewise. (__builtin_vsx_scalar_cmp_exp_qp_unordered_tf): Likewise. * config/rs6000/rs6000-overload.def (__builtin_vec_scalar_cmp_exp_eq): Add TFmode overloaded functions. (__builtin_vec_scalar_cmp_exp_gt): Likewise. (__builtin_vec_scalar_cmp_exp_lt): Likewise. (__builtin_vec_scalar_cmp_exp_unordered): Likewise. --- gcc/config/rs6000/rs6000-builtins.def | 32 ++++++++++++++++++++------- gcc/config/rs6000/rs6000-overload.def | 16 ++++++++++---- 2 files changed, 36 insertions(+), 12 deletions(-) diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def index d72ff8cb7fe..23fc4a5f108 100644 --- a/gcc/config/rs6000/rs6000-builtins.def +++ b/gcc/config/rs6000/rs6000-builtins.def @@ -2880,18 +2880,18 @@ fpmath _Float128 __builtin_mulf128_round_to_odd_kf (_Float128, _Float128); MULF128_ODD_KF mulkf3_odd {} - const signed int __builtin_vsx_scalar_cmp_exp_qp_eq (_Float128, _Float128); - VSCEQPEQ xscmpexpqp_eq_kf {} + const signed int __builtin_vsx_scalar_cmp_exp_qp_eq_kf (_Float128, _Float128); + VSCEQPEQ_KF xscmpexpqp_eq_kf {} - const signed int __builtin_vsx_scalar_cmp_exp_qp_gt (_Float128, _Float128); - VSCEQPGT xscmpexpqp_gt_kf {} + const signed int __builtin_vsx_scalar_cmp_exp_qp_gt_kf (_Float128, _Float128); + VSCEQPGT_KF xscmpexpqp_gt_kf {} - const signed int __builtin_vsx_scalar_cmp_exp_qp_lt (_Float128, _Float128); - VSCEQPLT xscmpexpqp_lt_kf {} + const signed int __builtin_vsx_scalar_cmp_exp_qp_lt_kf (_Float128, _Float128); + VSCEQPLT_KF xscmpexpqp_lt_kf {} const signed int \ - __builtin_vsx_scalar_cmp_exp_qp_unordered (_Float128, _Float128); - VSCEQPUO xscmpexpqp_unordered_kf {} + __builtin_vsx_scalar_cmp_exp_qp_unordered_kf (_Float128, _Float128); + VSCEQPUO_KF xscmpexpqp_unordered_kf {} fpmath _Float128 __builtin_sqrtf128_round_to_odd_kf (_Float128); SQRTF128_ODD_KF sqrtkf2_odd {} @@ -2942,6 +2942,22 @@ long double); MULF128_ODD_TF multf3_odd {ieeeld} + const signed int __builtin_vsx_scalar_cmp_exp_qp_eq_tf (long double, \ + long double); + VSCEQPEQ_TF xscmpexpqp_eq_tf {ieeeld} + + const signed int __builtin_vsx_scalar_cmp_exp_qp_gt_tf (long double, \ + long double); + VSCEQPGT_TF xscmpexpqp_gt_kf {ieeeld} + + const signed int __builtin_vsx_scalar_cmp_exp_qp_lt_tf (long double, \ + long double); + VSCEQPLT_TF xscmpexpqp_lt_tf {ieeeld} + + const signed int \ + __builtin_vsx_scalar_cmp_exp_qp_unordered_tf (long double, long double); + VSCEQPUO_TF xscmpexpqp_unordered_tf {ieeeld} + fpmath long double __builtin_sqrtf128_round_to_odd_tf (long double); SQRTF128_ODD_TF sqrttf2_odd {ieeeld} diff --git a/gcc/config/rs6000/rs6000-overload.def b/gcc/config/rs6000/rs6000-overload.def index f406a16a882..511a3821d5b 100644 --- a/gcc/config/rs6000/rs6000-overload.def +++ b/gcc/config/rs6000/rs6000-overload.def @@ -4474,25 +4474,33 @@ signed int __builtin_vec_scalar_cmp_exp_eq (double, double); VSCEDPEQ signed int __builtin_vec_scalar_cmp_exp_eq (_Float128, _Float128); - VSCEQPEQ + VSCEQPEQ_KF + signed int __builtin_vec_scalar_cmp_exp_eq (long double, long double); + VSCEQPEQ_TF [VEC_VSCEGT, scalar_cmp_exp_gt, __builtin_vec_scalar_cmp_exp_gt] signed int __builtin_vec_scalar_cmp_exp_gt (double, double); VSCEDPGT signed int __builtin_vec_scalar_cmp_exp_gt (_Float128, _Float128); - VSCEQPGT + VSCEQPGT_KF + signed int __builtin_vec_scalar_cmp_exp_gt (long double, long double); + VSCEQPGT_TF [VEC_VSCELT, scalar_cmp_exp_lt, __builtin_vec_scalar_cmp_exp_lt] signed int __builtin_vec_scalar_cmp_exp_lt (double, double); VSCEDPLT signed int __builtin_vec_scalar_cmp_exp_lt (_Float128, _Float128); - VSCEQPLT + VSCEQPLT_KF + signed int __builtin_vec_scalar_cmp_exp_lt (long double, long double); + VSCEQPLT_TF [VEC_VSCEUO, scalar_cmp_exp_unordered, __builtin_vec_scalar_cmp_exp_unordered] signed int __builtin_vec_scalar_cmp_exp_unordered (double, double); VSCEDPUO signed int __builtin_vec_scalar_cmp_exp_unordered (_Float128, _Float128); - VSCEQPUO + VSCEQPUO_KF + signed int __builtin_vec_scalar_cmp_exp_unordered (long double, long double); + VSCEQPUO_TF [VEC_VSEE, scalar_extract_exp, __builtin_vec_scalar_extract_exp] unsigned int __builtin_vec_scalar_extract_exp (double);