From patchwork Wed Nov 29 19:57:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joern Rennecke X-Patchwork-Id: 80984 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 0009038708BB for ; Wed, 29 Nov 2023 19:57:46 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-pj1-x1033.google.com (mail-pj1-x1033.google.com [IPv6:2607:f8b0:4864:20::1033]) by sourceware.org (Postfix) with ESMTPS id 1C34C3858C2F for ; Wed, 29 Nov 2023 19:57:29 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 1C34C3858C2F Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=embecosm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=embecosm.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 1C34C3858C2F Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2607:f8b0:4864:20::1033 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1701287851; cv=none; b=UzZ0xzaaYenIlJRLzNyLgcaXbBBBcQZH6zY078VvgtLCra8RI5z95BZblzPWKe9kA9SQIKPceRGpi7INcq6EcZb4H35xjudXLg6MFWuhip+HC++KVmmsEmsZSJrLVoIZV/wrB7sQ+xggSj7hKxdxPu46Vvszn8s1M5r2RhhVONY= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1701287851; c=relaxed/simple; bh=l0p1ISnVWkNPwmTFgY6ttya8zew2rvarMy0VTVfLStI=; h=DKIM-Signature:MIME-Version:From:Date:Message-ID:Subject:To; b=UwIenOddYR4JiiCUciGyDtTBc335vutA6B3nF29c0Tx5XsiNXKYBaseVLJ0VlOpaPsxy+iofYUbwd3ixJY3UgiLJfg2N8g5q3iP/N5HRIh4RxfwLDGoyWQm6n6dr8T759A5X3dbibSqfNmzUXTdQyYp153Bxi8yJuF1xHlA3ajE= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-pj1-x1033.google.com with SMTP id 98e67ed59e1d1-28613d87c4cso149738a91.3 for ; Wed, 29 Nov 2023 11:57:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=embecosm.com; s=google; t=1701287848; x=1701892648; darn=gcc.gnu.org; h=to:subject:message-id:date:from:mime-version:from:to:cc:subject :date:message-id:reply-to; bh=LNZghiktQj2Eq+9nBMR+t5AZi76IPAUuGq+P/wZxmOw=; b=VMzhlxD5/JP/mOj1yv1V5/NwDCVaSfu6jkIqqPAjAT1PhM1dkVlNtzsRwJaFkcHQRs UMlU+ZR7gb5cFjXz7OE0/28vQfIJhPbs4EZH6ekCTVl2m0+eLeky1qJVje6eINsHN1Vb 3FmbteomAYrH9GXhAMOfA94pqcQ1dUJ2RkbxbQvQTYFgYjgxCKKIXyUEXBbO+wQW5ywA L1mQKS3+fnsO7fLPZKBbEdBiOXGwJ6tg8lfcNeJKB6oZ23mV8xB3MlLQsJS/ebPnnZ06 5FswOdh8vPuihHP0FOdFm8xQIm7L2iOGJmy/QLl6mSP1KPVrfPL6FqGYtOjDNne3pNGP Fs4w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1701287848; x=1701892648; h=to:subject:message-id:date:from:mime-version:x-gm-message-state :from:to:cc:subject:date:message-id:reply-to; bh=LNZghiktQj2Eq+9nBMR+t5AZi76IPAUuGq+P/wZxmOw=; b=HCzITSj5ETy64+iUzwM+ymesJd1kvWTLaZ+YXCrbVIostTm1Mq9SrsdG03Q1ywK33m eGkjGH3NcVMo3fY0a/q4veNuir0+F9cwf2lHzu3Sa6jIUefee1260BLYlb4YzYFAUe8t ro51cOZJ/rmLIwR4eYvvx9N+oFaninLn/igRqfHsIDgDFDJOTAMpeCKGUnWC4ljatgRp Kz+IXHV4rGb5+xveGH6+WLJZKJjf1wFz+wtxGDx3DIlzUncbP0MILIG7Oe6oW1eXuYT5 LIHelkNAyiGm9sJ5KxA/3QxAAcQYfRK9DijxpncD4kImDrxlLT9d+6c2wtr03BYdxIBD GDjA== X-Gm-Message-State: AOJu0Yy3cfPXVpc1NMdkQ6AEenHsCMYyBOmwth5nAowwAZ7zoBY63tlK yyoWcDHcmNBfKdnmjobDm4y+bvJHIgyr9kCQCTpyDA== X-Google-Smtp-Source: AGHT+IHfV7sTZjtRBmo8gw+lKz9thF55Urxze/gWUu4qI/fqK0QQ+sVCYA03Jh/0MdGrj7Lv0pf24nlI5Cv+bm6Eq9A= X-Received: by 2002:a17:90a:e7d1:b0:285:cc9c:7406 with SMTP id kb17-20020a17090ae7d100b00285cc9c7406mr12012199pjb.15.1701287847911; Wed, 29 Nov 2023 11:57:27 -0800 (PST) MIME-Version: 1.0 From: Joern Rennecke Date: Wed, 29 Nov 2023 19:57:16 +0000 Message-ID: Subject: [V2] New pass for sign/zero extension elimination -- not ready for "final" review To: Jivan Hakobyan , Jeff Law , GCC Patches X-Spam-Status: No, score=-9.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Attached is what I have for carry_backpropagate . The utility of special handling for SS_ASHIFT / US_ASHIFT seems somewhat marginal. I suspect it'd be more useful to add handling of LSHIFTRT and ASHIFTRT . Some ports do a lot of static shifting. commit ed47c3d0d38f85c9b4e22bdbd079e0665465ef9c Author: Joern Rennecke Date: Wed Nov 29 18:46:06 2023 +0000 * ext-dce.c: Fixes for carry handling. * ext-dce.c (safe_for_live_propagation): Handle MINUS. (ext_dce_process_uses): Break out carry handling into .. (carry_backpropagate): This new function. Better handling of ASHIFT. Add handling of SMUL_HIGHPART, UMUL_HIGHPART, SIGN_EXTEND, SS_ASHIFT and US_ASHIFT. diff --git a/gcc/ext-dce.cc b/gcc/ext-dce.cc index 590656f72c7..2a4508181a1 100644 --- a/gcc/ext-dce.cc +++ b/gcc/ext-dce.cc @@ -83,6 +83,7 @@ safe_for_live_propagation (rtx_code code) case SIGN_EXTEND: case TRUNCATE: case PLUS: + case MINUS: case MULT: case SMUL_HIGHPART: case UMUL_HIGHPART: @@ -365,6 +366,67 @@ binop_implies_op2_fully_live (rtx_code code) } } +/* X, with code CODE, is an operation for which +safe_for_live_propagation holds true, + and bits set in MASK are live in the result. Compute a make of (potentially) + live bits in the non-constant inputs. In case of +binop_implies_op2_fully_live + (e.g. shifts), the computed mask may exclusively pertain to the +first operand. */ + +HOST_WIDE_INT +carry_backpropagate (HOST_WIDE_INT mask, enum rtx_code code, rtx x) +{ + enum machine_mode mode = GET_MODE (x); + HOST_WIDE_INT mmask = GET_MODE_MASK (mode); + switch (code) + { + case ASHIFT: + if (CONSTANT_P (XEXP (x, 1)) + && known_lt (UINTVAL (XEXP (x, 1)), GET_MODE_BITSIZE (mode))) + return mask >> INTVAL (XEXP (x, 1)); + /* Fall through. */ + case PLUS: case MINUS: + case MULT: + return mask ? ((2ULL << floor_log2 (mask)) - 1) : 0; + case SMUL_HIGHPART: case UMUL_HIGHPART: + if (!mask || XEXP (x, 1) == const0_rtx) + return 0; + if (CONSTANT_P (XEXP (x, 1))) + { + if (pow2p_hwi (INTVAL (XEXP (x, 1)))) + return mmask & (mask << (GET_MODE_BITSIZE (mode).to_constant () + - exact_log2 (INTVAL (XEXP (x, 1))))); + + int bits = (2 * GET_MODE_BITSIZE (mode).to_constant () + - clz_hwi (mask) - ctz_hwi (INTVAL (XEXP (x, 1)))); + if (bits < GET_MODE_BITSIZE (mode).to_constant ()) + return (1ULL << bits) - 1; + } + return mmask; + case SIGN_EXTEND: + if (mask & ~mmask) + mask |= 1ULL << (GET_MODE_BITSIZE (mode).to_constant () - 1); + return mask; + + /* We propagate for the shifted operand, but not the shift + count. The count is handled specially. */ + case SS_ASHIFT: + case US_ASHIFT: + if (!mask || XEXP (x, 1) == const0_rtx) + return 0; + if (CONSTANT_P (XEXP (x, 1)) + && UINTVAL (XEXP (x, 1)) < GET_MODE_BITSIZE (mode).to_constant ()) + { + return ((mmask & ~((unsigned HOST_WIDE_INT)mmask + >> (INTVAL (XEXP (x, 1)) + (code == SS_ASHIFT)))) + | (mask >> INTVAL (XEXP (x, 1)))); + } + return mmask; + default: + return mask; + } +} /* Process uses in INSN contained in OBJ. Set appropriate bits in LIVENOW for any chunks of pseudos that become live, potentially filtering using bits from LIVE_TMP. @@ -480,11 +542,7 @@ ext_dce_process_uses (rtx_insn *insn, rtx obj, bitmap livenow, sure everything that should get marked as live is marked from here onward. */ - /* ?!? What is the point of this adjustment to DST_MASK? */ - if (code == PLUS || code == MINUS - || code == MULT || code == ASHIFT) - dst_mask - = dst_mask ? ((2ULL << floor_log2 (dst_mask)) - 1) : 0; + dst_mask = carry_backpropagate (dst_mask, code, src); /* We will handle the other operand of a binary operator at the bottom of the loop by resetting Y. */