From patchwork Mon May 29 14:38:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 70259 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 11DD73857359 for ; Mon, 29 May 2023 14:39:30 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 11DD73857359 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1685371170; bh=1ba4msOOG1wfHXJKtJ7pdB030RJyahtyRpjKYcV4pnk=; h=Date:Subject:To:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=lWwVKxv9Uc1p3kHAdT+kYbubGm/udHtSDdfq3+XnFr+J3lZ/IE5XtKF5jM+6mxPJM 0BzbgiL7p8FObbxgCsP0GK0wKMV6MV4T2IVHVrcqaBxa3r8ira7keHEO7SBxxA22Iv ixFz8W1+8cbtvt4Hn2zunorvl7KbNZOGHgFxEBTk= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-qv1-xf2d.google.com (mail-qv1-xf2d.google.com [IPv6:2607:f8b0:4864:20::f2d]) by sourceware.org (Postfix) with ESMTPS id 61EEE3858D32 for ; Mon, 29 May 2023 14:38:56 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 61EEE3858D32 Received: by mail-qv1-xf2d.google.com with SMTP id 6a1803df08f44-6261d4ea5f0so4982776d6.0 for ; Mon, 29 May 2023 07:38:56 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685371135; x=1687963135; h=to:subject:message-id:date:from:mime-version:x-gm-message-state :from:to:cc:subject:date:message-id:reply-to; bh=1ba4msOOG1wfHXJKtJ7pdB030RJyahtyRpjKYcV4pnk=; b=RadPbwks+mtK/HsJfI6az8DqpLqGIPIMizrSsyOGr8T0g2pLNdTvL+ELaSNOrCV63z Wz96b1+1NEv7+714F1qn8s/ZVL3sxHjCl+wOnqs6guFRIaY/CAe/jSOpBnfur6LeXw0Y kl6fMa/IhqwP0+8cieDPM9ydQnz7v2K4rKep+lVcT9vUiAduxEBJQKMOPBOkLh/1JPwh pMUEO24hwweQSmUGBDvFXgqf+kXNhjiL31bpfQXUo6DL8Dsq/GpDDlJj/UsWVaAENAmP DBxbwl1yPIpw1+tcUxuV3PQybjg6wb0wvR4oZHwzfCHqf2P778a4crZN8M12/L1+Bppd Lnkg== X-Gm-Message-State: AC+VfDy+QGi/xSfA9h392MAWzGoCCAA76e16nTLTYbmFN1ugIEE65Q34 uJo+tpwJBLnDRUumKBHj6Ix2Gl0f0BMA7qAN/cdSkbWuB+nwJA== X-Google-Smtp-Source: ACHHUZ5mo8+GYBZD4EVN9xdNE59GVlg0dHs2XpZI4ZPcLye35/IItD6Jv18vPcyURcy9GBR4G0ZR93AXCGvccaUae6Q= X-Received: by 2002:a05:6214:1ccd:b0:5ef:422c:be7f with SMTP id g13-20020a0562141ccd00b005ef422cbe7fmr8409240qvd.12.1685371135479; Mon, 29 May 2023 07:38:55 -0700 (PDT) MIME-Version: 1.0 Date: Mon, 29 May 2023 16:38:44 +0200 Message-ID: Subject: [PATCH] rtlanal: Change return type of predicate functions from int to bool To: "gcc-patches@gcc.gnu.org" X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_STOCKGEN, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Uros Bizjak via Gcc-patches From: Uros Bizjak Reply-To: Uros Bizjak Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" gcc/ChangeLog: * rtl.h (rtx_addr_can_trap_p): Change return type from int to bool. (rtx_unstable_p): Ditto. (reg_mentioned_p): Ditto. (reg_referenced_p): Ditto. (reg_used_between_p): Ditto. (reg_set_between_p): Ditto. (modified_between_p): Ditto. (no_labels_between_p): Ditto. (modified_in_p): Ditto. (reg_set_p): Ditto. (multiple_sets): Ditto. (set_noop_p): Ditto. (noop_move_p): Ditto. (reg_overlap_mentioned_p): Ditto. (dead_or_set_p): Ditto. (dead_or_set_regno_p): Ditto. (find_reg_fusage): Ditto. (find_regno_fusage): Ditto. (side_effects_p): Ditto. (volatile_refs_p): Ditto. (volatile_insn_p): Ditto. (may_trap_p_1): Ditto. (may_trap_p): Ditto. (may_trap_or_fault_p): Ditto. (computed_jump_p): Ditto. (auto_inc_p): Ditto. (loc_mentioned_in_p): Ditto. * rtlanal.cc (computed_jump_p_1): Adjust forward declaration. (rtx_unstable_p): Change return type from int to bool and adjust function body accordingly. (rtx_addr_can_trap_p): Ditto. (reg_mentioned_p): Ditto. (no_labels_between_p): Ditto. (reg_used_between_p): Ditto. (reg_referenced_p): Ditto. (reg_set_between_p): Ditto. (reg_set_p): Ditto. (modified_between_p): Ditto. (modified_in_p): Ditto. (multiple_sets): Ditto. (set_noop_p): Ditto. (noop_move_p): Ditto. (reg_overlap_mentioned_p): Ditto. (dead_or_set_p): Ditto. (dead_or_set_regno_p): Ditto. (find_reg_fusage): Ditto. (find_regno_fusage): Ditto. (remove_node_from_insn_list): Ditto. (volatile_insn_p): Ditto. (volatile_refs_p): Ditto. (side_effects_p): Ditto. (may_trap_p_1): Ditto. (may_trap_p): Ditto. (may_trap_or_fault_p): Ditto. (computed_jump_p): Ditto. (auto_inc_p): Ditto. (loc_mentioned_in_p): Ditto. * combine.cc (can_combine_p): Update indirect function. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. OK for master? Uros. diff --git a/gcc/combine.cc b/gcc/combine.cc index a23caeed96f..304c020ec79 100644 --- a/gcc/combine.cc +++ b/gcc/combine.cc @@ -1735,7 +1735,7 @@ can_combine_p (rtx_insn *insn, rtx_insn *i3, rtx_insn *pred ATTRIBUTE_UNUSED, rtx_insn *p; rtx link; bool all_adjacent = true; - int (*is_volatile_p) (const_rtx); + bool (*is_volatile_p) (const_rtx); if (succ) { diff --git a/gcc/rtl.h b/gcc/rtl.h index 364782b6060..4041207efd9 100644 --- a/gcc/rtl.h +++ b/gcc/rtl.h @@ -3612,9 +3612,9 @@ inline rtx single_set (const rtx_insn *insn) } extern scalar_int_mode get_address_mode (rtx mem); -extern int rtx_addr_can_trap_p (const_rtx); +extern bool rtx_addr_can_trap_p (const_rtx); extern bool nonzero_address_p (const_rtx); -extern int rtx_unstable_p (const_rtx); +extern bool rtx_unstable_p (const_rtx); extern bool rtx_varies_p (const_rtx, bool); extern bool rtx_addr_varies_p (const_rtx, bool); extern rtx get_call_rtx_from (const rtx_insn *); @@ -3626,22 +3626,22 @@ extern void split_const (rtx, rtx *, rtx *); extern rtx strip_offset (rtx, poly_int64_pod *); extern poly_int64 get_args_size (const_rtx); extern bool unsigned_reg_p (rtx); -extern int reg_mentioned_p (const_rtx, const_rtx); +extern bool reg_mentioned_p (const_rtx, const_rtx); extern int count_occurrences (const_rtx, const_rtx, int); -extern int reg_referenced_p (const_rtx, const_rtx); -extern int reg_used_between_p (const_rtx, const rtx_insn *, const rtx_insn *); -extern int reg_set_between_p (const_rtx, const rtx_insn *, const rtx_insn *); +extern bool reg_referenced_p (const_rtx, const_rtx); +extern bool reg_used_between_p (const_rtx, const rtx_insn *, const rtx_insn *); +extern bool reg_set_between_p (const_rtx, const rtx_insn *, const rtx_insn *); extern int commutative_operand_precedence (rtx); extern bool swap_commutative_operands_p (rtx, rtx); -extern int modified_between_p (const_rtx, const rtx_insn *, const rtx_insn *); -extern int no_labels_between_p (const rtx_insn *, const rtx_insn *); -extern int modified_in_p (const_rtx, const_rtx); -extern int reg_set_p (const_rtx, const_rtx); -extern int multiple_sets (const_rtx); -extern int set_noop_p (const_rtx); -extern int noop_move_p (const rtx_insn *); +extern bool modified_between_p (const_rtx, const rtx_insn *, const rtx_insn *); +extern bool no_labels_between_p (const rtx_insn *, const rtx_insn *); +extern bool modified_in_p (const_rtx, const_rtx); +extern bool reg_set_p (const_rtx, const_rtx); +extern bool multiple_sets (const_rtx); +extern bool set_noop_p (const_rtx); +extern bool noop_move_p (const rtx_insn *); extern bool refers_to_regno_p (unsigned int, unsigned int, const_rtx, rtx *); -extern int reg_overlap_mentioned_p (const_rtx, const_rtx); +extern bool reg_overlap_mentioned_p (const_rtx, const_rtx); extern const_rtx set_of (const_rtx, const_rtx); extern void record_hard_reg_sets (rtx, const_rtx, void *); extern void record_hard_reg_uses (rtx *, void *); @@ -3652,14 +3652,14 @@ extern void note_pattern_stores (const_rtx, extern void note_stores (const rtx_insn *, void (*) (rtx, const_rtx, void *), void *); extern void note_uses (rtx *, void (*) (rtx *, void *), void *); -extern int dead_or_set_p (const rtx_insn *, const_rtx); -extern int dead_or_set_regno_p (const rtx_insn *, unsigned int); +extern bool dead_or_set_p (const rtx_insn *, const_rtx); +extern bool dead_or_set_regno_p (const rtx_insn *, unsigned int); extern rtx find_reg_note (const_rtx, enum reg_note, const_rtx); extern rtx find_regno_note (const_rtx, enum reg_note, unsigned int); extern rtx find_reg_equal_equiv_note (const_rtx); extern rtx find_constant_src (const rtx_insn *); -extern int find_reg_fusage (const_rtx, enum rtx_code, const_rtx); -extern int find_regno_fusage (const_rtx, enum rtx_code, unsigned int); +extern bool find_reg_fusage (const_rtx, enum rtx_code, const_rtx); +extern bool find_regno_fusage (const_rtx, enum rtx_code, unsigned int); extern rtx alloc_reg_note (enum reg_note, rtx, rtx); extern void add_reg_note (rtx, enum reg_note, rtx); extern void add_int_reg_note (rtx_insn *, enum reg_note, int); @@ -3669,12 +3669,12 @@ extern rtx duplicate_reg_note (rtx); extern void remove_note (rtx_insn *, const_rtx); extern bool remove_reg_equal_equiv_notes (rtx_insn *, bool = false); extern void remove_reg_equal_equiv_notes_for_regno (unsigned int); -extern int side_effects_p (const_rtx); -extern int volatile_refs_p (const_rtx); -extern int volatile_insn_p (const_rtx); -extern int may_trap_p_1 (const_rtx, unsigned); -extern int may_trap_p (const_rtx); -extern int may_trap_or_fault_p (const_rtx); +extern bool side_effects_p (const_rtx); +extern bool volatile_refs_p (const_rtx); +extern bool volatile_insn_p (const_rtx); +extern bool may_trap_p_1 (const_rtx, unsigned); +extern bool may_trap_p (const_rtx); +extern bool may_trap_or_fault_p (const_rtx); extern bool can_throw_internal (const_rtx); extern bool can_throw_external (const_rtx); extern bool insn_could_throw_p (const_rtx); @@ -3688,7 +3688,7 @@ extern void replace_label_in_insn (rtx_insn *, rtx_insn *, rtx_insn *, bool); extern bool rtx_referenced_p (const_rtx, const_rtx); extern bool tablejump_p (const rtx_insn *, rtx_insn **, rtx_jump_table_data **); extern rtx tablejump_casesi_pattern (const rtx_insn *insn); -extern int computed_jump_p (const rtx_insn *); +extern bool computed_jump_p (const rtx_insn *); extern bool tls_referenced_p (const_rtx); extern bool contains_mem_rtx_p (rtx x); extern bool register_asm_p (const_rtx); @@ -3721,10 +3721,10 @@ extern unsigned hash_rtx_cb (const_rtx, machine_mode, int *, int *, bool, hash_rtx_callback_function); extern rtx regno_use_in (unsigned int, rtx); -extern int auto_inc_p (const_rtx); +extern bool auto_inc_p (const_rtx); extern bool in_insn_list_p (const rtx_insn_list *, const rtx_insn *); extern void remove_node_from_insn_list (const rtx_insn *, rtx_insn_list **); -extern int loc_mentioned_in_p (rtx *, const_rtx); +extern bool loc_mentioned_in_p (rtx *, const_rtx); extern rtx_insn *find_first_parameter_load (rtx_insn *, rtx_insn *); extern bool keep_with_call_p (const rtx_insn *); extern bool label_is_jump_target_p (const_rtx, const rtx_insn *); diff --git a/gcc/rtlanal.cc b/gcc/rtlanal.cc index b7948ecfad1..31707f3b90a 100644 --- a/gcc/rtlanal.cc +++ b/gcc/rtlanal.cc @@ -43,7 +43,7 @@ along with GCC; see the file COPYING3. If not see static void set_of_1 (rtx, const_rtx, void *); static bool covers_regno_p (const_rtx, unsigned int); static bool covers_regno_no_parallel_p (const_rtx, unsigned int); -static int computed_jump_p_1 (const_rtx); +static bool computed_jump_p_1 (const_rtx); static void parms_set (rtx, const_rtx, void *); static unsigned HOST_WIDE_INT cached_nonzero_bits (const_rtx, scalar_int_mode, @@ -197,12 +197,12 @@ template class generic_subrtx_iterator ; template class generic_subrtx_iterator ; template class generic_subrtx_iterator ; -/* Return 1 if the value of X is unstable +/* Return true if the value of X is unstable (would be different at a different point in the program). The frame pointer, arg pointer, etc. are considered stable (within one function) and so is anything marked `unchanging'. */ -int +bool rtx_unstable_p (const_rtx x) { const RTX_CODE code = GET_CODE (x); @@ -218,24 +218,24 @@ rtx_unstable_p (const_rtx x) CASE_CONST_ANY: case SYMBOL_REF: case LABEL_REF: - return 0; + return false; case REG: /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */ if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx /* The arg pointer varies if it is not a fixed register. */ || (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])) - return 0; + return false; /* ??? When call-clobbered, the value is stable modulo the restore that must happen after a call. This currently screws up local-alloc into believing that the restore is not needed. */ if (!PIC_OFFSET_TABLE_REG_CALL_CLOBBERED && x == pic_offset_table_rtx) - return 0; - return 1; + return false; + return true; case ASM_OPERANDS: if (MEM_VOLATILE_P (x)) - return 1; + return true; /* Fall through. */ @@ -248,21 +248,21 @@ rtx_unstable_p (const_rtx x) if (fmt[i] == 'e') { if (rtx_unstable_p (XEXP (x, i))) - return 1; + return true; } else if (fmt[i] == 'E') { int j; for (j = 0; j < XVECLEN (x, i); j++) if (rtx_unstable_p (XVECEXP (x, i, j))) - return 1; + return true; } - return 0; + return false; } -/* Return 1 if X has a value that can vary even between two - executions of the program. 0 means X can be compared reliably +/* Return true if X has a value that can vary even between two + executions of the program. false means X can be compared reliably against certain constants or near-constants. FOR_ALIAS is nonzero if we are called from alias analysis; if it is zero, we are slightly more conservative. @@ -276,7 +276,7 @@ rtx_varies_p (const_rtx x, bool for_alias) const char *fmt; if (!x) - return 0; + return false; code = GET_CODE (x); switch (code) @@ -288,7 +288,7 @@ rtx_varies_p (const_rtx x, bool for_alias) CASE_CONST_ANY: case SYMBOL_REF: case LABEL_REF: - return 0; + return false; case REG: /* Note that we have to test for the actual rtx used for the frame @@ -298,15 +298,15 @@ rtx_varies_p (const_rtx x, bool for_alias) if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx /* The arg pointer varies if it is not a fixed register. */ || (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])) - return 0; + return false; if (x == pic_offset_table_rtx /* ??? When call-clobbered, the value is stable modulo the restore that must happen after a call. This currently screws up local-alloc into believing that the restore is not needed, so we must return 0 only if we are called from alias analysis. */ && (!PIC_OFFSET_TABLE_REG_CALL_CLOBBERED || for_alias)) - return 0; - return 1; + return false; + return true; case LO_SUM: /* The operand 0 of a LO_SUM is considered constant @@ -317,7 +317,7 @@ rtx_varies_p (const_rtx x, bool for_alias) case ASM_OPERANDS: if (MEM_VOLATILE_P (x)) - return 1; + return true; /* Fall through. */ @@ -330,17 +330,17 @@ rtx_varies_p (const_rtx x, bool for_alias) if (fmt[i] == 'e') { if (rtx_varies_p (XEXP (x, i), for_alias)) - return 1; + return true; } else if (fmt[i] == 'E') { int j; for (j = 0; j < XVECLEN (x, i); j++) if (rtx_varies_p (XVECEXP (x, i, j), for_alias)) - return 1; + return true; } - return 0; + return false; } /* Compute an approximation for the offset between the register @@ -454,12 +454,12 @@ get_initial_register_offset (int from, int to) return 0; } -/* Return nonzero if the use of X+OFFSET as an address in a MEM with SIZE +/* Return true if the use of X+OFFSET as an address in a MEM with SIZE bytes can cause a trap. MODE is the mode of the MEM (not that of X) and - UNALIGNED_MEMS controls whether nonzero is returned for unaligned memory + UNALIGNED_MEMS controls whether true is returned for unaligned memory references on strict alignment machines. */ -static int +static bool rtx_addr_can_trap_p_1 (const_rtx x, poly_int64 offset, poly_int64 size, machine_mode mode, bool unaligned_mems) { @@ -488,21 +488,21 @@ rtx_addr_can_trap_p_1 (const_rtx x, poly_int64 offset, poly_int64 size, #endif if (!multiple_p (actual_offset, GET_MODE_SIZE (mode))) - return 1; + return true; } switch (code) { case SYMBOL_REF: if (SYMBOL_REF_WEAK (x)) - return 1; + return true; if (!CONSTANT_POOL_ADDRESS_P (x) && !SYMBOL_REF_FUNCTION_P (x)) { tree decl; poly_int64 decl_size; if (maybe_lt (offset, 0)) - return 1; + return true; if (!known_size_p (size)) return maybe_ne (offset, 0); @@ -531,10 +531,10 @@ rtx_addr_can_trap_p_1 (const_rtx x, poly_int64 offset, poly_int64 size, : !known_subrange_p (offset, size, 0, decl_size)); } - return 0; + return false; case LABEL_REF: - return 0; + return false; case REG: /* Stack references are assumed not to trap, but we need to deal with @@ -553,7 +553,7 @@ rtx_addr_can_trap_p_1 (const_rtx x, poly_int64 offset, poly_int64 size, poly_int64 low_bound, high_bound; if (!known_size_p (size)) - return 1; + return true; if (x == frame_pointer_rtx) { @@ -639,13 +639,13 @@ rtx_addr_can_trap_p_1 (const_rtx x, poly_int64 offset, poly_int64 size, if (known_ge (offset, low_bound) && known_le (offset, high_bound - size)) - return 0; - return 1; + return false; + return true; } /* All of the virtual frame registers are stack references. */ if (VIRTUAL_REGISTER_P (x)) - return 0; - return 1; + return false; + return true; case CONST: return rtx_addr_can_trap_p_1 (XEXP (x, 0), offset, size, @@ -658,15 +658,15 @@ rtx_addr_can_trap_p_1 (const_rtx x, poly_int64 offset, poly_int64 size, && GET_CODE (XEXP (x, 1)) == CONST && GET_CODE (XEXP (XEXP (x, 1), 0)) == UNSPEC && known_eq (offset, 0)) - return 0; + return false; /* - or it is an address that can't trap plus a constant integer. */ if (poly_int_rtx_p (XEXP (x, 1), &const_x1) && !rtx_addr_can_trap_p_1 (XEXP (x, 0), offset + const_x1, size, mode, unaligned_mems)) - return 0; + return false; - return 1; + return true; case LO_SUM: case PRE_MODIFY: @@ -686,12 +686,12 @@ rtx_addr_can_trap_p_1 (const_rtx x, poly_int64 offset, poly_int64 size, } /* If it isn't one of the case above, it can cause a trap. */ - return 1; + return true; } -/* Return nonzero if the use of X as an address in a MEM can cause a trap. */ +/* Return true if the use of X as an address in a MEM can cause a trap. */ -int +bool rtx_addr_can_trap_p (const_rtx x) { return rtx_addr_can_trap_p_1 (x, 0, -1, BLKmode, false); @@ -776,7 +776,7 @@ nonzero_address_p (const_rtx x) return false; } -/* Return 1 if X refers to a memory location whose address +/* Return true if X refers to a memory location whose address cannot be compared reliably with constant addresses, or if X refers to a BLKmode memory object. FOR_ALIAS is nonzero if we are called from alias analysis; if it is @@ -790,7 +790,7 @@ rtx_addr_varies_p (const_rtx x, bool for_alias) const char *fmt; if (x == 0) - return 0; + return false; code = GET_CODE (x); if (code == MEM) @@ -801,16 +801,16 @@ rtx_addr_varies_p (const_rtx x, bool for_alias) if (fmt[i] == 'e') { if (rtx_addr_varies_p (XEXP (x, i), for_alias)) - return 1; + return true; } else if (fmt[i] == 'E') { int j; for (j = 0; j < XVECLEN (x, i); j++) if (rtx_addr_varies_p (XVECEXP (x, i, j), for_alias)) - return 1; + return true; } - return 0; + return false; } /* Return the CALL in X if there is one. */ @@ -1056,11 +1056,11 @@ unsigned_reg_p (rtx op) } -/* Nonzero if register REG appears somewhere within IN. +/* Return true if register REG appears somewhere within IN. Also works if REG is not a register; in this case it checks for a subexpression of IN that is Lisp "equal" to REG. */ -int +bool reg_mentioned_p (const_rtx reg, const_rtx in) { const char *fmt; @@ -1068,10 +1068,10 @@ reg_mentioned_p (const_rtx reg, const_rtx in) enum rtx_code code; if (in == 0) - return 0; + return false; if (reg == in) - return 1; + return true; if (GET_CODE (in) == LABEL_REF) return reg == label_ref_label (in); @@ -1088,18 +1088,18 @@ reg_mentioned_p (const_rtx reg, const_rtx in) and are unique. */ case SCRATCH: case PC: - return 0; + return false; CASE_CONST_ANY: /* These are kept unique for a given value. */ - return 0; + return false; default: break; } if (GET_CODE (reg) == code && rtx_equal_p (reg, in)) - return 1; + return true; fmt = GET_RTX_FORMAT (code); @@ -1110,55 +1110,55 @@ reg_mentioned_p (const_rtx reg, const_rtx in) int j; for (j = XVECLEN (in, i) - 1; j >= 0; j--) if (reg_mentioned_p (reg, XVECEXP (in, i, j))) - return 1; + return true; } else if (fmt[i] == 'e' && reg_mentioned_p (reg, XEXP (in, i))) - return 1; + return true; } - return 0; + return false; } -/* Return 1 if in between BEG and END, exclusive of BEG and END, there is +/* Return true if in between BEG and END, exclusive of BEG and END, there is no CODE_LABEL insn. */ -int +bool no_labels_between_p (const rtx_insn *beg, const rtx_insn *end) { rtx_insn *p; if (beg == end) - return 0; + return false; for (p = NEXT_INSN (beg); p != end; p = NEXT_INSN (p)) if (LABEL_P (p)) - return 0; - return 1; + return false; + return true; } -/* Nonzero if register REG is used in an insn between +/* Return true if register REG is used in an insn between FROM_INSN and TO_INSN (exclusive of those two). */ -int +bool reg_used_between_p (const_rtx reg, const rtx_insn *from_insn, const rtx_insn *to_insn) { rtx_insn *insn; if (from_insn == to_insn) - return 0; + return false; for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn)) if (NONDEBUG_INSN_P (insn) && (reg_overlap_mentioned_p (reg, PATTERN (insn)) || (CALL_P (insn) && find_reg_fusage (insn, USE, reg)))) - return 1; - return 0; + return true; + return false; } -/* Nonzero if the old value of X, a register, is referenced in BODY. If X +/* Return true if the old value of X, a register, is referenced in BODY. If X is entirely replaced by a new value and the only use is as a SET_DEST, we do not consider it a reference. */ -int +bool reg_referenced_p (const_rtx x, const_rtx body) { int i; @@ -1167,7 +1167,7 @@ reg_referenced_p (const_rtx x, const_rtx body) { case SET: if (reg_overlap_mentioned_p (x, SET_SRC (body))) - return 1; + return true; /* If the destination is anything other than PC, a REG or a SUBREG of a REG that occupies all of the REG, the insn references X if @@ -1178,14 +1178,14 @@ reg_referenced_p (const_rtx x, const_rtx body) && REG_P (SUBREG_REG (SET_DEST (body))) && !read_modify_subreg_p (SET_DEST (body))) && reg_overlap_mentioned_p (x, SET_DEST (body))) - return 1; - return 0; + return true; + return false; case ASM_OPERANDS: for (i = ASM_OPERANDS_INPUT_LENGTH (body) - 1; i >= 0; i--) if (reg_overlap_mentioned_p (x, ASM_OPERANDS_INPUT (body, i))) - return 1; - return 0; + return true; + return false; case CALL: case USE: @@ -1202,52 +1202,52 @@ reg_referenced_p (const_rtx x, const_rtx body) case UNSPEC_VOLATILE: for (i = XVECLEN (body, 0) - 1; i >= 0; i--) if (reg_overlap_mentioned_p (x, XVECEXP (body, 0, i))) - return 1; - return 0; + return true; + return false; case PARALLEL: for (i = XVECLEN (body, 0) - 1; i >= 0; i--) if (reg_referenced_p (x, XVECEXP (body, 0, i))) - return 1; - return 0; + return true; + return false; case CLOBBER: if (MEM_P (XEXP (body, 0))) if (reg_overlap_mentioned_p (x, XEXP (XEXP (body, 0), 0))) - return 1; - return 0; + return true; + return false; case COND_EXEC: if (reg_overlap_mentioned_p (x, COND_EXEC_TEST (body))) - return 1; + return true; return reg_referenced_p (x, COND_EXEC_CODE (body)); default: - return 0; + return false; } } -/* Nonzero if register REG is set or clobbered in an insn between +/* Return true if register REG is set or clobbered in an insn between FROM_INSN and TO_INSN (exclusive of those two). */ -int +bool reg_set_between_p (const_rtx reg, const rtx_insn *from_insn, const rtx_insn *to_insn) { const rtx_insn *insn; if (from_insn == to_insn) - return 0; + return false; for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn)) if (INSN_P (insn) && reg_set_p (reg, insn)) - return 1; - return 0; + return true; + return false; } /* Return true if REG is set or clobbered inside INSN. */ -int +bool reg_set_p (const_rtx reg, const_rtx insn) { /* After delay slot handling, call and branch insns might be in a @@ -1295,11 +1295,11 @@ reg_set_p (const_rtx reg, const_rtx insn) return set_of (reg, insn) != NULL_RTX; } -/* Similar to reg_set_between_p, but check all registers in X. Return 0 - only if none of them are modified between START and END. Return 1 if +/* Similar to reg_set_between_p, but check all registers in X. Return false + only if none of them are modified between START and END. Return true if X contains a MEM; this routine does use memory aliasing. */ -int +bool modified_between_p (const_rtx x, const rtx_insn *start, const rtx_insn *end) { const enum rtx_code code = GET_CODE (x); @@ -1308,7 +1308,7 @@ modified_between_p (const_rtx x, const rtx_insn *start, const rtx_insn *end) rtx_insn *insn; if (start == end) - return 0; + return false; switch (code) { @@ -1316,20 +1316,20 @@ modified_between_p (const_rtx x, const rtx_insn *start, const rtx_insn *end) case CONST: case SYMBOL_REF: case LABEL_REF: - return 0; + return false; case PC: - return 1; + return true; case MEM: if (modified_between_p (XEXP (x, 0), start, end)) - return 1; + return true; if (MEM_READONLY_P (x)) - return 0; + return false; for (insn = NEXT_INSN (start); insn != end; insn = NEXT_INSN (insn)) if (memory_modified_in_insn_p (x, insn)) - return 1; - return 0; + return true; + return false; case REG: return reg_set_between_p (x, start, end); @@ -1342,22 +1342,22 @@ modified_between_p (const_rtx x, const rtx_insn *start, const rtx_insn *end) for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) { if (fmt[i] == 'e' && modified_between_p (XEXP (x, i), start, end)) - return 1; + return true; else if (fmt[i] == 'E') for (j = XVECLEN (x, i) - 1; j >= 0; j--) if (modified_between_p (XVECEXP (x, i, j), start, end)) - return 1; + return true; } - return 0; + return false; } -/* Similar to reg_set_p, but check all registers in X. Return 0 only if none - of them are modified in INSN. Return 1 if X contains a MEM; this routine - does use memory aliasing. */ +/* Similar to reg_set_p, but check all registers in X. Return false only if + none of them are modified in INSN. Return true if X contains a MEM; this + routine does use memory aliasing. */ -int +bool modified_in_p (const_rtx x, const_rtx insn) { const enum rtx_code code = GET_CODE (x); @@ -1370,19 +1370,19 @@ modified_in_p (const_rtx x, const_rtx insn) case CONST: case SYMBOL_REF: case LABEL_REF: - return 0; + return false; case PC: - return 1; + return true; case MEM: if (modified_in_p (XEXP (x, 0), insn)) - return 1; + return true; if (MEM_READONLY_P (x)) - return 0; + return false; if (memory_modified_in_insn_p (x, insn)) - return 1; - return 0; + return true; + return false; case REG: return reg_set_p (x, insn); @@ -1395,15 +1395,15 @@ modified_in_p (const_rtx x, const_rtx insn) for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) { if (fmt[i] == 'e' && modified_in_p (XEXP (x, i), insn)) - return 1; + return true; else if (fmt[i] == 'E') for (j = XVECLEN (x, i) - 1; j >= 0; j--) if (modified_in_p (XVECEXP (x, i, j), insn)) - return 1; + return true; } - return 0; + return false; } /* Return true if X is a SUBREG and if storing a value to X would @@ -1593,48 +1593,48 @@ single_set_2 (const rtx_insn *insn, const_rtx pat) return set; } -/* Given an INSN, return nonzero if it has more than one SET, else return - zero. */ +/* Given an INSN, return true if it has more than one SET, else return + false. */ -int +bool multiple_sets (const_rtx insn) { - int found; + bool found; int i; /* INSN must be an insn. */ if (! INSN_P (insn)) - return 0; + return false; /* Only a PARALLEL can have multiple SETs. */ if (GET_CODE (PATTERN (insn)) == PARALLEL) { - for (i = 0, found = 0; i < XVECLEN (PATTERN (insn), 0); i++) + for (i = 0, found = false; i < XVECLEN (PATTERN (insn), 0); i++) if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET) { /* If we have already found a SET, then return now. */ if (found) - return 1; + return true; else - found = 1; + found = true; } } /* Either zero or one SET. */ - return 0; + return false; } -/* Return nonzero if the destination of SET equals the source +/* Return true if the destination of SET equals the source and there are no side effects. */ -int +bool set_noop_p (const_rtx set) { rtx src = SET_SRC (set); rtx dst = SET_DEST (set); if (dst == pc_rtx && src == pc_rtx) - return 1; + return true; if (MEM_P (dst) && MEM_P (src)) return rtx_equal_p (dst, src) && !side_effects_p (dst); @@ -1650,13 +1650,13 @@ set_noop_p (const_rtx set) if (GET_CODE (src) == SUBREG && GET_CODE (dst) == SUBREG) { if (maybe_ne (SUBREG_BYTE (src), SUBREG_BYTE (dst))) - return 0; + return false; src = SUBREG_REG (src); dst = SUBREG_REG (dst); if (GET_MODE (src) != GET_MODE (dst)) /* It is hard to tell whether subregs refer to the same bits, so act - conservatively and return 0. */ - return 0; + conservatively and return false. */ + return false; } /* It is a NOOP if destination overlaps with selected src vector @@ -1671,7 +1671,7 @@ set_noop_p (const_rtx set) rtx src0 = XEXP (src, 0); poly_int64 c0; if (!poly_int_rtx_p (XVECEXP (par, 0, 0), &c0)) - return 0; + return false; poly_int64 offset = GET_MODE_UNIT_SIZE (GET_MODE (src0)) * c0; for (i = 1; i < XVECLEN (par, 0); i++) @@ -1679,7 +1679,7 @@ set_noop_p (const_rtx set) poly_int64 c0i; if (!poly_int_rtx_p (XVECEXP (par, 0, i), &c0i) || maybe_ne (c0i, c0 + i)) - return 0; + return false; } return REG_CAN_CHANGE_MODE_P (REGNO (dst), GET_MODE (src0), GET_MODE (dst)) @@ -1691,23 +1691,23 @@ set_noop_p (const_rtx set) && REGNO (src) == REGNO (dst)); } -/* Return nonzero if an insn consists only of SETs, each of which only sets a +/* Return true if an insn consists only of SETs, each of which only sets a value to itself. */ -int +bool noop_move_p (const rtx_insn *insn) { rtx pat = PATTERN (insn); if (INSN_CODE (insn) == NOOP_MOVE_INSN_CODE) - return 1; + return true; /* Check the code to be executed for COND_EXEC. */ if (GET_CODE (pat) == COND_EXEC) pat = COND_EXEC_CODE (pat); if (GET_CODE (pat) == SET && set_noop_p (pat)) - return 1; + return true; if (GET_CODE (pat) == PARALLEL) { @@ -1722,16 +1722,16 @@ noop_move_p (const rtx_insn *insn) continue; if (GET_CODE (tem) != SET || ! set_noop_p (tem)) - return 0; + return false; } - return 1; + return true; } - return 0; + return false; } -/* Return nonzero if register in range [REGNO, ENDREGNO) +/* Return true if register in range [REGNO, ENDREGNO) appears either explicitly or implicitly in X other than being stored into. @@ -1840,13 +1840,13 @@ refers_to_regno_p (unsigned int regno, unsigned int endregno, const_rtx x, return false; } -/* Nonzero if modifying X will affect IN. If X is a register or a SUBREG, +/* Rreturn true if modifying X will affect IN. If X is a register or a SUBREG, we check if any register number in X conflicts with the relevant register - numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN - contains a MEM (we don't bother checking for memory addresses that can't + numbers. If X is a constant, return false. If X is a MEM, return true iff + IN contains a MEM (we don't bother checking for memory addresses that can't conflict because we expect this to be a rare case. */ -int +bool reg_overlap_mentioned_p (const_rtx x, const_rtx in) { unsigned int regno, endregno; @@ -1855,7 +1855,7 @@ reg_overlap_mentioned_p (const_rtx x, const_rtx in) affect IN. Here we look at IN, we can profitably combine CONSTANT_P (x) with the switch statement below. */ if (CONSTANT_P (in)) - return 0; + return false; recurse: switch (GET_CODE (x)) @@ -1888,24 +1888,24 @@ reg_overlap_mentioned_p (const_rtx x, const_rtx in) int i; if (MEM_P (in)) - return 1; + return true; fmt = GET_RTX_FORMAT (GET_CODE (in)); for (i = GET_RTX_LENGTH (GET_CODE (in)) - 1; i >= 0; i--) if (fmt[i] == 'e') { if (reg_overlap_mentioned_p (x, XEXP (in, i))) - return 1; + return true; } else if (fmt[i] == 'E') { int j; for (j = XVECLEN (in, i) - 1; j >= 0; --j) if (reg_overlap_mentioned_p (x, XVECEXP (in, i, j))) - return 1; + return true; } - return 0; + return false; } case SCRATCH: @@ -1920,13 +1920,13 @@ reg_overlap_mentioned_p (const_rtx x, const_rtx in) for (i = XVECLEN (x, 0) - 1; i >= 0; i--) if (XEXP (XVECEXP (x, 0, i), 0) != 0 && reg_overlap_mentioned_p (XEXP (XVECEXP (x, 0, i), 0), in)) - return 1; - return 0; + return true; + return false; } default: gcc_assert (CONSTANT_P (x)); - return 0; + return false; } } @@ -2383,7 +2383,7 @@ vec_rtx_properties_base::grow (ptrdiff_t start) ref_end = ref_begin + new_elems; } -/* Return nonzero if X's old contents don't survive after INSN. +/* Return true if X's old contents don't survive after INSN. This will be true if X is a register and X dies in INSN or because INSN entirely sets X. @@ -2397,10 +2397,10 @@ vec_rtx_properties_base::grow (ptrdiff_t start) at any time after deaths have been computed. If REG is a hard reg that occupies multiple machine registers, this - function will only return 1 if each of those registers will be replaced + function will only return true if each of those registers will be replaced by INSN. */ -int +bool dead_or_set_p (const rtx_insn *insn, const_rtx x) { unsigned int regno, end_regno; @@ -2412,9 +2412,9 @@ dead_or_set_p (const rtx_insn *insn, const_rtx x) end_regno = END_REGNO (x); for (i = regno; i < end_regno; i++) if (! dead_or_set_regno_p (insn, i)) - return 0; + return false; - return 1; + return true; } /* Return TRUE iff DEST is a register or subreg of a register, is a @@ -2466,24 +2466,24 @@ covers_regno_p (const_rtx dest, unsigned int test_regno) /* Utility function for dead_or_set_p to check an individual register. */ -int +bool dead_or_set_regno_p (const rtx_insn *insn, unsigned int test_regno) { const_rtx pattern; /* See if there is a death note for something that includes TEST_REGNO. */ if (find_regno_note (insn, REG_DEAD, test_regno)) - return 1; + return true; if (CALL_P (insn) && find_regno_fusage (insn, CLOBBER, test_regno)) - return 1; + return true; pattern = PATTERN (insn); /* If a COND_EXEC is not executed, the value survives. */ if (GET_CODE (pattern) == COND_EXEC) - return 0; + return false; if (GET_CODE (pattern) == SET || GET_CODE (pattern) == CLOBBER) return covers_regno_p (SET_DEST (pattern), test_regno); @@ -2500,11 +2500,11 @@ dead_or_set_regno_p (const rtx_insn *insn, unsigned int test_regno) if ((GET_CODE (body) == SET || GET_CODE (body) == CLOBBER) && covers_regno_p (SET_DEST (body), test_regno)) - return 1; + return true; } } - return 0; + return false; } /* Return the reg-note of kind KIND in insn INSN, if there is one. @@ -2614,13 +2614,13 @@ find_constant_src (const rtx_insn *insn) /* Return true if DATUM, or any overlap of DATUM, of kind CODE is found in the CALL_INSN_FUNCTION_USAGE information of INSN. */ -int +bool find_reg_fusage (const_rtx insn, enum rtx_code code, const_rtx datum) { /* If it's not a CALL_INSN, it can't possibly have a CALL_INSN_FUNCTION_USAGE field, so don't bother checking. */ if (!CALL_P (insn)) - return 0; + return false; gcc_assert (datum); @@ -2633,7 +2633,7 @@ find_reg_fusage (const_rtx insn, enum rtx_code code, const_rtx datum) link = XEXP (link, 1)) if (GET_CODE (XEXP (link, 0)) == code && rtx_equal_p (datum, XEXP (XEXP (link, 0), 0))) - return 1; + return true; } else { @@ -2649,17 +2649,17 @@ find_reg_fusage (const_rtx insn, enum rtx_code code, const_rtx datum) for (i = regno; i < end_regno; i++) if (find_regno_fusage (insn, code, i)) - return 1; + return true; } } - return 0; + return false; } /* Return true if REGNO, or any overlap of REGNO, of kind CODE is found in the CALL_INSN_FUNCTION_USAGE information of INSN. */ -int +bool find_regno_fusage (const_rtx insn, enum rtx_code code, unsigned int regno) { rtx link; @@ -2669,7 +2669,7 @@ find_regno_fusage (const_rtx insn, enum rtx_code code, unsigned int regno) if (regno >= FIRST_PSEUDO_REGISTER || !CALL_P (insn) ) - return 0; + return false; for (link = CALL_INSN_FUNCTION_USAGE (insn); link; link = XEXP (link, 1)) { @@ -2679,10 +2679,10 @@ find_regno_fusage (const_rtx insn, enum rtx_code code, unsigned int regno) && REG_P (reg = XEXP (op, 0)) && REGNO (reg) <= regno && END_REGNO (reg) > regno) - return 1; + return true; } - return 0; + return false; } @@ -2906,12 +2906,12 @@ remove_node_from_insn_list (const rtx_insn *node, rtx_insn_list **listp) } } -/* Nonzero if X contains any volatile instructions. These are instructions +/* Return true if X contains any volatile instructions. These are instructions which may cause unpredictable machine state instructions, and thus no instructions or register uses should be moved or combined across them. This includes only volatile asms and UNSPEC_VOLATILE instructions. */ -int +bool volatile_insn_p (const_rtx x) { const RTX_CODE code = GET_CODE (x); @@ -2929,15 +2929,15 @@ volatile_insn_p (const_rtx x) case ADDR_DIFF_VEC: case CALL: case MEM: - return 0; + return false; case UNSPEC_VOLATILE: - return 1; + return true; case ASM_INPUT: case ASM_OPERANDS: if (MEM_VOLATILE_P (x)) - return 1; + return true; default: break; @@ -2954,24 +2954,24 @@ volatile_insn_p (const_rtx x) if (fmt[i] == 'e') { if (volatile_insn_p (XEXP (x, i))) - return 1; + return true; } else if (fmt[i] == 'E') { int j; for (j = 0; j < XVECLEN (x, i); j++) if (volatile_insn_p (XVECEXP (x, i, j))) - return 1; + return true; } } } - return 0; + return false; } -/* Nonzero if X contains any volatile memory references +/* Return true if X contains any volatile memory references UNSPEC_VOLATILE operations or volatile ASM_OPERANDS expressions. */ -int +bool volatile_refs_p (const_rtx x) { const RTX_CODE code = GET_CODE (x); @@ -2987,16 +2987,16 @@ volatile_refs_p (const_rtx x) case CLOBBER: case ADDR_VEC: case ADDR_DIFF_VEC: - return 0; + return false; case UNSPEC_VOLATILE: - return 1; + return true; case MEM: case ASM_INPUT: case ASM_OPERANDS: if (MEM_VOLATILE_P (x)) - return 1; + return true; default: break; @@ -3013,24 +3013,24 @@ volatile_refs_p (const_rtx x) if (fmt[i] == 'e') { if (volatile_refs_p (XEXP (x, i))) - return 1; + return true; } else if (fmt[i] == 'E') { int j; for (j = 0; j < XVECLEN (x, i); j++) if (volatile_refs_p (XVECEXP (x, i, j))) - return 1; + return true; } } } - return 0; + return false; } /* Similar to above, except that it also rejects register pre- and post- incrementing. */ -int +bool side_effects_p (const_rtx x) { const RTX_CODE code = GET_CODE (x); @@ -3046,7 +3046,7 @@ side_effects_p (const_rtx x) case ADDR_VEC: case ADDR_DIFF_VEC: case VAR_LOCATION: - return 0; + return false; case CLOBBER: /* Reject CLOBBER with a non-VOID mode. These are made by combine.cc @@ -3062,13 +3062,13 @@ side_effects_p (const_rtx x) case POST_MODIFY: case CALL: case UNSPEC_VOLATILE: - return 1; + return true; case MEM: case ASM_INPUT: case ASM_OPERANDS: if (MEM_VOLATILE_P (x)) - return 1; + return true; default: break; @@ -3085,26 +3085,26 @@ side_effects_p (const_rtx x) if (fmt[i] == 'e') { if (side_effects_p (XEXP (x, i))) - return 1; + return true; } else if (fmt[i] == 'E') { int j; for (j = 0; j < XVECLEN (x, i); j++) if (side_effects_p (XVECEXP (x, i, j))) - return 1; + return true; } } } - return 0; + return false; } -/* Return nonzero if evaluating rtx X might cause a trap. - FLAGS controls how to consider MEMs. A nonzero means the context +/* Return true if evaluating rtx X might cause a trap. + FLAGS controls how to consider MEMs. A true means the context of the access may have changed from the original, such that the address may have become invalid. */ -int +bool may_trap_p_1 (const_rtx x, unsigned flags) { int i; @@ -3117,7 +3117,7 @@ may_trap_p_1 (const_rtx x, unsigned flags) bool code_changed = flags != 0; if (x == 0) - return 0; + return false; code = GET_CODE (x); switch (code) { @@ -3129,7 +3129,7 @@ may_trap_p_1 (const_rtx x, unsigned flags) case PC: case REG: case SCRATCH: - return 0; + return false; case UNSPEC: return targetm.unspec_may_trap_p (x, flags); @@ -3137,7 +3137,7 @@ may_trap_p_1 (const_rtx x, unsigned flags) case UNSPEC_VOLATILE: case ASM_INPUT: case TRAP_IF: - return 1; + return true; case ASM_OPERANDS: return MEM_VOLATILE_P (x); @@ -3148,7 +3148,7 @@ may_trap_p_1 (const_rtx x, unsigned flags) if (flag_stack_check && MEM_VOLATILE_P (x) && XEXP (x, 0) == stack_pointer_rtx) - return 1; + return true; if (/* MEM_NOTRAP_P only relates to the actual position of the memory reference; moving it out of context such as when moving code when optimizing, might cause its address to become invalid. */ @@ -3160,7 +3160,7 @@ may_trap_p_1 (const_rtx x, unsigned flags) GET_MODE (x), code_changed); } - return 0; + return false; /* Division by a non-constant might trap. */ case DIV: @@ -3168,11 +3168,11 @@ may_trap_p_1 (const_rtx x, unsigned flags) case UDIV: case UMOD: if (HONOR_SNANS (x)) - return 1; + return true; if (FLOAT_MODE_P (GET_MODE (x))) return flag_trapping_math; if (!CONSTANT_P (XEXP (x, 1)) || (XEXP (x, 1) == const0_rtx)) - return 1; + return true; if (GET_CODE (XEXP (x, 1)) == CONST_VECTOR) { /* For CONST_VECTOR, return 1 if any element is or might be zero. */ @@ -3181,22 +3181,22 @@ may_trap_p_1 (const_rtx x, unsigned flags) if (!GET_MODE_NUNITS (GET_MODE (op)).is_constant (&n_elts)) { if (!CONST_VECTOR_DUPLICATE_P (op)) - return 1; + return true; for (unsigned i = 0; i < (unsigned int) XVECLEN (op, 0); i++) if (CONST_VECTOR_ENCODED_ELT (op, i) == const0_rtx) - return 1; + return true; } else for (unsigned i = 0; i < n_elts; i++) if (CONST_VECTOR_ELT (op, i) == const0_rtx) - return 1; + return true; } break; case EXPR_LIST: /* An EXPR_LIST is used to represent a function call. This certainly may trap. */ - return 1; + return true; case GE: case GT: @@ -3215,29 +3215,29 @@ may_trap_p_1 (const_rtx x, unsigned flags) For instance, sparc uses CCFPE for compares which generate exceptions and CCFP for compares which do not generate exceptions. */ if (HONOR_NANS (x)) - return 1; + return true; /* But often the compare has some CC mode, so check operand modes as well. */ if (HONOR_NANS (XEXP (x, 0)) || HONOR_NANS (XEXP (x, 1))) - return 1; + return true; break; case EQ: case NE: if (HONOR_SNANS (x)) - return 1; + return true; /* Often comparison is CC mode, so check operand modes. */ if (HONOR_SNANS (XEXP (x, 0)) || HONOR_SNANS (XEXP (x, 1))) - return 1; + return true; break; case FIX: case UNSIGNED_FIX: /* Conversion of floating point might trap. */ if (flag_trapping_math && HONOR_NANS (XEXP (x, 0))) - return 1; + return true; break; case NEG: @@ -3253,7 +3253,7 @@ may_trap_p_1 (const_rtx x, unsigned flags) default: /* Any floating arithmetic may trap. */ if (FLOAT_MODE_P (GET_MODE (x)) && flag_trapping_math) - return 1; + return true; } fmt = GET_RTX_FORMAT (code); @@ -3262,28 +3262,28 @@ may_trap_p_1 (const_rtx x, unsigned flags) if (fmt[i] == 'e') { if (may_trap_p_1 (XEXP (x, i), flags)) - return 1; + return true; } else if (fmt[i] == 'E') { int j; for (j = 0; j < XVECLEN (x, i); j++) if (may_trap_p_1 (XVECEXP (x, i, j), flags)) - return 1; + return true; } } - return 0; + return false; } -/* Return nonzero if evaluating rtx X might cause a trap. */ +/* Return true if evaluating rtx X might cause a trap. */ -int +bool may_trap_p (const_rtx x) { return may_trap_p_1 (x, 0); } -/* Same as above, but additionally return nonzero if evaluating rtx X might +/* Same as above, but additionally return true if evaluating rtx X might cause a fault. We define a fault for the purpose of this function as a erroneous execution condition that cannot be encountered during the normal execution of a valid program; the typical example is an unaligned memory @@ -3323,7 +3323,7 @@ may_trap_p (const_rtx x) memory reference to a stack slot, but it will certainly cause a fault on a strict alignment machine. */ -int +bool may_trap_or_fault_p (const_rtx x) { return may_trap_p_1 (x, 1); @@ -3558,11 +3558,11 @@ tablejump_casesi_pattern (const rtx_insn *insn) return NULL_RTX; } -/* A subroutine of computed_jump_p, return 1 if X contains a REG or MEM or +/* A subroutine of computed_jump_p, return true if X contains a REG or MEM or constant that is not in the constant pool and not in the condition of an IF_THEN_ELSE. */ -static int +static bool computed_jump_p_1 (const_rtx x) { const enum rtx_code code = GET_CODE (x); @@ -3573,13 +3573,13 @@ computed_jump_p_1 (const_rtx x) { case LABEL_REF: case PC: - return 0; + return false; case CONST: CASE_CONST_ANY: case SYMBOL_REF: case REG: - return 1; + return true; case MEM: return ! (GET_CODE (XEXP (x, 0)) == SYMBOL_REF @@ -3598,23 +3598,23 @@ computed_jump_p_1 (const_rtx x) { if (fmt[i] == 'e' && computed_jump_p_1 (XEXP (x, i))) - return 1; + return true; else if (fmt[i] == 'E') for (j = 0; j < XVECLEN (x, i); j++) if (computed_jump_p_1 (XVECEXP (x, i, j))) - return 1; + return true; } - return 0; + return false; } -/* Return nonzero if INSN is an indirect jump (aka computed jump). +/* Return true if INSN is an indirect jump (aka computed jump). Tablejumps and casesi insns are not considered indirect jumps; we can recognize them by a (use (label_ref)). */ -int +bool computed_jump_p (const rtx_insn *insn) { int i; @@ -3624,20 +3624,20 @@ computed_jump_p (const rtx_insn *insn) /* If we have a JUMP_LABEL set, we're not a computed jump. */ if (JUMP_LABEL (insn) != NULL) - return 0; + return false; if (GET_CODE (pat) == PARALLEL) { int len = XVECLEN (pat, 0); - int has_use_labelref = 0; + bool has_use_labelref = false; for (i = len - 1; i >= 0; i--) if (GET_CODE (XVECEXP (pat, 0, i)) == USE && (GET_CODE (XEXP (XVECEXP (pat, 0, i), 0)) == LABEL_REF)) { - has_use_labelref = 1; - break; + has_use_labelref = true; + break; } if (! has_use_labelref) @@ -3645,14 +3645,14 @@ computed_jump_p (const rtx_insn *insn) if (GET_CODE (XVECEXP (pat, 0, i)) == SET && SET_DEST (XVECEXP (pat, 0, i)) == pc_rtx && computed_jump_p_1 (SET_SRC (XVECEXP (pat, 0, i)))) - return 1; + return true; } else if (GET_CODE (pat) == SET && SET_DEST (pat) == pc_rtx && computed_jump_p_1 (SET_SRC (pat))) - return 1; + return true; } - return 0; + return false; } @@ -3836,7 +3836,7 @@ commutative_operand_precedence (rtx op) } } -/* Return 1 iff it is necessary to swap operands of commutative operation +/* Return true iff it is necessary to swap operands of commutative operation in order to canonicalize expression. */ bool @@ -3846,9 +3846,9 @@ swap_commutative_operands_p (rtx x, rtx y) < commutative_operand_precedence (y)); } -/* Return 1 if X is an autoincrement side effect and the register is +/* Return true if X is an autoincrement side effect and the register is not the stack pointer. */ -int +bool auto_inc_p (const_rtx x) { switch (GET_CODE (x)) @@ -3861,15 +3861,15 @@ auto_inc_p (const_rtx x) case POST_MODIFY: /* There are no REG_INC notes for SP. */ if (XEXP (x, 0) != stack_pointer_rtx) - return 1; + return true; default: break; } - return 0; + return false; } -/* Return nonzero if IN contains a piece of rtl that has the address LOC. */ -int +/* Return true if IN contains a piece of rtl that has the address LOC. */ +bool loc_mentioned_in_p (rtx *loc, const_rtx in) { enum rtx_code code; @@ -3877,7 +3877,7 @@ loc_mentioned_in_p (rtx *loc, const_rtx in) int i, j; if (!in) - return 0; + return false; code = GET_CODE (in); fmt = GET_RTX_FORMAT (code); @@ -3886,15 +3886,15 @@ loc_mentioned_in_p (rtx *loc, const_rtx in) if (fmt[i] == 'e') { if (loc == &XEXP (in, i) || loc_mentioned_in_p (loc, XEXP (in, i))) - return 1; + return true; } else if (fmt[i] == 'E') for (j = XVECLEN (in, i) - 1; j >= 0; j--) if (loc == &XVECEXP (in, i, j) || loc_mentioned_in_p (loc, XVECEXP (in, i, j))) - return 1; + return true; } - return 0; + return false; } /* Reinterpret a subreg as a bit extraction from an integer and return