From patchwork Fri Apr 29 11:33:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 53349 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 2EA7D3857034 for ; Fri, 29 Apr 2022 11:33:54 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 2EA7D3857034 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1651232034; bh=Legm7zSkwSMRKbYwl0jpqwihn4Z2iW4Z70Vz4On7rJg=; h=Date:Subject:To:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=tCKHdNjCGNMKO+QYfMZvH4FMRencXaFHE3i6AT2BIz2TYSOUXnl4nfKoFCcdMxFdr kt/YrbcynUTdDVTyzHyV/GfeSR6g7LmGE1kfY6tawzyf6lKPZyH3E0gxU/TopAYfqR TOAKgtKmyAkMPOkVmrLami9ZUXB1AQaAuBSfIkWI= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-qv1-xf2b.google.com (mail-qv1-xf2b.google.com [IPv6:2607:f8b0:4864:20::f2b]) by sourceware.org (Postfix) with ESMTPS id 1A842385781D for ; Fri, 29 Apr 2022 11:33:25 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 1A842385781D Received: by mail-qv1-xf2b.google.com with SMTP id kj18so5116983qvb.6 for ; Fri, 29 Apr 2022 04:33:25 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:from:date:message-id:subject:to; bh=Legm7zSkwSMRKbYwl0jpqwihn4Z2iW4Z70Vz4On7rJg=; b=2Aqm+SAVLP0pCrio/WohjFrkzIIAErDxe6loF2+30uYrKdi5hOKMxKyKklivzGvJ0V QcwQ/KCQyaL84/no2xz3Pf1crOCZhOjE8L5aieKP3LKfj94za2o4igsxek7FSBUSPtyZ Vz9vRUq/mhOG5Y1Qh5xMZjaWaYuRTUg0JZ4mf1IqAI2JRsZ3HKoNYDl44hGs5JkhMU2K RRH4/lrf8Ur9brl7ffHrUIOZvBaE/s7dfdF01ituXtyWhTr8UO3o34/jBwVBiLlUPg2P EhXqcFcwhkOJCIsN3UvuiybIIPIZo9gtF4h9ZikAz5aCn3+UfNUt7K4rlmTUAzYeNBvC V5Yw== X-Gm-Message-State: AOAM531egevg/+8WKhMUZoObr+qysdj23ki3t1415tXdI+S69loBlVst LQRHuw1wFjRIbzYPr66AMB51emwoygsL4TNl1ieQ5LYvL2J7Mg== X-Google-Smtp-Source: ABdhPJwkejMVcfrJja6mNz+2EvOmUnCvUPKDET6q1kITxZ70+xG/w7fEH0u8lBV83/bJo8zWiIr0ZdYW09x0/tsU7rU= X-Received: by 2002:a05:6214:2aaf:b0:446:77c0:50d5 with SMTP id js15-20020a0562142aaf00b0044677c050d5mr27545230qvb.48.1651232003452; Fri, 29 Apr 2022 04:33:23 -0700 (PDT) MIME-Version: 1.0 Date: Fri, 29 Apr 2022 13:33:12 +0200 Message-ID: Subject: [PATCH] i386: Optimize double-word negation [PR51954] To: "gcc-patches@gcc.gnu.org" X-Spam-Status: No, score=-8.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Uros Bizjak via Gcc-patches From: Uros Bizjak Reply-To: Uros Bizjak Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" Introduce peephole2 pattern to convert from: mov %esi, %edx negl %eax adcl $0, %edx negl %edx to: xorl %edx, %edx negl %eax sbbl %esi, %edx This conversion is profitable only when initial move is found. Otherwise, additional move to a temporary together with clearing xor is needed. 2022-04-29 Uroš Bizjak gcc/ChangeLog: PR target/51954 * config/i386/i386.md (adcl/neg -> sbb peephole): New peephole2. gcc/testsuite/ChangeLog: PR target/51954 * gcc.target/i386/pr51954.c: New test. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Pushed to master. Uros. diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index c74edd1aaef..b321cda1f22 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -10929,6 +10929,50 @@ (define_insn_and_split "*neg2_doubleword" (clobber (reg:CC FLAGS_REG))])] "split_double_mode (mode, &operands[0], 2, &operands[0], &operands[2]);") +;; Convert: +;; mov %esi, %edx +;; negl %eax +;; adcl $0, %edx +;; negl %edx +;; to: +;; xorl %edx, %edx +;; negl %eax +;; sbbl %esi, %edx + +(define_peephole2 + [(set (match_operand:SWI48 0 "general_reg_operand") + (match_operand:SWI48 1 "nonimmediate_gr_operand")) + (parallel + [(set (reg:CCC FLAGS_REG) + (ne:CCC (match_operand:SWI48 2 "general_reg_operand") (const_int 0))) + (set (match_dup 2) (neg:SWI48 (match_dup 2)))]) + (parallel + [(set (match_dup 0) + (plus:SWI48 (plus:SWI48 + (ltu:SWI48 (reg:CC FLAGS_REG) (const_int 0)) + (match_dup 0)) + (const_int 0))) + (clobber (reg:CC FLAGS_REG))]) + (parallel + [(set (match_dup 0) + (neg:SWI48 (match_dup 0))) + (clobber (reg:CC FLAGS_REG))])] + "REGNO (operands[0]) != REGNO (operands[2]) + && !reg_mentioned_p (operands[0], operands[1]) + && !reg_mentioned_p (operands[2], operands[1])" + [(parallel + [(set (reg:CCC FLAGS_REG) + (ne:CCC (match_dup 2) (const_int 0))) + (set (match_dup 2) (neg:SWI48 (match_dup 2)))]) + (parallel + [(set (match_dup 0) + (minus:SWI48 (minus:SWI48 + (match_dup 0) + (ltu:SWI48 (reg:CC FLAGS_REG) (const_int 0))) + (match_dup 1))) + (clobber (reg:CC FLAGS_REG))])] + "ix86_expand_clear (operands[0]);") + (define_insn "*neg_1" [(set (match_operand:SWI 0 "nonimmediate_operand" "=m") (neg:SWI (match_operand:SWI 1 "nonimmediate_operand" "0"))) diff --git a/gcc/testsuite/gcc.target/i386/pr51954.c b/gcc/testsuite/gcc.target/i386/pr51954.c new file mode 100644 index 00000000000..5e757de22f9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr51954.c @@ -0,0 +1,15 @@ +/* PR target/51954 */ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ +/* { dg-final { scan-assembler-not "adc" } } */ + +#ifdef __x86_64__ +#define TYPE __int128 +#else +#define TYPE long long +#endif + +TYPE bar (TYPE x) +{ + return -x; +}