diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 0fdf99416e6..223fdb538cf 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -1083,8 +1083,8 @@ (define_code_iterator any_rotate [rotate rotatert])
 ;; Base name for insn mnemonic.
 (define_code_attr rotate [(rotate "rol") (rotatert "ror")])
 
-;; Counter rotate.
-(define_code_attr crotate [(rotate "rotatert") (rotatert "rotate")])
+;; Mapping to the inverse rotation RTL code.
+(define_code_attr inv_rotate [(rotate "rotatert") (rotatert "rotate")])
 
 ;; Mapping of abs neg operators
 (define_code_iterator absneg [abs neg])
@@ -19220,7 +19220,7 @@ (define_insn_and_split "*<insn><mode>3_sub"
   "&& 1"
   [(parallel
      [(set (match_dup 0)
-	   (<crotate>:SWI (match_dup 1) (match_dup 2)))
+	   (<inv_rotate>:SWI (match_dup 1) (match_dup 2)))
       (clobber (reg:CC FLAGS_REG))])]
 {
   operands[2] = force_reg (GET_MODE (operands[2]), operands[2]);
@@ -19238,7 +19238,7 @@ (define_split
  "(INTVAL (operands[3]) & (<MODE_SIZE> * BITS_PER_UNIT - 1)) == 0"
  [(set (match_dup 4) (match_dup 1))
   (set (match_dup 0)
-       (<crotate>:SWI (match_dup 4) (subreg:QI (match_dup 2) 0)))]
+       (<inv_rotate>:SWI (match_dup 4) (subreg:QI (match_dup 2) 0)))]
  "operands[4] = gen_reg_rtx (<MODE>mode);")
 
 (define_insn_and_split "*<insn><mode>3_sub_1"
@@ -19256,7 +19256,7 @@ (define_insn_and_split "*<insn><mode>3_sub_1"
   "&& 1"
   [(parallel
      [(set (match_dup 0)
-	   (<crotate>:SWI (match_dup 1) (match_dup 2)))
+	   (<inv_rotate>:SWI (match_dup 1) (match_dup 2)))
       (clobber (reg:CC FLAGS_REG))])]
  "operands[2] = force_reg (GET_MODE (operands[2]), operands[2]);")
 
@@ -19270,7 +19270,7 @@ (define_split
  "(INTVAL (operands[3]) & (<MODE_SIZE> * BITS_PER_UNIT - 1)) == 0"
  [(set (match_dup 4) (match_dup 1))
   (set (match_dup 0)
-       (<crotate>:SWI (match_dup 4) (match_dup 2)))]
+       (<inv_rotate>:SWI (match_dup 4) (match_dup 2)))]
  "operands[4] = gen_reg_rtx (<MODE>mode);")
 
 ;; Implement rotation using two double-precision