From patchwork Tue Nov 29 14:39:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prathamesh Kulkarni X-Patchwork-Id: 61228 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id BB404385843A for ; Tue, 29 Nov 2022 14:40:14 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org BB404385843A DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1669732814; bh=f4CySLri3FxUmRccEGRLw6wSyBQfm6HI1uBSylEPPbU=; h=Date:Subject:To:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=hxJVWp7sxVEIbrRTcarQZS5aiyNdLLgF+v+jcr64F37x/ay/f6Vig7KdRHMgvlv9h wFm9FkF1EgEtSgnQOqujz9a4p1NK7qklP5eSsWupx94Q3363eRuXL9zhX5aikyGiGb sf/UTGUYxty3IWAsJpgkJPm3wLMV9TqZH1ncdPOA= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-lf1-x12f.google.com (mail-lf1-x12f.google.com [IPv6:2a00:1450:4864:20::12f]) by sourceware.org (Postfix) with ESMTPS id 117D63858D1E for ; Tue, 29 Nov 2022 14:39:46 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 117D63858D1E Received: by mail-lf1-x12f.google.com with SMTP id g7so22367000lfv.5 for ; Tue, 29 Nov 2022 06:39:46 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=to:subject:message-id:date:from:mime-version:x-gm-message-state :from:to:cc:subject:date:message-id:reply-to; bh=f4CySLri3FxUmRccEGRLw6wSyBQfm6HI1uBSylEPPbU=; b=BAtp7EAg+1MKYxegcCmgYL/a736c+XL1ARLc4Mr+9RV8fEZj7wJqH47hWonueZG3wn US/3AgkpVfTw9DN1eoRP9nBlfFeuNDsfgNg7zaCQ99MK7G20RHBWm2oICq4Itk8koiTm 3yKw2qAALvwmwAPo5Wno8uRhVtCIyaaHOPDNqVUhzobWW2Xzqut949Lo47i+Uk50JDlS qaoZ5oooyky4WkHZ4zVzZTl/QO30K5Ct6q3x292XKnVVqk8Fyg1zsrl7w9RGoyqFTBP4 DuWmQYOzu7cpIQLINpdijSyyuxAQu5BpunS3ifXPTyo3imsDQlrdAIXqGzPRMlPsa108 Acrg== X-Gm-Message-State: ANoB5pkMxGsOn5nwyv9bj9OHaqGMswFCh33o7jL8j7Wg9ehYFb5m2uYL DHajSF8a6SDzr5mlbFL9jx38sgawGXg8uTogF2OaOASsiv0= X-Google-Smtp-Source: AA0mqf5hBhqEbGfxUQ5CJpbdtapyhIzfOJWY2Xz3UMZIr4Y2H9qSHu6wtDpBVi0+/OkKm6pnQE6H3h7oFh/M7rLx4L4= X-Received: by 2002:a05:6512:340a:b0:4ae:d9b4:bd31 with SMTP id i10-20020a056512340a00b004aed9b4bd31mr13904052lfr.645.1669732784091; Tue, 29 Nov 2022 06:39:44 -0800 (PST) MIME-Version: 1.0 Date: Tue, 29 Nov 2022 20:09:07 +0530 Message-ID: Subject: [aarch64] Use dup and zip1 for interleaving elements in initializing vector To: gcc Patches , Richard Sandiford X-Spam-Status: No, score=-8.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Prathamesh Kulkarni via Gcc-patches From: Prathamesh Kulkarni Reply-To: Prathamesh Kulkarni Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" Hi, For the following test-case: int16x8_t foo(int16_t x, int16_t y) { return (int16x8_t) { x, y, x, y, x, y, x, y }; } Code gen at -O3: foo: dup v0.8h, w0 ins v0.h[1], w1 ins v0.h[3], w1 ins v0.h[5], w1 ins v0.h[7], w1 ret For 16 elements, it results in 8 ins instructions which might not be optimal perhaps. I guess, the above code-gen would be equivalent to the following ? dup v0.8h, w0 dup v1.8h, w1 zip1 v0.8h, v0.8h, v1.8h I have attached patch to do the same, if number of elements >= 8, which should be possibly better compared to current code-gen ? Patch passes bootstrap+test on aarch64-linux-gnu. Does the patch look OK ? Thanks, Prathamesh diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc index c91df6f5006..e5dea70e363 100644 --- a/gcc/config/aarch64/aarch64.cc +++ b/gcc/config/aarch64/aarch64.cc @@ -22028,6 +22028,39 @@ aarch64_expand_vector_init (rtx target, rtx vals) return; } + /* Check for interleaving case. + For eg if initializer is (int16x8_t) {x, y, x, y, x, y, x, y}. + Generate following code: + dup v0.h, x + dup v1.h, y + zip1 v0.h, v0.h, v1.h + for "large enough" initializer. */ + + if (n_elts >= 8) + { + int i; + for (i = 2; i < n_elts; i++) + if (!rtx_equal_p (XVECEXP (vals, 0, i), XVECEXP (vals, 0, i % 2))) + break; + + if (i == n_elts) + { + machine_mode mode = GET_MODE (target); + rtx dest[2]; + + for (int i = 0; i < 2; i++) + { + rtx x = copy_to_mode_reg (GET_MODE_INNER (mode), XVECEXP (vals, 0, i)); + dest[i] = gen_reg_rtx (mode); + aarch64_emit_move (dest[i], gen_vec_duplicate (mode, x)); + } + + rtvec v = gen_rtvec (2, dest[0], dest[1]); + emit_set_insn (target, gen_rtx_UNSPEC (mode, v, UNSPEC_ZIP1)); + return; + } + } + enum insn_code icode = optab_handler (vec_set_optab, mode); gcc_assert (icode != CODE_FOR_nothing); diff --git a/gcc/testsuite/gcc.target/aarch64/interleave-init-1.c b/gcc/testsuite/gcc.target/aarch64/interleave-init-1.c new file mode 100644 index 00000000000..ee775048589 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/interleave-init-1.c @@ -0,0 +1,37 @@ +/* { dg-do compile } */ +/* { dg-options "-O3" } */ +/* { dg-final { check-function-bodies "**" "" "" } } */ + +#include + +/* +** foo: +** ... +** dup v[0-9]+\.8h, w[0-9]+ +** dup v[0-9]+\.8h, w[0-9]+ +** zip1 v[0-9]+\.8h, v[0-9]+\.8h, v[0-9]+\.8h +** ... +** ret +*/ + +int16x8_t foo(int16_t x, int y) +{ + int16x8_t v = (int16x8_t) {x, y, x, y, x, y, x, y}; + return v; +} + +/* +** foo2: +** ... +** dup v[0-9]+\.8h, w[0-9]+ +** movi v[0-9]+\.8h, 0x1 +** zip1 v[0-9]+\.8h, v[0-9]+\.8h, v[0-9]+\.8h +** ... +** ret +*/ + +int16x8_t foo2(int16_t x) +{ + int16x8_t v = (int16x8_t) {x, 1, x, 1, x, 1, x, 1}; + return v; +}