diff mbox series

[committed,target/116104] Fix more rtl-checking failures in ext-dce

Message ID 9c173a09-7e1e-4064-bc44-f83e4ce7dc31@gmail.com
State Committed
Commit 69a9ee05c68bd1fe7f5b3be86baacc8f0a599915
Headers
Series [committed,target/116104] Fix more rtl-checking failures in ext-dce |

Checks

Context Check Description
linaro-tcwg-bot/tcwg_gcc_build--master-arm warning Patch is already merged
linaro-tcwg-bot/tcwg_gcc_build--master-aarch64 warning Patch is already merged

Commit Message

Jeff Law July 31, 2024, 5:33 p.m. UTC 
  More enable-rtl-checking fixes for ext-dce.  Very similar to the one 
recently posted, this time covering more of the shift ops.

I checked all instances of CONSTANT_P guarding [U]INTVAL and fixed all 
that looked wrong.  I also created a dummy assembler/linker so that I 
could run the GCC testsuite on gcn and verified that wasn't tripping any 
rtl-checking bugs in ext-dce anymore.

Obviously this has also gone through x86 bootstrap and regression testing.

Pushing to the trunk.

Jeff
commit 69a9ee05c68bd1fe7f5b3be86baacc8f0a599915
Author: Jeff Law <jlaw@ventanamicro.com>
Date:   Wed Jul 31 11:30:27 2024 -0600

    [target/116104] Fix more rtl-checking failures in ext-dce
    
    More enable-rtl-checking fixes for ext-dce.  Very similar to the one recently
    posted, this time covering more of the shift ops.
    
    I checked all instances of CONSTANT_P guarding [U]INTVAL and fixed all that
    looked wrong.  I also created a dummy assembler/linker so that I could run the
    GCC testsuite on gcn and verified that wasn't tripping any rtl-checking bugs in
    ext-dce anymore.
    
    Obviously this has also gone through x86 bootstrap and regression tested.
    
    Pushing to the trunk.
    
            pr target/116104
    gcc/
            * ext-dce.cc (carry_backpropagate): Change more guards of [U]INTVAL to
            test CONST_INT_P rather than CONSTANT_P, fixing rtl-checking failures.
diff mbox series

Patch

diff --git a/gcc/ext-dce.cc b/gcc/ext-dce.cc
index f7b0eb11418..97a66427118 100644
--- a/gcc/ext-dce.cc
+++ b/gcc/ext-dce.cc
@@ -501,7 +501,7 @@  carry_backpropagate (unsigned HOST_WIDE_INT mask, enum rtx_code code, rtx x)
     /* We propagate for the shifted operand, but not the shift
        count.  The count is handled specially.  */
     case LSHIFTRT:
-      if (CONSTANT_P (XEXP (x, 1))
+      if (CONST_INT_P (XEXP (x, 1))
 	  && known_lt (UINTVAL (XEXP (x, 1)), GET_MODE_BITSIZE (mode)))
 	return mmask & (mask << INTVAL (XEXP (x, 1)));
       return mmask;
@@ -509,7 +509,7 @@  carry_backpropagate (unsigned HOST_WIDE_INT mask, enum rtx_code code, rtx x)
     /* We propagate for the shifted operand, but not the shift
        count.  The count is handled specially.  */
     case ASHIFTRT:
-      if (CONSTANT_P (XEXP (x, 1))
+      if (CONST_INT_P (XEXP (x, 1))
 	  && known_lt (UINTVAL (XEXP (x, 1)), GET_MODE_BITSIZE (mode)))
 	{
 	  HOST_WIDE_INT sign = 0;
@@ -526,7 +526,7 @@  carry_backpropagate (unsigned HOST_WIDE_INT mask, enum rtx_code code, rtx x)
 	return 0;
       if (XEXP (x, 1) == const1_rtx)
 	return mmask;
-      if (CONSTANT_P (XEXP (x, 1)))
+      if (CONST_INT_P (XEXP (x, 1)))
 	{
 	  if (pow2p_hwi (INTVAL (XEXP (x, 1))))
 	    return mmask & (mask << (GET_MODE_BITSIZE (mode).to_constant ()
@@ -549,7 +549,7 @@  carry_backpropagate (unsigned HOST_WIDE_INT mask, enum rtx_code code, rtx x)
        count.  The count is handled specially.  */
     case SS_ASHIFT:
     case US_ASHIFT:
-      if (CONSTANT_P (XEXP (x, 1))
+      if (CONST_INT_P (XEXP (x, 1))
 	  && UINTVAL (XEXP (x, 1)) < GET_MODE_BITSIZE (mode).to_constant ())
 	{
 	  return ((mmask & ~((unsigned HOST_WIDE_INT)mmask