diff mbox series

[3/3] aarch64: Add +cpa feature flag

Message ID 9485b375-032f-5241-6a97-3474fac00529@e124511.cambridge.arm.com
State New
Headers
Series [1/3] aarch64: Add command line support for armv9.5-a |

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Commit Message

Andrew Carlotti Jan. 10, 2025, 8:05 p.m. UTC 
  This doesn't enable anything within the compiler, but this allows the
flag to be passed the assembler.  There also doesn't appear to be a
kernel cpuinfo name yet.


Ok for master?

gcc/ChangeLog:

	* config/aarch64/aarch64-arches.def (V9_5A): Add CPA.
	* config/aarch64/aarch64-option-extensions.def (CPA): New.
	* doc/invoke.texi: Document +cpa.

Comments

Richard Sandiford Jan. 13, 2025, 5:40 p.m. UTC | #1 
Andrew Carlotti <andrew.carlotti@arm.com> writes:
> This doesn't enable anything within the compiler, but this allows the
> flag to be passed the assembler.  There also doesn't appear to be a
> kernel cpuinfo name yet.
>
>
> Ok for master?
>
> gcc/ChangeLog:
>
> 	* config/aarch64/aarch64-arches.def (V9_5A): Add CPA.
> 	* config/aarch64/aarch64-option-extensions.def (CPA): New.
> 	* doc/invoke.texi: Document +cpa.
>
>
> diff --git a/gcc/config/aarch64/aarch64-arches.def b/gcc/config/aarch64/aarch64-arches.def
> index dacb7b6f37a3f381d93b88810ca7b61f9838dc7c..84d6dda1d317f77cf5a3aaaff4ca4d7b915b9ceb 100644
> --- a/gcc/config/aarch64/aarch64-arches.def
> +++ b/gcc/config/aarch64/aarch64-arches.def
> @@ -46,6 +46,6 @@ AARCH64_ARCH("armv9.1-a",     generic_armv9_a,   V9_1A,     9,  (V8_6A, V9A))
>  AARCH64_ARCH("armv9.2-a",     generic_armv9_a,   V9_2A,     9,  (V8_7A, V9_1A))
>  AARCH64_ARCH("armv9.3-a",     generic_armv9_a,   V9_3A,     9,  (V8_8A, V9_2A))
>  AARCH64_ARCH("armv9.4-a",     generic_armv9_a,   V9_4A,     9,  (V8_9A, V9_3A))
> -AARCH64_ARCH("armv9.5-a",     generic_armv9_a,   V9_5A,     9,  (V9_4A, FAMINMAX, LUT))
> +AARCH64_ARCH("armv9.5-a",     generic_armv9_a,   V9_5A,     9,  (V9_4A, FAMINMAX, LUT, CPA))
>  
>  #undef AARCH64_ARCH
> diff --git a/gcc/config/aarch64/aarch64-option-extensions.def b/gcc/config/aarch64/aarch64-option-extensions.def
> index a1133accfce53d227c7ecd8af70f93106c2656c8..cc42bd518dca5e4b947c81f06e543133b4f25440 100644
> --- a/gcc/config/aarch64/aarch64-option-extensions.def
> +++ b/gcc/config/aarch64/aarch64-option-extensions.def
> @@ -275,6 +275,8 @@ AARCH64_OPT_EXTENSION("ssve-fp8dot2", SSVE_FP8DOT2, (SSVE_FP8DOT4), (), (), "sme
>  
>  AARCH64_OPT_EXTENSION("lut", LUT, (SIMD), (), (), "lut")
>  
> +AARCH64_OPT_EXTENSION("cpa", CPA, (), (), (), "")
> +
>  #undef AARCH64_OPT_FMV_EXTENSION
>  #undef AARCH64_OPT_EXTENSION
>  #undef AARCH64_FMV_FEATURE
> diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
> index 07c1b982d3231c5224490d73be8db32dd31d51d4..125934673958a8df463a5317585c7bcaa1f75ee7 100644
> --- a/gcc/doc/invoke.texi
> +++ b/gcc/doc/invoke.texi
> @@ -21665,7 +21665,7 @@ and the features that they enable by default:
>  @item @samp{armv9.2-a} @tab Armv9.2-A @tab @samp{armv9.1-a}, @samp{+wfxt}, @samp{+xs}
>  @item @samp{armv9.3-a} @tab Armv9.3-A @tab @samp{armv9.2-a}, @samp{+mops}
>  @item @samp{armv9.4-a} @tab Armv9.4-A @tab @samp{armv9.3-a}
> -@item @samp{armv9.5-a} @tab Armv9.4-A @tab @samp{armv9.4-a}, @samp{+lut}, @samp{+faminmax}
> +@item @samp{armv9.5-a} @tab Armv9.4-A @tab @samp{armv9.4-a}, @samp{+lut}, @samp{+faminmax}, @samp{cpa}

Same comment about alphabetical order as 1/3.

>  @item @samp{armv8-r} @tab Armv8-R @tab @samp{armv8-r}
>  @end multitable
>  
> @@ -22070,6 +22070,8 @@ extension in streaming mode.
>  Enable the Floating Point Absolute Maximum/Minimum extension.
>  @item lut
>  Enable the Lookup Table extension.
> +@item cpa
> +Enable the checked pointer arithmetic instructions.

It would be more consistent to capitalise it as Checked Pointer Arithmetic.

OK with those changes, thanks.

Richard

>  @item sve-b16b16
>  Enable the SVE non-widening brain floating-point (@code{bf16}) extension.
>  This only has an effect when @code{sve2} or @code{sme2} are also enabled.
diff mbox series

Patch

diff --git a/gcc/config/aarch64/aarch64-arches.def b/gcc/config/aarch64/aarch64-arches.def
index dacb7b6f37a3f381d93b88810ca7b61f9838dc7c..84d6dda1d317f77cf5a3aaaff4ca4d7b915b9ceb 100644
--- a/gcc/config/aarch64/aarch64-arches.def
+++ b/gcc/config/aarch64/aarch64-arches.def
@@ -46,6 +46,6 @@  AARCH64_ARCH("armv9.1-a",     generic_armv9_a,   V9_1A,     9,  (V8_6A, V9A))
 AARCH64_ARCH("armv9.2-a",     generic_armv9_a,   V9_2A,     9,  (V8_7A, V9_1A))
 AARCH64_ARCH("armv9.3-a",     generic_armv9_a,   V9_3A,     9,  (V8_8A, V9_2A))
 AARCH64_ARCH("armv9.4-a",     generic_armv9_a,   V9_4A,     9,  (V8_9A, V9_3A))
-AARCH64_ARCH("armv9.5-a",     generic_armv9_a,   V9_5A,     9,  (V9_4A, FAMINMAX, LUT))
+AARCH64_ARCH("armv9.5-a",     generic_armv9_a,   V9_5A,     9,  (V9_4A, FAMINMAX, LUT, CPA))
 
 #undef AARCH64_ARCH
diff --git a/gcc/config/aarch64/aarch64-option-extensions.def b/gcc/config/aarch64/aarch64-option-extensions.def
index a1133accfce53d227c7ecd8af70f93106c2656c8..cc42bd518dca5e4b947c81f06e543133b4f25440 100644
--- a/gcc/config/aarch64/aarch64-option-extensions.def
+++ b/gcc/config/aarch64/aarch64-option-extensions.def
@@ -275,6 +275,8 @@  AARCH64_OPT_EXTENSION("ssve-fp8dot2", SSVE_FP8DOT2, (SSVE_FP8DOT4), (), (), "sme
 
 AARCH64_OPT_EXTENSION("lut", LUT, (SIMD), (), (), "lut")
 
+AARCH64_OPT_EXTENSION("cpa", CPA, (), (), (), "")
+
 #undef AARCH64_OPT_FMV_EXTENSION
 #undef AARCH64_OPT_EXTENSION
 #undef AARCH64_FMV_FEATURE
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 07c1b982d3231c5224490d73be8db32dd31d51d4..125934673958a8df463a5317585c7bcaa1f75ee7 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -21665,7 +21665,7 @@  and the features that they enable by default:
 @item @samp{armv9.2-a} @tab Armv9.2-A @tab @samp{armv9.1-a}, @samp{+wfxt}, @samp{+xs}
 @item @samp{armv9.3-a} @tab Armv9.3-A @tab @samp{armv9.2-a}, @samp{+mops}
 @item @samp{armv9.4-a} @tab Armv9.4-A @tab @samp{armv9.3-a}
-@item @samp{armv9.5-a} @tab Armv9.4-A @tab @samp{armv9.4-a}, @samp{+lut}, @samp{+faminmax}
+@item @samp{armv9.5-a} @tab Armv9.4-A @tab @samp{armv9.4-a}, @samp{+lut}, @samp{+faminmax}, @samp{cpa}
 @item @samp{armv8-r} @tab Armv8-R @tab @samp{armv8-r}
 @end multitable
 
@@ -22070,6 +22070,8 @@  extension in streaming mode.
 Enable the Floating Point Absolute Maximum/Minimum extension.
 @item lut
 Enable the Lookup Table extension.
+@item cpa
+Enable the checked pointer arithmetic instructions.
 @item sve-b16b16
 Enable the SVE non-widening brain floating-point (@code{bf16}) extension.
 This only has an effect when @code{sve2} or @code{sme2} are also enabled.