From patchwork Sat Apr 22 09:06:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Agarwal X-Patchwork-Id: 68162 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 454FC3858C74 for ; Sat, 22 Apr 2023 09:07:00 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 454FC3858C74 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1682154420; bh=JRbZo7nE+YJvJjlH07ucmyk5N/dFtAWgj5JMaSQtPoA=; h=Date:To:Cc:Subject:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From:Reply-To:From; b=dYBhiOChxek2qW9YexVTbB6JOiwn6PBWLSbltMfQiof/iOFfMy1RF/S1zrFLmppaS gdq4v6RBw756OHWHPL45Y1V0WS3EODtxZKkGMa+7+56czu+tfFYm5hgOi5D25JnW8X CiMQsp+A+M9sdAAX+LEfy0MAEvheJ0flOk858Aoc= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by sourceware.org (Postfix) with ESMTPS id DF37A3858C83 for ; Sat, 22 Apr 2023 09:06:28 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org DF37A3858C83 Received: from pps.filterd (m0353729.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 33M8xLqM006620; Sat, 22 Apr 2023 09:06:27 GMT Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3q48jhw4an-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 22 Apr 2023 09:06:27 +0000 Received: from m0353729.ppops.net (m0353729.ppops.net [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 33M90fEt010808; Sat, 22 Apr 2023 09:06:26 GMT Received: from ppma03wdc.us.ibm.com (ba.79.3fa9.ip4.static.sl-reverse.com [169.63.121.186]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3q48jhw4a1-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 22 Apr 2023 09:06:26 +0000 Received: from pps.filterd (ppma03wdc.us.ibm.com [127.0.0.1]) by ppma03wdc.us.ibm.com (8.17.1.19/8.17.1.19) with ESMTP id 33M7RkIG026882; Sat, 22 Apr 2023 09:06:25 GMT Received: from smtprelay05.dal12v.mail.ibm.com ([9.208.130.101]) by ppma03wdc.us.ibm.com (PPS) with ESMTPS id 3q4777h4sd-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 22 Apr 2023 09:06:25 +0000 Received: from smtpav05.dal12v.mail.ibm.com (smtpav05.dal12v.mail.ibm.com [10.241.53.104]) by smtprelay05.dal12v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 33M96O0g12124824 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Sat, 22 Apr 2023 09:06:24 GMT Received: from smtpav05.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C582C58056; Sat, 22 Apr 2023 09:06:24 +0000 (GMT) Received: from smtpav05.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 93B0C58065; Sat, 22 Apr 2023 09:06:22 +0000 (GMT) Received: from [9.43.126.11] (unknown [9.43.126.11]) by smtpav05.dal12v.mail.ibm.com (Postfix) with ESMTP; Sat, 22 Apr 2023 09:06:22 +0000 (GMT) Message-ID: <8b50f07a-994e-1637-ae4d-2be8dbb25807@linux.ibm.com> Date: Sat, 22 Apr 2023 14:36:20 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.9.1 Content-Language: en-US To: gcc-patches Cc: Jeff Law , Segher Boessenkool , Peter Bergner , Richard Biener Subject: [PATCH v4 4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces. X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: LrlHM5IGhRBhO8e41s5fAAk7YK2NZ5jx X-Proofpoint-GUID: 7exUwJ-npk2W1jJxerfrXFHgs4tSL7Pi X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-21_08,2023-04-21_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 priorityscore=1501 adultscore=0 suspectscore=0 lowpriorityscore=0 phishscore=0 bulkscore=0 mlxscore=0 spamscore=0 mlxlogscore=999 malwarescore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2304220078 X-Spam-Status: No, score=-12.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Ajit Agarwal via Gcc-patches From: Ajit Agarwal Reply-To: Ajit Agarwal Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" Hello All: This new version of patch 4 use improve ree pass for rs6000 target using defined ABI interfaces. Bootstrapped and regtested on power64-linux-gnu. Thanks & Regards Ajit ree: Improve ree pass for rs6000 target using defined abi interfaces For rs6000 target we see redundant zero and sign extension and done to improve ree pass to eliminate such redundant zero and sign extension using defines ABI interfaces. 2023-04-22 Ajit Kumar Agarwal gcc/ChangeLog: * ree.cc (combline_reaching_defs): Add zero_extend using defined abi interfaces. (add_removable_extension): use of defined abi interfaces for no reaching defs. (abi_extension_candidate_return_reg_p): New defined ABI function. (abi_extension_candidate_p): New defined ABI function. (abi_extension_candidate_argno_p): New defined ABI function. (abi_handle_regs_without_defs_p): New defined ABI function. gcc/testsuite/ChangeLog: * g++.target/powerpc/zext-elim-3.C --- gcc/ree.cc | 176 +++++++++++++++--- .../g++.target/powerpc/zext-elim-3.C | 16 ++ 2 files changed, 162 insertions(+), 30 deletions(-) create mode 100644 gcc/testsuite/g++.target/powerpc/zext-elim-3.C diff --git a/gcc/ree.cc b/gcc/ree.cc index 413aec7c8eb..0de96b1ece1 100644 --- a/gcc/ree.cc +++ b/gcc/ree.cc @@ -473,7 +473,8 @@ get_defs (rtx_insn *insn, rtx reg, vec *dest) break; } - gcc_assert (use != NULL); + if (use == NULL) + return NULL; ref_chain = DF_REF_CHAIN (use); @@ -514,7 +515,8 @@ get_uses (rtx_insn *insn, rtx reg) if (REGNO (DF_REF_REG (def)) == REGNO (reg)) break; - gcc_assert (def != NULL); + if (def == NULL) + return NULL; ref_chain = DF_REF_CHAIN (def); @@ -750,6 +752,103 @@ get_extended_src_reg (rtx src) return src; } +/* Return TRUE if the candidate insn is zero extend and regno is + an return registers. */ + +static bool +abi_extension_candidate_return_reg_p (rtx_insn *insn, int regno) +{ + rtx set = single_set (insn); + + if (GET_CODE (SET_SRC (set)) != ZERO_EXTEND) + return false; + + if (FUNCTION_VALUE_REGNO_P (regno)) + return true; + + return false; +} + +/* Return TRUE if reg source operand of zero_extend is argument registers + and not return registers and source and destination operand are same + and mode of source and destination operand are not same. */ + +static bool +abi_extension_candidate_p (rtx_insn *insn) +{ + rtx set = single_set (insn); + + if (GET_CODE (SET_SRC (set)) != ZERO_EXTEND) + return false; + + machine_mode ext_dst_mode = GET_MODE (SET_DEST (set)); + rtx orig_src = XEXP (SET_SRC (set),0); + + bool copy_needed + = (REGNO (SET_DEST (set)) != REGNO (XEXP (SET_SRC (set), 0))); + + if (!copy_needed && ext_dst_mode != GET_MODE (orig_src) + && FUNCTION_ARG_REGNO_P (REGNO (orig_src)) + && !abi_extension_candidate_return_reg_p (insn, REGNO (orig_src))) + return true; + + return false; +} + +/* Return TRUE if the candidate insn is zero extend and regno is + an argument registers. */ + +static bool +abi_extension_candidate_argno_p (rtx_code code, int regno) +{ + if (code != ZERO_EXTEND) + return false; + + if (FUNCTION_ARG_REGNO_P (regno)) + return true; + + return false; +} + +/* Return TRUE if the candidate insn doesn't have defs and have + * uses without RTX_BIN_ARITH/RTX_COMM_ARITH/RTX_UNARY rtx class. */ + +static bool +abi_handle_regs_without_defs_p (rtx_insn *insn) +{ + if (side_effects_p (PATTERN (insn))) + return false; + + struct df_link *uses + = get_uses (insn, SET_DEST (PATTERN (insn))); + + if (!uses) + return false; + + for (df_link *use = uses; use; use = use->next) + { + if (!use->ref) + return false; + + if (BLOCK_FOR_INSN (insn) + != BLOCK_FOR_INSN (DF_REF_INSN (use->ref))) + return false; + + rtx_insn *use_insn = DF_REF_INSN (use->ref); + + if (GET_CODE (PATTERN (use_insn)) == SET) + { + rtx_code code = GET_CODE (SET_SRC (PATTERN (use_insn))); + + if (GET_RTX_CLASS (code) == RTX_BIN_ARITH + || GET_RTX_CLASS (code) == RTX_COMM_ARITH + || GET_RTX_CLASS (code) == RTX_UNARY) + return false; + } + } + return true; +} + /* This function goes through all reaching defs of the source of the candidate for elimination (CAND) and tries to combine the extension with the definition instruction. The changes @@ -770,6 +869,11 @@ combine_reaching_defs (ext_cand *cand, const_rtx set_pat, ext_state *state) state->defs_list.truncate (0); state->copies_list.truncate (0); + rtx orig_src = XEXP (SET_SRC (cand->expr),0); + + if (abi_extension_candidate_p (cand->insn) + && (!get_defs (cand->insn, orig_src, NULL))) + return abi_handle_regs_without_defs_p (cand->insn); outcome = make_defs_and_copies_lists (cand->insn, set_pat, state); @@ -1112,26 +1216,34 @@ add_removable_extension (const_rtx expr, rtx_insn *insn, rtx reg = XEXP (src, 0); struct df_link *defs, *def; ext_cand *cand; + defs = get_defs (insn, reg, NULL); /* Zero-extension of an undefined value is partly defined (it's completely undefined for sign-extension, though). So if there exists a path from the entry to this zero-extension that leaves this register uninitialized, removing the extension could change the behavior of correct programs. So first, check it is not the case. */ - if (code == ZERO_EXTEND && !bitmap_bit_p (init_regs, REGNO (reg))) + if (!defs && abi_extension_candidate_argno_p (code, REGNO (reg))) { - if (dump_file) - { - fprintf (dump_file, "Cannot eliminate extension:\n"); - print_rtl_single (dump_file, insn); - fprintf (dump_file, " because it can operate on uninitialized" - " data\n"); - } + ext_cand e = {expr, code, mode, insn}; + insn_list->safe_push (e); return; } + if ((code == ZERO_EXTEND + && !bitmap_bit_p (init_regs, REGNO (reg)))) + { + if (dump_file) + { + fprintf (dump_file, "Cannot eliminate extension:\n"); + print_rtl_single (dump_file, insn); + fprintf (dump_file, " because it can operate on uninitialized" + " data\n"); + } + return; + } + /* Second, make sure we can get all the reaching definitions. */ - defs = get_defs (insn, reg, NULL); if (!defs) { if (dump_file) @@ -1321,7 +1433,8 @@ find_and_remove_re (void) && (REGNO (SET_DEST (set)) != REGNO (XEXP (SET_SRC (set), 0)))) { reinsn_copy_list.safe_push (curr_cand->insn); - reinsn_copy_list.safe_push (state.defs_list[0]); + if (state.defs_list.length() != 0) + reinsn_copy_list.safe_push (state.defs_list[0]); } reinsn_del_list.safe_push (curr_cand->insn); state.modified[INSN_UID (curr_cand->insn)].deleted = 1; @@ -1342,24 +1455,27 @@ find_and_remove_re (void) Remember that the memory reference will be changed to refer to the destination of the extention. So we're actually emitting a copy from the new destination to the old destination. */ - for (unsigned int i = 0; i < reinsn_copy_list.length (); i += 2) - { - rtx_insn *curr_insn = reinsn_copy_list[i]; - rtx_insn *def_insn = reinsn_copy_list[i + 1]; - - /* Use the mode of the destination of the defining insn - for the mode of the copy. This is necessary if the - defining insn was used to eliminate a second extension - that was wider than the first. */ - rtx sub_rtx = *get_sub_rtx (def_insn); - rtx set = single_set (curr_insn); - rtx new_dst = gen_rtx_REG (GET_MODE (SET_DEST (sub_rtx)), - REGNO (XEXP (SET_SRC (set), 0))); - rtx new_src = gen_rtx_REG (GET_MODE (SET_DEST (sub_rtx)), - REGNO (SET_DEST (set))); - rtx new_set = gen_rtx_SET (new_dst, new_src); - emit_insn_after (new_set, def_insn); - } + for (unsigned int i = 0; i < reinsn_copy_list.length (); i += 2) + { + rtx_insn *curr_insn = reinsn_copy_list[i]; + + if ((i+1) < reinsn_copy_list.length()) + { + rtx_insn *def_insn = reinsn_copy_list[i + 1]; + /* Use the mode of the destination of the defining insn + for the mode of the copy. This is necessary if the + defining insn was used to eliminate a second extension + that was wider than the first. */ + rtx sub_rtx = *get_sub_rtx (def_insn); + rtx set = single_set (curr_insn); + rtx new_dst = gen_rtx_REG (GET_MODE (SET_DEST (sub_rtx)), + REGNO (XEXP (SET_SRC (set), 0))); + rtx new_src = gen_rtx_REG (GET_MODE (SET_DEST (sub_rtx)), + REGNO (SET_DEST (set))); + rtx new_set = gen_rtx_SET (new_dst, new_src); + emit_insn_after (new_set, def_insn); + } + } /* Delete all useless extensions here in one sweep. */ FOR_EACH_VEC_ELT (reinsn_del_list, i, curr_insn) diff --git a/gcc/testsuite/g++.target/powerpc/zext-elim-3.C b/gcc/testsuite/g++.target/powerpc/zext-elim-3.C new file mode 100644 index 00000000000..1d443af066a --- /dev/null +++ b/gcc/testsuite/g++.target/powerpc/zext-elim-3.C @@ -0,0 +1,16 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-options "-mcpu=power9 -O2 -free" } */ + +void *memset(void *b, int c, unsigned long len) +{ + unsigned long i; + + for (i = 0; i < len; i++) + ((unsigned char *)b)[i] = c; + + return b; +} + +/* { dg-final { scan-assembler-not "rlwinm" } } */