From patchwork Mon Sep 18 05:59:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Agarwal X-Patchwork-Id: 76261 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id D4A8F385843A for ; Mon, 18 Sep 2023 05:59:43 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org D4A8F385843A DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1695016783; bh=TWoaonD4eJ5SQRK6Q/nSC1N25cTJ6T5RLjhD92j8eoA=; h=Date:To:Cc:Subject:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From:Reply-To:From; b=vJ8u0DRoCJB6FyVoBrcv2OLVKFXiIbFCcfKN/8SDx4M0mtm6ZCqTceT+6cYUyOjQh jGLhxgnmN6wcDF4iKqVgyEnYYJkjNbmxubNVmYrQI53cfWyGBA+2tlGvPdaZKyHVDH SIzD+4iqpcKqrY9yOf+l99jjrKrQuPGbO10sTk3k= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by sourceware.org (Postfix) with ESMTPS id B31B03858D32 for ; Mon, 18 Sep 2023 05:59:13 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org B31B03858D32 Received: from pps.filterd (m0353723.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 38I5c5FG016241; Mon, 18 Sep 2023 05:59:12 GMT Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3t558mbw7e-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 18 Sep 2023 05:59:11 +0000 Received: from m0353723.ppops.net (m0353723.ppops.net [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 38I5eRGG024719; Mon, 18 Sep 2023 05:59:11 GMT Received: from ppma11.dal12v.mail.ibm.com (db.9e.1632.ip4.static.sl-reverse.com [50.22.158.219]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3t558mbw79-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 18 Sep 2023 05:59:11 +0000 Received: from pps.filterd (ppma11.dal12v.mail.ibm.com [127.0.0.1]) by ppma11.dal12v.mail.ibm.com (8.17.1.19/8.17.1.19) with ESMTP id 38I4FimF016432; Mon, 18 Sep 2023 05:59:10 GMT Received: from smtprelay06.wdc07v.mail.ibm.com ([172.16.1.73]) by ppma11.dal12v.mail.ibm.com (PPS) with ESMTPS id 3t5sd1fk6r-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 18 Sep 2023 05:59:10 +0000 Received: from smtpav04.wdc07v.mail.ibm.com (smtpav04.wdc07v.mail.ibm.com [10.39.53.231]) by smtprelay06.wdc07v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 38I5xAX43474056 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 18 Sep 2023 05:59:10 GMT Received: from smtpav04.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 213EE58050; Mon, 18 Sep 2023 05:59:10 +0000 (GMT) Received: from smtpav04.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 43C3158045; Mon, 18 Sep 2023 05:59:07 +0000 (GMT) Received: from [9.43.112.72] (unknown [9.43.112.72]) by smtpav04.wdc07v.mail.ibm.com (Postfix) with ESMTP; Mon, 18 Sep 2023 05:59:06 +0000 (GMT) Message-ID: <65ed79a3-9964-dd50-39cb-98d5dbc72881@linux.ibm.com> Date: Mon, 18 Sep 2023 11:29:05 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.15.0 Content-Language: en-US To: gcc-patches Cc: Jeff Law , Richard Biener , Peter Bergner , Segher Boessenkool , Vineet Gupta Subject: PATCH v6 4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces. X-TM-AS-GCONF: 00 X-Proofpoint-GUID: 0XexpYUyhNLIomzk-l9Ty9QpdYpZuULs X-Proofpoint-ORIG-GUID: saMQJ2JdyUfRPqGvp7Ph375VUIocUiuE X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.601,FMLib:17.11.176.26 definitions=2023-09-15_20,2023-09-15_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 bulkscore=0 mlxlogscore=999 suspectscore=0 phishscore=0 adultscore=0 malwarescore=0 priorityscore=1501 clxscore=1015 lowpriorityscore=0 impostorscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2308100000 definitions=main-2309180051 X-Spam-Status: No, score=-12.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Ajit Agarwal via Gcc-patches From: Ajit Agarwal Reply-To: Ajit Agarwal Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" This new version of patch 6 use improve ree pass for rs6000 target using defined ABI interfaces. Bootstrapped and regtested on power64-linux-gnu. Review comments incorporated. Thanks & Regards Ajit ree: Improve ree pass for rs6000 target using defined abi interfaces For rs6000 target we see redundant zero and sign extension and done to improve ree pass to eliminate such redundant zero and sign extension using defined ABI interfaces. 2023-09-18 Ajit Kumar Agarwal gcc/ChangeLog: * ree.cc (combine_reaching_defs): Use of zero_extend and sign_extend defined abi interfaces. (add_removable_extension): Use of defined abi interfaces for no reaching defs. (abi_extension_candidate_return_reg_p): New function. (abi_extension_candidate_p): New function. (abi_extension_candidate_argno_p): New function. (abi_handle_regs_without_defs_p): New function. (abi_target_promote_function_mode): New function. gcc/testsuite/ChangeLog: * g++.target/powerpc/zext-elim-3.C --- gcc/ree.cc | 145 +++++++++++++++++- .../g++.target/powerpc/zext-elim-3.C | 13 ++ 2 files changed, 155 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/g++.target/powerpc/zext-elim-3.C diff --git a/gcc/ree.cc b/gcc/ree.cc index fc04249fa84..e395af6b1bd 100644 --- a/gcc/ree.cc +++ b/gcc/ree.cc @@ -514,7 +514,8 @@ get_uses (rtx_insn *insn, rtx reg) if (REGNO (DF_REF_REG (def)) == REGNO (reg)) break; - gcc_assert (def != NULL); + if (def == NULL) + return NULL; ref_chain = DF_REF_CHAIN (def); @@ -750,6 +751,118 @@ get_extended_src_reg (rtx src) return src; } +/* Return TRUE if target mode is equal to source mode of zero_extend + or sign_extend otherwise false. */ + +static bool +abi_target_promote_function_mode (machine_mode mode) +{ + int unsignedp; + machine_mode tgt_mode = + targetm.calls.promote_function_mode (NULL_TREE, mode, &unsignedp, + NULL_TREE, 1); + + if (tgt_mode == mode) + return true; + else + return false; +} + +/* Return TRUE if the candidate insn is zero extend and regno is + an return registers. */ + +static bool +abi_extension_candidate_return_reg_p (rtx_insn *insn, int regno) +{ + rtx set = single_set (insn); + + if (GET_CODE (SET_SRC (set)) != ZERO_EXTEND) + return false; + + if (FUNCTION_VALUE_REGNO_P (regno)) + return true; + + return false; +} + +/* Return TRUE if reg source operand of zero_extend is argument registers + and not return registers and source and destination operand are same + and mode of source and destination operand are not same. */ + +static bool +abi_extension_candidate_p (rtx_insn *insn) +{ + rtx set = single_set (insn); + + if (GET_CODE (SET_SRC (set)) != ZERO_EXTEND) + return false; + + machine_mode ext_dst_mode = GET_MODE (SET_DEST (set)); + rtx orig_src = XEXP (SET_SRC (set),0); + + bool copy_needed + = (REGNO (SET_DEST (set)) != REGNO (XEXP (SET_SRC (set), 0))); + + if (!copy_needed && ext_dst_mode != GET_MODE (orig_src) + && FUNCTION_ARG_REGNO_P (REGNO (orig_src)) + && !abi_extension_candidate_return_reg_p (insn, REGNO (orig_src))) + return true; + + return false; +} + +/* Return TRUE if the candidate insn is zero extend and regno is + an argument registers. */ + +static bool +abi_extension_candidate_argno_p (rtx_code code, int regno) +{ + if (code != ZERO_EXTEND) + return false; + + if (FUNCTION_ARG_REGNO_P (regno)) + return true; + + return false; +} + +/* Return TRUE if the candidate insn doesn't have defs and have + * uses without RTX_BIN_ARITH/RTX_COMM_ARITH/RTX_UNARY rtx class. */ + +static bool +abi_handle_regs_without_defs_p (rtx_insn *insn) +{ + if (side_effects_p (PATTERN (insn))) + return false; + + struct df_link *uses = get_uses (insn, SET_DEST (PATTERN (insn))); + + if (!uses) + return false; + + for (df_link *use = uses; use; use = use->next) + { + if (!use->ref) + return false; + + if (BLOCK_FOR_INSN (insn) != BLOCK_FOR_INSN (DF_REF_INSN (use->ref))) + return false; + + rtx_insn *use_insn = DF_REF_INSN (use->ref); + + if (GET_CODE (PATTERN (use_insn)) == SET) + { + rtx_code code = GET_CODE (SET_SRC (PATTERN (use_insn))); + + if (GET_RTX_CLASS (code) == RTX_BIN_ARITH + || GET_RTX_CLASS (code) == RTX_COMM_ARITH + || GET_RTX_CLASS (code) == RTX_UNARY) + return false; + } + } + return true; +} + /* This function goes through all reaching defs of the source of the candidate for elimination (CAND) and tries to combine the extension with the definition instruction. The changes @@ -770,6 +883,11 @@ combine_reaching_defs (ext_cand *cand, const_rtx set_pat, ext_state *state) state->defs_list.truncate (0); state->copies_list.truncate (0); + rtx orig_src = XEXP (SET_SRC (cand->expr),0); + + if (abi_extension_candidate_p (cand->insn) + && (!get_defs (cand->insn, orig_src, NULL))) + return abi_handle_regs_without_defs_p (cand->insn); outcome = make_defs_and_copies_lists (cand->insn, set_pat, state); @@ -1036,6 +1154,15 @@ combine_reaching_defs (ext_cand *cand, const_rtx set_pat, ext_state *state) } } + rtx insn_set = single_set (cand->insn); + + machine_mode mode = (GET_MODE (XEXP (SET_SRC (insn_set), 0))); + + bool promote_p = abi_target_promote_function_mode (mode); + + if (promote_p) + return true; + if (merge_successful) { /* Commit the changes here if possible @@ -1112,12 +1239,20 @@ add_removable_extension (const_rtx expr, rtx_insn *insn, rtx reg = XEXP (src, 0); struct df_link *defs, *def; ext_cand *cand; + defs = get_defs (insn, reg, NULL); /* Zero-extension of an undefined value is partly defined (it's completely undefined for sign-extension, though). So if there exists a path from the entry to this zero-extension that leaves this register uninitialized, removing the extension could change the behavior of correct programs. So first, check it is not the case. */ + if (!defs && abi_extension_candidate_argno_p (code, REGNO (reg))) + { + ext_cand e = {expr, code, mode, insn}; + insn_list->safe_push (e); + return; + } + if (code == ZERO_EXTEND && !bitmap_bit_p (init_regs, REGNO (reg))) { if (dump_file) @@ -1131,7 +1266,6 @@ add_removable_extension (const_rtx expr, rtx_insn *insn, } /* Second, make sure we can get all the reaching definitions. */ - defs = get_defs (insn, reg, NULL); if (!defs) { if (dump_file) @@ -1321,7 +1455,8 @@ find_and_remove_re (void) && (REGNO (SET_DEST (set)) != REGNO (XEXP (SET_SRC (set), 0)))) { reinsn_copy_list.safe_push (curr_cand->insn); - reinsn_copy_list.safe_push (state.defs_list[0]); + if (state.defs_list.length () != 0) + reinsn_copy_list.safe_push (state.defs_list[0]); } reinsn_del_list.safe_push (curr_cand->insn); state.modified[INSN_UID (curr_cand->insn)].deleted = 1; @@ -1345,6 +1480,10 @@ find_and_remove_re (void) for (unsigned int i = 0; i < reinsn_copy_list.length (); i += 2) { rtx_insn *curr_insn = reinsn_copy_list[i]; + + if ((i+1) >= reinsn_copy_list.length ()) + continue; + rtx_insn *def_insn = reinsn_copy_list[i + 1]; /* Use the mode of the destination of the defining insn diff --git a/gcc/testsuite/g++.target/powerpc/zext-elim-3.C b/gcc/testsuite/g++.target/powerpc/zext-elim-3.C new file mode 100644 index 00000000000..5a050df06ff --- /dev/null +++ b/gcc/testsuite/g++.target/powerpc/zext-elim-3.C @@ -0,0 +1,13 @@ +/* { dg-options "-mcpu=power9 -O2" } */ + +void *memset(void *b, int c, unsigned long len) +{ + unsigned long i; + + for (i = 0; i < len; i++) + ((unsigned char *)b)[i] = c; + + return b; +} + +/* { dg-final { scan-assembler-not "\mrlwinm\M" } } */