[wwwdocs,v2] document zero-width field ABI changes on MIPS

Message ID 6144a58c030ee034e7f4d9cf481045c7b7c07af2.camel@mengyan1223.wang
State New
Headers
Series [wwwdocs,v2] document zero-width field ABI changes on MIPS |

Commit Message

Xi Ruoyao April 6, 2022, 3:26 p.m. UTC
  Document ABI changes in r12-7961, 7962, and 8023.  Ok for wwwdocs?

---
 htdocs/gcc-12/changes.html | 25 ++++++++++++++++++++++++-
 1 file changed, 24 insertions(+), 1 deletion(-)
  

Comments

Xi Ruoyao April 28, 2022, 5:28 p.m. UTC | #1
Ping.

On Wed, 2022-04-06 at 23:26 +0800, Xi Ruoyao via Gcc-patches wrote:
> Document ABI changes in r12-7961, 7962, and 8023.  Ok for wwwdocs?
> 
> ---
>  htdocs/gcc-12/changes.html | 25 ++++++++++++++++++++++++-
>  1 file changed, 24 insertions(+), 1 deletion(-)
> 
> diff --git a/htdocs/gcc-12/changes.html b/htdocs/gcc-12/changes.html
> index 4f2ee77f..c924bca3 100644
> --- a/htdocs/gcc-12/changes.html
> +++ b/htdocs/gcc-12/changes.html
> @@ -50,6 +50,10 @@ a work-in-progress.</p>
>      (so there is a C++ ABI incompatibility, GCC 4.4 and earlier compatible
>      with GCC 12 or later, incompatible with GCC 4.5 through GCC 11).
>      RISC-V has changed the handling of these already starting with GCC 10.
> +    As the ABI requires, MIPS takes them into account handling function
> +    return values so there is a C++ ABI incompatibility with GCC 4.5
> +    through 11.  For function arguments on MIPS, refer to
> +    <a href="#mips_zero_width_fields">the MIPS specific entry</a>.
>      GCC 12 on the above targets will report such incompatibilities as
>      warnings or other diagnostics unless <code>-Wno-psabi</code> is used.
>    </li>
> @@ -549,7 +553,26 @@ a work-in-progress.</p>
>    </li>
>  </ul>
>  
> -<!-- <h3 id="mips">MIPS</h3> -->
> +<h3 id="mips">MIPS</h3>
> +<ul>
> +  <li>The <a name="mips_zero_width_fields">ABI</a> passing arguments
> +      containing zero-width fields (for example, C/C++ zero-width
> +      bit-fields, GNU C/C++ zero-length arrays, and GNU C empty structs)
> +      has changed.  Now a zero-width field will not prevent an aligned
> +      64-bit floating-point field next to it from being passed through
> +      FPR.  This is compatible with LLVM, but incompatible with previous
> +      GCC releases. GCC 12 on MIPS will report such incompatibilities as
> +      an inform unless <code>-Wno-psabi</code> is used.
> +  </li>
> +  <li>The <a name="mips_cxx17_empty_bases">ABI</a> returning values
> +      containing C++17 empty bases has changed.  Now an empty base will
> +      not prevent an aggregate containing only one or two floating-point
> +      fields from being returned through FPR.  This is compatible with
> +      GCC 6 and earlier, but incompatible with GCC 7 through 11. GCC 12 on
> +      MIPS will report such incompatibilities as an inform unless
> +      <code>-Wno-psabi</code> is used.
> +  </li>
> +</ul>
>  
>  <!-- <h3 id="mep">MeP</h3> -->
>
  
Richard Biener April 29, 2022, 6:51 a.m. UTC | #2
On Thu, Apr 28, 2022 at 7:30 PM Xi Ruoyao via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> Ping.

OK.

> On Wed, 2022-04-06 at 23:26 +0800, Xi Ruoyao via Gcc-patches wrote:
> > Document ABI changes in r12-7961, 7962, and 8023.  Ok for wwwdocs?
> >
> > ---
> >  htdocs/gcc-12/changes.html | 25 ++++++++++++++++++++++++-
> >  1 file changed, 24 insertions(+), 1 deletion(-)
> >
> > diff --git a/htdocs/gcc-12/changes.html b/htdocs/gcc-12/changes.html
> > index 4f2ee77f..c924bca3 100644
> > --- a/htdocs/gcc-12/changes.html
> > +++ b/htdocs/gcc-12/changes.html
> > @@ -50,6 +50,10 @@ a work-in-progress.</p>
> >      (so there is a C++ ABI incompatibility, GCC 4.4 and earlier compatible
> >      with GCC 12 or later, incompatible with GCC 4.5 through GCC 11).
> >      RISC-V has changed the handling of these already starting with GCC 10.
> > +    As the ABI requires, MIPS takes them into account handling function
> > +    return values so there is a C++ ABI incompatibility with GCC 4.5
> > +    through 11.  For function arguments on MIPS, refer to
> > +    <a href="#mips_zero_width_fields">the MIPS specific entry</a>.
> >      GCC 12 on the above targets will report such incompatibilities as
> >      warnings or other diagnostics unless <code>-Wno-psabi</code> is used.
> >    </li>
> > @@ -549,7 +553,26 @@ a work-in-progress.</p>
> >    </li>
> >  </ul>
> >
> > -<!-- <h3 id="mips">MIPS</h3> -->
> > +<h3 id="mips">MIPS</h3>
> > +<ul>
> > +  <li>The <a name="mips_zero_width_fields">ABI</a> passing arguments
> > +      containing zero-width fields (for example, C/C++ zero-width
> > +      bit-fields, GNU C/C++ zero-length arrays, and GNU C empty structs)
> > +      has changed.  Now a zero-width field will not prevent an aligned
> > +      64-bit floating-point field next to it from being passed through
> > +      FPR.  This is compatible with LLVM, but incompatible with previous
> > +      GCC releases. GCC 12 on MIPS will report such incompatibilities as
> > +      an inform unless <code>-Wno-psabi</code> is used.
> > +  </li>
> > +  <li>The <a name="mips_cxx17_empty_bases">ABI</a> returning values
> > +      containing C++17 empty bases has changed.  Now an empty base will
> > +      not prevent an aggregate containing only one or two floating-point
> > +      fields from being returned through FPR.  This is compatible with
> > +      GCC 6 and earlier, but incompatible with GCC 7 through 11. GCC 12 on
> > +      MIPS will report such incompatibilities as an inform unless
> > +      <code>-Wno-psabi</code> is used.
> > +  </li>
> > +</ul>
> >
> >  <!-- <h3 id="mep">MeP</h3> -->
> >
>
> --
> Xi Ruoyao <xry111@mengyan1223.wang>
> School of Aerospace Science and Technology, Xidian University
  
Gerald Pfeifer May 12, 2022, 7 a.m. UTC | #3
On Wed, 6 Apr 2022, Xi Ruoyao via Gcc-patches wrote:
> Document ABI changes in r12-7961, 7962, and 8023.  Ok for wwwdocs?

Thank you!

Note <a name=...> is deprecated, and we generally use id= attributes.

I made this change, and also expanded the anchor from just "ABI" which
is very generic to more specific text.

Pushed on top of the original changes.

Gerald

diff --git a/htdocs/gcc-12/changes.html b/htdocs/gcc-12/changes.html
index 60ed4b32..d645b15f 100644
--- a/htdocs/gcc-12/changes.html
+++ b/htdocs/gcc-12/changes.html
@@ -709,8 +709,8 @@ function Multiply (S1, S2 : Sign) return Sign is
 
 <h3 id="mips">MIPS</h3>
 <ul>
-  <li>The <a name="mips_zero_width_fields">ABI</a> passing arguments
-      containing zero-width fields (for example, C/C++ zero-width
+  <li>The <a id="mips_zero_width_fields">ABI passing arguments
+      containing zero-width fields</a> (for example, C/C++ zero-width
       bit-fields, GNU C/C++ zero-length arrays, and GNU C empty structs)
       has changed.  Now a zero-width field will not prevent an aligned
       64-bit floating-point field next to it from being passed through
@@ -718,8 +718,8 @@ function Multiply (S1, S2 : Sign) return Sign is
       GCC releases. GCC 12 on MIPS will report such incompatibilities as
       an inform unless <code>-Wno-psabi</code> is used.
   </li>
-  <li>The <a name="mips_cxx17_empty_bases">ABI</a> returning values
-      containing C++17 empty bases has changed.  Now an empty base will
+  <li>The <a id="mips_cxx17_empty_bases">ABI returning values
+      containing C++17 empty bases</a> has changed.  Now an empty base will
       not prevent an aggregate containing only one or two floating-point
       fields from being returned through FPR.  This is compatible with
       GCC 6 and earlier, but incompatible with GCC 7 through 11. GCC 12 on
  

Patch

diff --git a/htdocs/gcc-12/changes.html b/htdocs/gcc-12/changes.html
index 4f2ee77f..c924bca3 100644
--- a/htdocs/gcc-12/changes.html
+++ b/htdocs/gcc-12/changes.html
@@ -50,6 +50,10 @@  a work-in-progress.</p>
     (so there is a C++ ABI incompatibility, GCC 4.4 and earlier compatible
     with GCC 12 or later, incompatible with GCC 4.5 through GCC 11).
     RISC-V has changed the handling of these already starting with GCC 10.
+    As the ABI requires, MIPS takes them into account handling function
+    return values so there is a C++ ABI incompatibility with GCC 4.5
+    through 11.  For function arguments on MIPS, refer to
+    <a href="#mips_zero_width_fields">the MIPS specific entry</a>.
     GCC 12 on the above targets will report such incompatibilities as
     warnings or other diagnostics unless <code>-Wno-psabi</code> is used.
   </li>
@@ -549,7 +553,26 @@  a work-in-progress.</p>
   </li>
 </ul>
 
-<!-- <h3 id="mips">MIPS</h3> -->
+<h3 id="mips">MIPS</h3>
+<ul>
+  <li>The <a name="mips_zero_width_fields">ABI</a> passing arguments
+      containing zero-width fields (for example, C/C++ zero-width
+      bit-fields, GNU C/C++ zero-length arrays, and GNU C empty structs)
+      has changed.  Now a zero-width field will not prevent an aligned
+      64-bit floating-point field next to it from being passed through
+      FPR.  This is compatible with LLVM, but incompatible with previous
+      GCC releases. GCC 12 on MIPS will report such incompatibilities as
+      an inform unless <code>-Wno-psabi</code> is used.
+  </li>
+  <li>The <a name="mips_cxx17_empty_bases">ABI</a> returning values
+      containing C++17 empty bases has changed.  Now an empty base will
+      not prevent an aggregate containing only one or two floating-point
+      fields from being returned through FPR.  This is compatible with
+      GCC 6 and earlier, but incompatible with GCC 7 through 11. GCC 12 on
+      MIPS will report such incompatibilities as an inform unless
+      <code>-Wno-psabi</code> is used.
+  </li>
+</ul>
 
 <!-- <h3 id="mep">MeP</h3> -->