diff mbox series

[rs6000] Add a combine pattern for CA minus one [PR95737]

Message ID	5c4b6c08-02ee-1052-4707-c7615f8f3147@linux.ibm.com
State	New
Headers	DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 665EA3858032 Message-ID: <5c4b6c08-02ee-1052-4707-c7615f8f3147@linux.ibm.com> Date: Wed, 19 Jan 2022 15:12:24 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.4.1 Content-Language: en-US To: gcc-patches <gcc-patches@gcc.gnu.org> Subject: [PATCH, rs6000] Add a combine pattern for CA minus one [PR95737] Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: list From: HAO CHEN GUI via Gcc-patches <gcc-patches@gcc.gnu.org> Reply-To: HAO CHEN GUI <guihaoc@linux.ibm.com> Cc: Bill Schmidt <wschmidt@linux.ibm.com>, David <dje.gcc@gmail.com>, Segher Boessenkool <segher@kernel.crashing.org> Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" <gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org>
Series	[rs6000] Add a combine pattern for CA minus one [PR95737] \| [rs6000] Add a combine pattern for CA minus one [PR95737]

Commit Message

HAO CHEN GUI Jan. 19, 2022, 7:12 a.m. UTC

  Hi,
   This patch adds a combine pattern for "CA minus one". As CA only has two
values (0 or 1), we could convert following pattern
      (sign_extend:DI (plus:SI (reg:SI 98 ca)
                (const_int -1 [0xffffffffffffffff]))))
to
       (plus:DI (reg:DI 98 ca)
            (const_int -1 [0xffffffffffffffff])))
    With this patch, it eliminates one unnecessary sign extend. Also in rs6000,
regclass of CA register is set to NO_REGS. So CA is not in hard register set
and it can't match register_operand. The patch changes it to any_operand.

    Bootstrapped and tested on powerpc64-linux BE and LE with no regressions.
Is this okay for trunk? Any recommendations? Thanks a lot.

ChangeLog
2022-01-19 Haochen Gui <guihaoc@linux.ibm.com>

gcc/
	* config/rs6000/predicates.md (ca_operand): Match any_operand as CA
	register is not in hard register set.
	* config/rs6000/rs6000.md (extenddi_ca_minus_one): Define.

gcc/testsuite/
	* gcc.target/powerpc/pr95737.c: New.


patch.diff

Comments

Andrew Pinski Jan. 19, 2022, 7:52 a.m. UTC | #1

On Tue, Jan 18, 2022 at 11:13 PM HAO CHEN GUI via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> Hi,
>    This patch adds a combine pattern for "CA minus one". As CA only has two
> values (0 or 1), we could convert following pattern
>       (sign_extend:DI (plus:SI (reg:SI 98 ca)
>                 (const_int -1 [0xffffffffffffffff]))))
> to
>        (plus:DI (reg:DI 98 ca)
>             (const_int -1 [0xffffffffffffffff])))
>     With this patch, it eliminates one unnecessary sign extend. Also in rs6000,
> regclass of CA register is set to NO_REGS. So CA is not in hard register set
> and it can't match register_operand. The patch changes it to any_operand.
>
>     Bootstrapped and tested on powerpc64-linux BE and LE with no regressions.
> Is this okay for trunk? Any recommendations? Thanks a lot.
>
> ChangeLog
> 2022-01-19 Haochen Gui <guihaoc@linux.ibm.com>
>
> gcc/
>         * config/rs6000/predicates.md (ca_operand): Match any_operand as CA
>         register is not in hard register set.
>         * config/rs6000/rs6000.md (extenddi_ca_minus_one): Define.
>
> gcc/testsuite/
>         * gcc.target/powerpc/pr95737.c: New.
>
>
> patch.diff
> diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md
> index c65dfb91f3d..cd2ae1dc8e0 100644
> --- a/gcc/config/rs6000/predicates.md
> +++ b/gcc/config/rs6000/predicates.md
> @@ -188,7 +188,7 @@ (define_predicate "vlogical_operand"
>
>  ;; Return 1 if op is the carry register.
>  (define_predicate "ca_operand"
> -  (match_operand 0 "register_operand")
> +  (match_operand 0 "any_operand")
>  {
>    if (SUBREG_P (op))
>      op = SUBREG_REG (op);
> diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
> index 6ecb0bd6142..f1b09aad3b5 100644
> --- a/gcc/config/rs6000/rs6000.md
> +++ b/gcc/config/rs6000/rs6000.md
> @@ -2358,6 +2358,21 @@ (define_insn "subf<mode>3_carry_in_xx"
>    "subfe %0,%0,%0"
>    [(set_attr "type" "add")])
>
> +(define_insn_and_split "*extenddi_ca_minus_one"
> +  [(set (match_operand:DI 0 "gpc_reg_operand")
> +       (sign_extend:DI (plus:SI (match_operand:SI 1 "ca_operand")
> +                                (const_int -1))))]
> +  ""
> +  "#"
> +  ""
> +  [(parallel [(set (match_dup 0)
> +                  (plus:DI (match_dup 2)
> +                           (const_int -1)))
> +             (clobber (match_dup 2))])]
> +{
> +  operands[2] = copy_rtx (operands[1]);
> +  PUT_MODE (operands[2], DImode);
> +})

There are a few things missing I think for this to be correct.
I think it should be:
(define_insn_and_split "*extenddi_ca_minus_one"
  [(set (match_operand:DI 0 "gpc_reg_operand" "=r")
       (sign_extend:DI (plus:SI (reg:SI CA_REGNO)
                                 (const_int -1))))]
  ""
  "#"
  "&& reload_completed"
  [(parallel [(set (match_dup 0)
                  (plus:DI (reg:DI CA_REGNO)
                           (const_int -1)))
             (clobber (reg:DI CA_REGNO))])]
{})

There is no reason to change ca_operand either since
subf<mode>3_carry_in_xx already hard codes the CA_REGNO too; you can
just use it directly like above.

Sorry for the incorrect whitespace formatting though.

Thanks,
Andrew Pinski

>
>  (define_insn "@neg<mode>2"
>    [(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
> diff --git a/gcc/testsuite/gcc.target/powerpc/pr95737.c b/gcc/testsuite/gcc.target/powerpc/pr95737.c
> new file mode 100644
> index 00000000000..94320f23423
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/pr95737.c
> @@ -0,0 +1,10 @@
> +/* PR target/95737 */
> +/* { dg-do compile { target lp64 } } */
> +/* { dg-options "-O2 -mdejagnu-cpu=power8" } */
> +/* { dg-final { scan-assembler-not {\mextsw\M} } } */
> +
> +
> +unsigned long long negativeLessThan (unsigned long long a, unsigned long long b)
> +{
> +   return -(a < b);
> +}

David Edelsohn Jan. 19, 2022, 2:40 p.m. UTC | #2

On Wed, Jan 19, 2022 at 2:12 AM HAO CHEN GUI <guihaoc@linux.ibm.com> wrote:
>
> Hi,
>    This patch adds a combine pattern for "CA minus one". As CA only has two
> values (0 or 1), we could convert following pattern
>       (sign_extend:DI (plus:SI (reg:SI 98 ca)
>                 (const_int -1 [0xffffffffffffffff]))))
> to
>        (plus:DI (reg:DI 98 ca)
>             (const_int -1 [0xffffffffffffffff])))
>     With this patch, it eliminates one unnecessary sign extend. Also in rs6000,
> regclass of CA register is set to NO_REGS. So CA is not in hard register set
> and it can't match register_operand. The patch changes it to any_operand.

CA_REGNO should be in class CA_REGS, not class NO_REGS.  This seems
like a major, latent bug.

Thanks, David

>
>     Bootstrapped and tested on powerpc64-linux BE and LE with no regressions.
> Is this okay for trunk? Any recommendations? Thanks a lot.
>
> ChangeLog
> 2022-01-19 Haochen Gui <guihaoc@linux.ibm.com>
>
> gcc/
>         * config/rs6000/predicates.md (ca_operand): Match any_operand as CA
>         register is not in hard register set.
>         * config/rs6000/rs6000.md (extenddi_ca_minus_one): Define.
>
> gcc/testsuite/
>         * gcc.target/powerpc/pr95737.c: New.
>
>
> patch.diff
> diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md
> index c65dfb91f3d..cd2ae1dc8e0 100644
> --- a/gcc/config/rs6000/predicates.md
> +++ b/gcc/config/rs6000/predicates.md
> @@ -188,7 +188,7 @@ (define_predicate "vlogical_operand"
>
>  ;; Return 1 if op is the carry register.
>  (define_predicate "ca_operand"
> -  (match_operand 0 "register_operand")
> +  (match_operand 0 "any_operand")
>  {
>    if (SUBREG_P (op))
>      op = SUBREG_REG (op);
> diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
> index 6ecb0bd6142..f1b09aad3b5 100644
> --- a/gcc/config/rs6000/rs6000.md
> +++ b/gcc/config/rs6000/rs6000.md
> @@ -2358,6 +2358,21 @@ (define_insn "subf<mode>3_carry_in_xx"
>    "subfe %0,%0,%0"
>    [(set_attr "type" "add")])
>
> +(define_insn_and_split "*extenddi_ca_minus_one"
> +  [(set (match_operand:DI 0 "gpc_reg_operand")
> +       (sign_extend:DI (plus:SI (match_operand:SI 1 "ca_operand")
> +                                (const_int -1))))]
> +  ""
> +  "#"
> +  ""
> +  [(parallel [(set (match_dup 0)
> +                  (plus:DI (match_dup 2)
> +                           (const_int -1)))
> +             (clobber (match_dup 2))])]
> +{
> +  operands[2] = copy_rtx (operands[1]);
> +  PUT_MODE (operands[2], DImode);
> +})
>
>  (define_insn "@neg<mode>2"
>    [(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
> diff --git a/gcc/testsuite/gcc.target/powerpc/pr95737.c b/gcc/testsuite/gcc.target/powerpc/pr95737.c
> new file mode 100644
> index 00000000000..94320f23423
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/pr95737.c
> @@ -0,0 +1,10 @@
> +/* PR target/95737 */
> +/* { dg-do compile { target lp64 } } */
> +/* { dg-options "-O2 -mdejagnu-cpu=power8" } */
> +/* { dg-final { scan-assembler-not {\mextsw\M} } } */
> +
> +
> +unsigned long long negativeLessThan (unsigned long long a, unsigned long long b)
> +{
> +   return -(a < b);
> +}

David Edelsohn Jan. 19, 2022, 3:03 p.m. UTC | #3

On Wed, Jan 19, 2022 at 2:12 AM HAO CHEN GUI <guihaoc@linux.ibm.com> wrote:
>
> Hi,
>    This patch adds a combine pattern for "CA minus one". As CA only has two
> values (0 or 1), we could convert following pattern
>       (sign_extend:DI (plus:SI (reg:SI 98 ca)
>                 (const_int -1 [0xffffffffffffffff]))))
> to
>        (plus:DI (reg:DI 98 ca)
>             (const_int -1 [0xffffffffffffffff])))
>     With this patch, it eliminates one unnecessary sign extend. Also in rs6000,
> regclass of CA register is set to NO_REGS. So CA is not in hard register set
> and it can't match register_operand. The patch changes it to any_operand.

Segher changed the class in 2014.

https://gcc.gnu.org/pipermail/gcc-patches/2014-September/399192.html

We need to ensure that it still is the correct decision in light of
these new patterns.

Thanks, David

>
>     Bootstrapped and tested on powerpc64-linux BE and LE with no regressions.
> Is this okay for trunk? Any recommendations? Thanks a lot.
>
> ChangeLog
> 2022-01-19 Haochen Gui <guihaoc@linux.ibm.com>
>
> gcc/
>         * config/rs6000/predicates.md (ca_operand): Match any_operand as CA
>         register is not in hard register set.
>         * config/rs6000/rs6000.md (extenddi_ca_minus_one): Define.
>
> gcc/testsuite/
>         * gcc.target/powerpc/pr95737.c: New.
>
>
> patch.diff
> diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md
> index c65dfb91f3d..cd2ae1dc8e0 100644
> --- a/gcc/config/rs6000/predicates.md
> +++ b/gcc/config/rs6000/predicates.md
> @@ -188,7 +188,7 @@ (define_predicate "vlogical_operand"
>
>  ;; Return 1 if op is the carry register.
>  (define_predicate "ca_operand"
> -  (match_operand 0 "register_operand")
> +  (match_operand 0 "any_operand")
>  {
>    if (SUBREG_P (op))
>      op = SUBREG_REG (op);
> diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
> index 6ecb0bd6142..f1b09aad3b5 100644
> --- a/gcc/config/rs6000/rs6000.md
> +++ b/gcc/config/rs6000/rs6000.md
> @@ -2358,6 +2358,21 @@ (define_insn "subf<mode>3_carry_in_xx"
>    "subfe %0,%0,%0"
>    [(set_attr "type" "add")])
>
> +(define_insn_and_split "*extenddi_ca_minus_one"
> +  [(set (match_operand:DI 0 "gpc_reg_operand")
> +       (sign_extend:DI (plus:SI (match_operand:SI 1 "ca_operand")
> +                                (const_int -1))))]
> +  ""
> +  "#"
> +  ""
> +  [(parallel [(set (match_dup 0)
> +                  (plus:DI (match_dup 2)
> +                           (const_int -1)))
> +             (clobber (match_dup 2))])]
> +{
> +  operands[2] = copy_rtx (operands[1]);
> +  PUT_MODE (operands[2], DImode);
> +})
>
>  (define_insn "@neg<mode>2"
>    [(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
> diff --git a/gcc/testsuite/gcc.target/powerpc/pr95737.c b/gcc/testsuite/gcc.target/powerpc/pr95737.c
> new file mode 100644
> index 00000000000..94320f23423
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/pr95737.c
> @@ -0,0 +1,10 @@
> +/* PR target/95737 */
> +/* { dg-do compile { target lp64 } } */
> +/* { dg-options "-O2 -mdejagnu-cpu=power8" } */
> +/* { dg-final { scan-assembler-not {\mextsw\M} } } */
> +
> +
> +unsigned long long negativeLessThan (unsigned long long a, unsigned long long b)
> +{
> +   return -(a < b);
> +}

HAO CHEN GUI Jan. 20, 2022, 2:12 a.m. UTC | #4

On 19/1/2022 下午 3:52, Andrew Pinski wrote:
> On Tue, Jan 18, 2022 at 11:13 PM HAO CHEN GUI via Gcc-patches
> <gcc-patches@gcc.gnu.org> wrote:
>>
>> Hi,
>>    This patch adds a combine pattern for "CA minus one". As CA only has two
>> values (0 or 1), we could convert following pattern
>>       (sign_extend:DI (plus:SI (reg:SI 98 ca)
>>                 (const_int -1 [0xffffffffffffffff]))))
>> to
>>        (plus:DI (reg:DI 98 ca)
>>             (const_int -1 [0xffffffffffffffff])))
>>     With this patch, it eliminates one unnecessary sign extend. Also in rs6000,
>> regclass of CA register is set to NO_REGS. So CA is not in hard register set
>> and it can't match register_operand. The patch changes it to any_operand.
>>
>>     Bootstrapped and tested on powerpc64-linux BE and LE with no regressions.
>> Is this okay for trunk? Any recommendations? Thanks a lot.
>>
>> ChangeLog
>> 2022-01-19 Haochen Gui <guihaoc@linux.ibm.com>
>>
>> gcc/
>>         * config/rs6000/predicates.md (ca_operand): Match any_operand as CA
>>         register is not in hard register set.
>>         * config/rs6000/rs6000.md (extenddi_ca_minus_one): Define.
>>
>> gcc/testsuite/
>>         * gcc.target/powerpc/pr95737.c: New.
>>
>>
>> patch.diff
>> diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md
>> index c65dfb91f3d..cd2ae1dc8e0 100644
>> --- a/gcc/config/rs6000/predicates.md
>> +++ b/gcc/config/rs6000/predicates.md
>> @@ -188,7 +188,7 @@ (define_predicate "vlogical_operand"
>>
>>  ;; Return 1 if op is the carry register.
>>  (define_predicate "ca_operand"
>> -  (match_operand 0 "register_operand")
>> +  (match_operand 0 "any_operand")
>>  {
>>    if (SUBREG_P (op))
>>      op = SUBREG_REG (op);
>> diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
>> index 6ecb0bd6142..f1b09aad3b5 100644
>> --- a/gcc/config/rs6000/rs6000.md
>> +++ b/gcc/config/rs6000/rs6000.md
>> @@ -2358,6 +2358,21 @@ (define_insn "subf<mode>3_carry_in_xx"
>>    "subfe %0,%0,%0"
>>    [(set_attr "type" "add")])
>>
>> +(define_insn_and_split "*extenddi_ca_minus_one"
>> +  [(set (match_operand:DI 0 "gpc_reg_operand")
>> +       (sign_extend:DI (plus:SI (match_operand:SI 1 "ca_operand")
>> +                                (const_int -1))))]
>> +  ""
>> +  "#"
>> +  ""
>> +  [(parallel [(set (match_dup 0)
>> +                  (plus:DI (match_dup 2)
>> +                           (const_int -1)))
>> +             (clobber (match_dup 2))])]
>> +{
>> +  operands[2] = copy_rtx (operands[1]);
>> +  PUT_MODE (operands[2], DImode);
>> +})
> 
> There are a few things missing I think for this to be correct.
> I think it should be:
> (define_insn_and_split "*extenddi_ca_minus_one"
>   [(set (match_operand:DI 0 "gpc_reg_operand" "=r")
>        (sign_extend:DI (plus:SI (reg:SI CA_REGNO)
>                                  (const_int -1))))]
>   ""
>   "#"
>   "&& reload_completed"
>   [(parallel [(set (match_dup 0)
>                   (plus:DI (reg:DI CA_REGNO)
>                            (const_int -1)))
>              (clobber (reg:DI CA_REGNO))])]
> {})
> 
> There is no reason to change ca_operand either since
> subf<mode>3_carry_in_xx already hard codes the CA_REGNO too; you can
Yes, we can directly use CA_REGNO. It makes the pattern compact.
But why it needs reload_completed? Could you explain it?

Thanks.
Gui Haochen

> just use it directly like above.
> 
> Sorry for the incorrect whitespace formatting though.
> 
> Thanks,
> Andrew Pinski
> 
>>
>>  (define_insn "@neg<mode>2"
>>    [(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
>> diff --git a/gcc/testsuite/gcc.target/powerpc/pr95737.c b/gcc/testsuite/gcc.target/powerpc/pr95737.c
>> new file mode 100644
>> index 00000000000..94320f23423
>> --- /dev/null
>> +++ b/gcc/testsuite/gcc.target/powerpc/pr95737.c
>> @@ -0,0 +1,10 @@
>> +/* PR target/95737 */
>> +/* { dg-do compile { target lp64 } } */
>> +/* { dg-options "-O2 -mdejagnu-cpu=power8" } */
>> +/* { dg-final { scan-assembler-not {\mextsw\M} } } */
>> +
>> +
>> +unsigned long long negativeLessThan (unsigned long long a, unsigned long long b)
>> +{
>> +   return -(a < b);
>> +}

Andrew Pinski Jan. 20, 2022, 2:17 a.m. UTC | #5

On Wed, Jan 19, 2022 at 6:12 PM HAO CHEN GUI <guihaoc@linux.ibm.com> wrote:
>
>
>
> On 19/1/2022 下午 3:52, Andrew Pinski wrote:
> > On Tue, Jan 18, 2022 at 11:13 PM HAO CHEN GUI via Gcc-patches
> > <gcc-patches@gcc.gnu.org> wrote:
> >>
> >> Hi,
> >>    This patch adds a combine pattern for "CA minus one". As CA only has two
> >> values (0 or 1), we could convert following pattern
> >>       (sign_extend:DI (plus:SI (reg:SI 98 ca)
> >>                 (const_int -1 [0xffffffffffffffff]))))
> >> to
> >>        (plus:DI (reg:DI 98 ca)
> >>             (const_int -1 [0xffffffffffffffff])))
> >>     With this patch, it eliminates one unnecessary sign extend. Also in rs6000,
> >> regclass of CA register is set to NO_REGS. So CA is not in hard register set
> >> and it can't match register_operand. The patch changes it to any_operand.
> >>
> >>     Bootstrapped and tested on powerpc64-linux BE and LE with no regressions.
> >> Is this okay for trunk? Any recommendations? Thanks a lot.
> >>
> >> ChangeLog
> >> 2022-01-19 Haochen Gui <guihaoc@linux.ibm.com>
> >>
> >> gcc/
> >>         * config/rs6000/predicates.md (ca_operand): Match any_operand as CA
> >>         register is not in hard register set.
> >>         * config/rs6000/rs6000.md (extenddi_ca_minus_one): Define.
> >>
> >> gcc/testsuite/
> >>         * gcc.target/powerpc/pr95737.c: New.
> >>
> >>
> >> patch.diff
> >> diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md
> >> index c65dfb91f3d..cd2ae1dc8e0 100644
> >> --- a/gcc/config/rs6000/predicates.md
> >> +++ b/gcc/config/rs6000/predicates.md
> >> @@ -188,7 +188,7 @@ (define_predicate "vlogical_operand"
> >>
> >>  ;; Return 1 if op is the carry register.
> >>  (define_predicate "ca_operand"
> >> -  (match_operand 0 "register_operand")
> >> +  (match_operand 0 "any_operand")
> >>  {
> >>    if (SUBREG_P (op))
> >>      op = SUBREG_REG (op);
> >> diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
> >> index 6ecb0bd6142..f1b09aad3b5 100644
> >> --- a/gcc/config/rs6000/rs6000.md
> >> +++ b/gcc/config/rs6000/rs6000.md
> >> @@ -2358,6 +2358,21 @@ (define_insn "subf<mode>3_carry_in_xx"
> >>    "subfe %0,%0,%0"
> >>    [(set_attr "type" "add")])
> >>
> >> +(define_insn_and_split "*extenddi_ca_minus_one"
> >> +  [(set (match_operand:DI 0 "gpc_reg_operand")
> >> +       (sign_extend:DI (plus:SI (match_operand:SI 1 "ca_operand")
> >> +                                (const_int -1))))]
> >> +  ""
> >> +  "#"
> >> +  ""
> >> +  [(parallel [(set (match_dup 0)
> >> +                  (plus:DI (match_dup 2)
> >> +                           (const_int -1)))
> >> +             (clobber (match_dup 2))])]
> >> +{
> >> +  operands[2] = copy_rtx (operands[1]);
> >> +  PUT_MODE (operands[2], DImode);
> >> +})
> >
> > There are a few things missing I think for this to be correct.
> > I think it should be:
> > (define_insn_and_split "*extenddi_ca_minus_one"
> >   [(set (match_operand:DI 0 "gpc_reg_operand" "=r")
> >        (sign_extend:DI (plus:SI (reg:SI CA_REGNO)
> >                                  (const_int -1))))]
> >   ""
> >   "#"
> >   "&& reload_completed"
> >   [(parallel [(set (match_dup 0)
> >                   (plus:DI (reg:DI CA_REGNO)
> >                            (const_int -1)))
> >              (clobber (reg:DI CA_REGNO))])]
> > {})
> >
> > There is no reason to change ca_operand either since
> > subf<mode>3_carry_in_xx already hard codes the CA_REGNO too; you can
> Yes, we can directly use CA_REGNO. It makes the pattern compact.
> But why it needs reload_completed? Could you explain it?

Actually you are right, there is no reason for the reload_completed any more.
It was definitely needed before when you were doing PUT_MODE as I
didn't trust how ca_operand would have caught only the CA_REGNO
register.

Thanks,
Andrew

>
> Thanks.
> Gui Haochen
>
> > just use it directly like above.
> >
> > Sorry for the incorrect whitespace formatting though.
> >
> > Thanks,
> > Andrew Pinski
> >
> >>
> >>  (define_insn "@neg<mode>2"
> >>    [(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
> >> diff --git a/gcc/testsuite/gcc.target/powerpc/pr95737.c b/gcc/testsuite/gcc.target/powerpc/pr95737.c
> >> new file mode 100644
> >> index 00000000000..94320f23423
> >> --- /dev/null
> >> +++ b/gcc/testsuite/gcc.target/powerpc/pr95737.c
> >> @@ -0,0 +1,10 @@
> >> +/* PR target/95737 */
> >> +/* { dg-do compile { target lp64 } } */
> >> +/* { dg-options "-O2 -mdejagnu-cpu=power8" } */
> >> +/* { dg-final { scan-assembler-not {\mextsw\M} } } */
> >> +
> >> +
> >> +unsigned long long negativeLessThan (unsigned long long a, unsigned long long b)
> >> +{
> >> +   return -(a < b);
> >> +}

diff mbox series

Patch

diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md
index c65dfb91f3d..cd2ae1dc8e0 100644
--- a/gcc/config/rs6000/predicates.md
+++ b/gcc/config/rs6000/predicates.md
@@ -188,7 +188,7 @@  (define_predicate "vlogical_operand"

 ;; Return 1 if op is the carry register.
 (define_predicate "ca_operand"
-  (match_operand 0 "register_operand")
+  (match_operand 0 "any_operand")
 {
   if (SUBREG_P (op))
     op = SUBREG_REG (op);
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 6ecb0bd6142..f1b09aad3b5 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -2358,6 +2358,21 @@  (define_insn "subf<mode>3_carry_in_xx"
   "subfe %0,%0,%0"
   [(set_attr "type" "add")])

+(define_insn_and_split "*extenddi_ca_minus_one"
+  [(set (match_operand:DI 0 "gpc_reg_operand")
+	(sign_extend:DI (plus:SI (match_operand:SI 1 "ca_operand")
+				 (const_int -1))))]
+  ""
+  "#"
+  ""
+  [(parallel [(set (match_dup 0)
+		   (plus:DI (match_dup 2)
+			    (const_int -1)))
+	      (clobber (match_dup 2))])]
+{
+  operands[2] = copy_rtx (operands[1]);
+  PUT_MODE (operands[2], DImode);
+})

 (define_insn "@neg<mode>2"
   [(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
diff --git a/gcc/testsuite/gcc.target/powerpc/pr95737.c b/gcc/testsuite/gcc.target/powerpc/pr95737.c
new file mode 100644
index 00000000000..94320f23423
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr95737.c
@@ -0,0 +1,10 @@ 
+/* PR target/95737 */
+/* { dg-do compile { target lp64 } } */
+/* { dg-options "-O2 -mdejagnu-cpu=power8" } */
+/* { dg-final { scan-assembler-not {\mextsw\M} } } */
+
+
+unsigned long long negativeLessThan (unsigned long long a, unsigned long long b)
+{
+   return -(a < b);
+}